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    • 7. 发明授权
    • Process for producing conjugated diolefinic polymers
    • 制备共轭二烯聚合物的方法
    • US4097661A
    • 1978-06-27
    • US788351
    • 1977-04-18
    • Koei KomatsuKenji ItoyamaJun HirotaAkio Nishijima
    • Koei KomatsuKenji ItoyamaJun HirotaAkio Nishijima
    • C08F4/00C08F2/38C08F4/42C08F4/46C08F36/00C08F36/04C08F4/56
    • C08F36/04
    • A process for producing a conjugated diolefinic polymer by polymerizing at least one conjugated diolefin or copolymerizing at least one conjugated diolefin with at least one vinyl aromatic hydrocarbon in a hydrocarbon solvent in the presence of an alfin catalyst and at least one molecular weight regulator selected from the group consisting of (A) unsaturated halohydrocarbons represented by the general formula, RCX .dbd. CYZ, wherein R represents hydrogen, an alkyl group having 1 to 7 carbon atoms, a vinyl group, a phenyl group, a substituted phenyl group, or a halogen atom and X, Y and Z represent independently a hydrogen or halogen atom, at least one of said R, X, Y and Z being a halogen atom, (B) halogenated aromatic hydrocarbons, (C) ethers, polyethers, and acetals and (D) tertiary amines and, if necessary, a dihydro aromatic hydrocarbon, characterized in that said polymerization or copolymerization is effected in the presence of 0.03 to 0.9 mole of water and/or an alcohol per mole of organosodium contained in said alfin catalyst. According to this invention, there is obtained a polymer or copolymer excellent in green strength and processability of the unvulcanized compound and in physical properties of the vulcanizate.
    • 一种制备共轭二烯烃聚合物的方法,其通过在烯烃催化剂和至少一种分子量调节剂的存在下,在烃溶剂中聚合至少一种共轭二烯烃或共聚至少一种共轭二烯烃与至少一种乙烯基芳烃, 由以下通式表示的(A)不饱和卤代烃:RCX = CYZ,其中R表示氢,具有1至7个碳原子的烷基,乙烯基,苯基,取代的苯基或卤素原子 并且X,Y和Z分别独立地表示氢原子或卤素原子,所述R,X,Y和Z中的至少一个为卤素原子,(B)卤代芳香烃,(C)醚,聚醚和缩醛和(D )叔胺和如果需要的二氢芳族烃,其特征在于所述聚合或共聚在每摩尔o的0.03至0.9摩尔的水和/或醇的存在下进行 所述烯烃催化剂中含有的果糖钠。 根据本发明,获得了未硫化化合物的生坯强度和加工性能以及硫化橡胶的物理性能优异的聚合物或共聚物。
    • 10. 发明授权
    • Semiconductor memory device and method of manufacturing same
    • 半导体存储器件及其制造方法
    • US08309958B2
    • 2012-11-13
    • US12872284
    • 2010-08-31
    • Jun HirotaYoko IwakajiMoto Yabuki
    • Jun HirotaYoko IwakajiMoto Yabuki
    • H01L29/06H01L29/12H01L45/00
    • H01L27/1021H01L27/101
    • According to one embodiment, a semiconductor memory device includes a word line interconnection layer, a bit line interconnection layer and a pillar. The word line interconnection layer includes a plurality of word lines which extend in a first direction. The bit line interconnection layer includes a plurality of bit lines which extend in a second direction crossing over the first direction. The pillar is arranged between each of the word lines and each of the bit lines. The pillar includes a silicon diode and a variable resistance film, and the silicon diode includes a p-type portion and an n-type portion. The word line interconnection layer and the bit line interconnection layer are alternately stacked, and a compressive force is applied to the silicon diode in a direction in which the p-type portion and the n-type portion become closer to each other.
    • 根据一个实施例,半导体存储器件包括字线互连层,位线互连层和柱。 字线互连层包括沿第一方向延伸的多个字线。 位线互连层包括沿与第一方向交叉的第二方向延伸的多个位线。 支柱布置在每个字线和每个位线之间。 支柱包括硅二极管和可变电阻膜,并且硅二极管包括p型部分和n型部分。 字线互连层和位线互连层交替堆叠,并且在p型部分和n型部分变得更接近的方向上对硅二极管施加压缩力。