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1. 发明申请

US20090021119A1 Angular velocity sensor and manufacturing method thereof 审中-公开
标题翻译：角速度传感器及其制造方法
公开(公告)号：US20090021119A1
公开(公告)日：2009-01-22
申请号：US10586712
申请日：2005-02-23
申请人： Masahiro Yasumi , Kazuki Komaki , Yuji Murashima , Yuki Nakamura , Tetsuo Kawasaki
发明人： Masahiro Yasumi , Kazuki Komaki , Yuji Murashima , Yuki Nakamura , Tetsuo Kawasaki
IPC分类号： G01C19/56 , H01L41/22
CPC分类号： G01C19/5628 , G01C19/5621 , Y10T29/42
摘要： A substrate is made of single crystal silicon and having a tuning folk shape. The substrate includes plural arms extending in parallel with each other and a joint section for connecting respecting ends of the arms with each other. An angular velocity sensor includes a barrier layer containing silicon oxide provided on each of the arms of the substrate, a first adhesion layer containing titanium provided on the barrier layer a first electrode layer containing at least one of titanium and titanium oxide provided on the first adhesion layer, an orientation control layer provided on the first electrode layer, a piezoelectric layer provided on the orientation control layer, a second adhesion layer provided on the piezoelectric layer, and a second electrode layer provided on the second adhesion layer. This angular velocity sensor has a small size and stable characteristics.
摘要翻译：衬底由单晶硅制成并具有调谐民间形状。基板包括彼此平行延伸的多个臂和用于将臂的相对端彼此连接的接合部。角速度传感器包括设置在基板的每个臂上的含有氧化硅的阻挡层，在该阻挡层上含有钛的第一粘合层，该第一粘合层含有设置在第一粘合层上的钛和氧化钛中的至少一种设置在所述第一电极层上的取向控制层，设置在所述取向控制层上的压电层，设置在所述压电层上的第二粘合层，以及设置在所述第二粘合层上的第二电极层。该角速度传感器具有体积小，性能稳定的特点。

2. 发明授权

US08006357B2 Process for fabricating piezoelectric element 有权
标题翻译：压电元件制造工艺
公开(公告)号：US08006357B2
公开(公告)日：2011-08-30
申请号：US11813551
申请日：2006-02-15
申请人： Yuki Nakamura , Yuji Murashima , Masahiro Yasumi , Kazuki Komaki
发明人： Yuki Nakamura , Yuji Murashima , Masahiro Yasumi , Kazuki Komaki
IPC分类号： H01L41/22 , H04R17/00 , B21D53/76 , B23P17/00
CPC分类号： H01L41/257 , H01L41/332 , Y10T29/42 , Y10T29/49401
摘要： In a production method of a piezoelectric element, an unneeded electric field is prevented from being applied to a piezoelectric thin film layer during the production process, resulting in a high performance piezoelectric element production method. The production method includes a first process for depositing an under electrode layer, a piezoelectric thin film layer and an upper electrode layer successively on a substrate such that the under electrode layer and the upper electrode layer form a short-circuit, a second process, after the first process, for etching including dry etching, the second process commenced while the under electrode layer and the upper electrode layer are short-circuited, a third process, after the second process, for polarizing by applying a voltage across the under electrode layer and the upper electrode layer, a fourth process, after the third process, for individualizing each piezoelectric element.
摘要翻译：在压电元件的制造方法中，在制造工序中，不需要的电场被防止施加于压电薄膜层，从而形成高性能的压电元件的制造方法。该制造方法包括：在基板上依次沉积下电极层，压电薄膜层和上电极层的第一工艺，使得下电极层和上电极层形成短路，第二工序后第一工艺，用于蚀刻包括干蚀刻，第二工艺在下电极层和上电极层短路的同时开始;第三工序，在第二工艺之后，通过施加电压跨越下电极层和上电极层，第四工序，第三工序后，用于使各压电元件个体化。

3. 发明申请

US20100125988A1 PROCESS FOR FABRICATING PIEZOELECTRIC ELEMENT 有权
标题翻译：制造压电元件的工艺
公开(公告)号：US20100125988A1
公开(公告)日：2010-05-27
申请号：US11813551
申请日：2006-02-15
申请人： Yuki Nakamura , Yuji Murashima , Masahiro Yasumi , Kazuki Komaki
发明人： Yuki Nakamura , Yuji Murashima , Masahiro Yasumi , Kazuki Komaki
IPC分类号： H01L41/22
CPC分类号： H01L41/257 , H01L41/332 , Y10T29/42 , Y10T29/49401
摘要： A method for fabricating a piezoelectric element capable of ensuring high piezoelectric characteristics by preventing generation of unnecessary electric field in a piezoelectric thin film layer during the fabrication process. The method for fabricating a piezoelectric element comprises a first step for depositing a lower electrode layer, a piezoelectric thin film layer and an upper electrode layer sequentially on a substrate, a second step for performing etching including dry etching, a third step for performing polarization by applying a voltage between the lower electrode layer and the upper electrode layer, and a fourth step for segmenting into individual piezoelectric elements wherein the lower electrode layer and the upper electrode layer are held in short circuit state at least when dry etching is performed.
摘要翻译：一种制造压电元件的方法，其能够通过在制造过程中防止在压电薄膜层中产生不必要的电场而确保高的压电特性。制造压电元件的方法包括：第一步骤，用于在衬底上依次沉积下电极层，压电薄膜层和上电极层;第二步骤，用于执行包括干蚀刻的蚀刻;第三步骤，用于通过在下电极层和上电极层之间施加电压，以及第四步骤，用于分割成各个压电元件，其中至少在进行干蚀刻时，下电极层和上电极层保持在短路状态。

4. 发明授权

US06570231B1 Semiconductor device with varying width electrode 有权
标题翻译：具有不同宽度电极的半导体器件
公开(公告)号：US06570231B1
公开(公告)日：2003-05-27
申请号：US09652989
申请日：2000-08-31
申请人： Masahiro Yasumi , Ichirou Matsuo , Toshiki Yabu , Mizuki Segawa , Kunitoshi Aono , Akihiko Ohtani , Takayuki Minemaru , Tadashi Fukumoto
发明人： Masahiro Yasumi , Ichirou Matsuo , Toshiki Yabu , Mizuki Segawa , Kunitoshi Aono , Akihiko Ohtani , Takayuki Minemaru , Tadashi Fukumoto
IPC分类号： H01L2976
CPC分类号： H01L21/823842 , H01L21/823835 , H01L21/823871
摘要： An n-channel active region, a p-channel active region and an isolation insulating film are formed, and a silicon film is deposited via a gate insulating film. After introducing n-type impurities into the n-channel region and p-type impurities into the p-channel region, a silicon gate electrode is formed in such a manner that its width is enlarged only in the boundary portion between the n-channel region and the p-channel region. After forming a side wall insulating film, an n-channel diffusion layer and a p-channel diffusion layer, a metal silicide layer is formed in a self-aligned manner on the surfaces of the silicon gate electrode, the n-channel diffusion layer and the p-channel diffusion layer.
摘要翻译：形成n沟道有源区，p沟道有源区和隔离绝缘膜，通过栅极绝缘膜沉积硅膜。在n沟道区域中引入n型杂质并将p型杂质引入p沟道区中后，形成硅栅电极，使其宽度仅在n沟道区域之间的边界部分扩大和p沟道区域。在形成侧壁绝缘膜，n沟道扩散层和p沟道扩散层之后，在硅栅极，n沟道扩散层和n沟道扩散层的表面上以自对准的方式形成金属硅化物层 p沟道扩散层。

5. 发明授权

US6100170A Method of manufacturing semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US6100170A
公开(公告)日：2000-08-08
申请号：US110942
申请日：1998-07-07
申请人： Michikazu Matsumoto , Tatsuo Sugiyama , Shinichi Ogawa , Masato Kanazawa , Kouji Tamura , Masahiro Yasumi
发明人： Michikazu Matsumoto , Tatsuo Sugiyama , Shinichi Ogawa , Masato Kanazawa , Kouji Tamura , Masahiro Yasumi
IPC分类号： H01L21/28 , H01L21/285 , H01L21/336 , H01L21/425 , H01L21/3205
CPC分类号： H01L29/665 , H01L21/28052 , H01L21/28512 , H01L21/28518
摘要： After forming a polysilicon film to be used as a gate electrode on a semiconductor substrate of silicon, an insulating thin film is deposited on the polysilicon film. Impurity ions are implanted into the polysilicon film through the insulating thin film, so as to form an amorphous layer on the surface of the polysilicon film. After removing the insulating thin film existing on the polysilicon film, a metal film is deposited on the amorphous layer. A reaction is caused between the amorphous layer and the metal film through annealing, so as to form a metal silicide layer on the surface of the polysilicon film.
摘要翻译：在硅的半导体衬底上形成用作栅电极的多晶硅膜之后，在多晶硅膜上沉积绝缘薄膜。通过绝缘薄膜将杂质离子注入到多晶硅膜中，以在多晶硅膜的表面上形成非晶层。在去除存在于多晶硅膜上的绝缘薄膜之后，在非晶层上沉积金属膜。通过退火在非晶层与金属膜之间产生反应，从而在多晶硅膜的表面上形成金属硅化物层。

6. 发明授权

US08044557B2 Piezoelectric device and its manufacturing method 有权
标题翻译：压电器件及其制造方法
公开(公告)号：US08044557B2
公开(公告)日：2011-10-25
申请号：US12596867
申请日：2008-04-24
申请人： Michihiko Hayashi , Masahiro Yasumi , Shoji Okamoto
发明人： Michihiko Hayashi , Masahiro Yasumi , Shoji Okamoto
IPC分类号： H01L41/08
CPC分类号： H01L41/319 , B41J2/161 , B41J2/1628 , B41J2/1629 , B41J2/1631 , B41J2/1632 , B41J2/1635 , B41J2/1646 , G01C19/56 , G01C19/5607 , G01C25/00 , H01L41/0477 , H01L41/0815 , H01L41/29 , H01L41/316 , Y10T29/42
摘要： An upper adhesion layer 35 formed between a piezoelectricity layer 32 and an upper electrode layer 34 so as to abut on the piezoelectricity layer 32 and the upper electrode layer 34 is included. The upper adhesion layer 35 includes a first tungsten layer 47 made of tungsten in which an α phase and a β phase coexist and a second tungsten layer 48 made of α-phase tungsten. The first tungsten layer 47 is configured so as to abut on the piezoelectricity layer 32. It is possible to obtain a piezoelectric device which is capable of improving the adhesion property of both the piezoelectricity layer and the electrode layer and reducing a basic point voltage fluctuation at the time of high-temperature operation so as to improve reliability.
摘要翻译：包括形成在压电层32和上电极层34之间以抵靠压电层32和上电极层34的上粘合层35。上部粘合层35包括由钨制成的第一钨层47，其中α相和/ 相共存和由α相钨制成的第二钨层48。第一钨层47被构造成邻接在压电层32上。可以获得能够提高压电层和电极层的粘合性的压电装置，并且降低基本点电压波动高温运行的时间，以提高可靠性。

7. 发明申请

US20100117493A1 PIEZOELECTRIC DEVICE AND ITS MANUFACTURING METHOD 有权
标题翻译：压电器件及其制造方法
公开(公告)号：US20100117493A1
公开(公告)日：2010-05-13
申请号：US12596867
申请日：2008-04-24
申请人： Michihiko Hayashi , Masahiro Yasumi , Shoji Okamoto
发明人： Michihiko Hayashi , Masahiro Yasumi , Shoji Okamoto
IPC分类号： H01L41/047 , H01L41/22
CPC分类号： H01L41/319 , B41J2/161 , B41J2/1628 , B41J2/1629 , B41J2/1631 , B41J2/1632 , B41J2/1635 , B41J2/1646 , G01C19/56 , G01C19/5607 , G01C25/00 , H01L41/0477 , H01L41/0815 , H01L41/29 , H01L41/316 , Y10T29/42
摘要： Upper adhesion layer 35 formed between piezoelectricity layer 32 and upper electrode layer 34 so as to abut on piezoelectricity layer 32 and upper electrode layer 34 is included. Upper adhesion layer 35 includes first tungsten layer 47 made of tungsten in which an α phase and a β phase coexist and second tungsten layer 48 made of α-phase tungsten. First tungsten layer 47 is configured so as to abut on piezoelectricity layer 32. It is possible to obtain a piezoelectric device which is capable of improving the adhesion property of both the piezoelectricity layer and the electrode layer and reducing a basic point voltage fluctuation at the time of high-temperature operation so as to improve reliability.
摘要翻译：包括在压电层32和上电极层34之间形成的与上压电层32和上电极层34邻接的上粘合层35。上粘合层35包括由钨制成的第一钨层47，其中α相和/ 由α相钨制成的相共存和第二钨层48。第一钨层47被配置为与压电层32邻接。可以获得能够提高压电层和电极层两者的粘附性并降低基点点电压波动的压电装置的高温运行，以提高可靠性。

8. 发明授权

US07168321B2 Vibration-type piezoelectric acceleration sensor element and vibration-type piezoelectric acceleration sensor therewith 有权
标题翻译：振动式压电加速度传感器元件及其振动型压电加速度传感器
公开(公告)号：US07168321B2
公开(公告)日：2007-01-30
申请号：US11182098
申请日：2005-07-15
申请人： Jiro Terada , Takami Ishida , Masaya Nakatani , Masahiro Yasumi
发明人： Jiro Terada , Takami Ishida , Masaya Nakatani , Masahiro Yasumi
IPC分类号： G01P15/09
CPC分类号： G01P15/0802 , B81B3/0051 , B81B2201/0235 , B81B2203/0127 , G01P15/097
摘要： The vibration-type piezoelectric acceleration sensor element includes a frame; and a diaphragm, support, and retentive part, provided in the frame. The diaphragm includes a bottom electrode layer, a piezoelectric thin-film layer formed on the bottom electrode layer, and a top electrode layer formed on the piezoelectric thin-film layer. A first end of the diaphragm is connected to the frame. The support retains a second end of the diaphragm. The retentive part retains the support so that the support is reciprocable only in a direction through the first end and the second end of the diaphragm.
摘要翻译：振动型压电加速度传感器元件包括框架; 以及在框架中提供的隔膜，支撑和保持部件。隔膜包括底电极层，形成在底电极层上的压电薄膜层和形成在压电薄膜层上的顶电极层。隔膜的第一端连接到框架。支架保持隔膜的第二端。保持部件保持支撑件，使得支撑件仅在通过隔膜的第一端和第二端的方向上往复运动。

9. 发明授权

US08117916B2 Electronic component and method for manufacturing the same 有权
标题翻译：电子元件及其制造方法
公开(公告)号：US08117916B2
公开(公告)日：2012-02-21
申请号：US12447548
申请日：2007-11-12
申请人： Shoji Okamoto , Masahiro Yasumi , Yuuki Nakamura , Satoshi Ohuchi , Michihiko Hayashi
发明人： Shoji Okamoto , Masahiro Yasumi , Yuuki Nakamura , Satoshi Ohuchi , Michihiko Hayashi
IPC分类号： G01P9/04 , G01P15/09
CPC分类号： G01C19/5607 , G01C19/5628 , H01L41/0477 , H01L41/0815 , H01L41/29 , Y10T29/42
摘要： An electronic component is disclosed, and this component includes an element with an electrode section which is formed of upper electrode (74), lower electrode (72), piezoelectric unit (70) placed between upper electrode (74) and lower electrode (72), and adhesive layer (76) layered between upper electrode (74) and piezoelectric unit (70). Piezoelectric unit (70) includes piezoelectric layer (80) made of piezoelectric material containing lead, and adhesive layer (76) includes a tungsten layer made of tungsten-based material. Piezoelectric layer (80) and the tungsten layer are layered together. The structure discussed above allows preventing a piezoelectric constant from lowering and a base-point voltage from varying. The lowering and the varying have been caused by a temperature-rise.
摘要翻译：公开了一种电子部件，该部件包括具有上部电极（74），下部电极（72），设置在上部电极（74）和下部电极（72）之间的压电部件（70））形成的电极部的元件，以及层叠在上电极（74）和压电单元（70）之间的粘合层（76）。压电单元（70）包括由包含铅的压电材料制成的压电层（80），并且粘合剂层（76）包括由钨基材料制成的钨层。压电层（80）和钨层层叠在一起。上述结构允许防止压电常数降低和基点电压变化。降温和变化是由温升引起的。

10. 发明申请

US20100043547A1 ELECTRONIC COMPONENT AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：电子元件及其制造方法
公开(公告)号：US20100043547A1
公开(公告)日：2010-02-25
申请号：US12447548
申请日：2007-11-12
申请人： Shoji Okamoto , Masahiro Yasumi , Yuuki Nakamura , Satoshi Ohuchi , Michihiko Hayashi
发明人： Shoji Okamoto , Masahiro Yasumi , Yuuki Nakamura , Satoshi Ohuchi , Michihiko Hayashi
IPC分类号： G01P9/04 , H01L41/047 , H01L41/22
CPC分类号： G01C19/5607 , G01C19/5628 , H01L41/0477 , H01L41/0815 , H01L41/29 , Y10T29/42
摘要： An electronic component is disclosed, and this component includes an element with an electrode section which is formed of upper electrode (74), lower electrode (72), piezoelectric unit (70) placed between upper electrode (74) and lower electrode (72), and adhesive layer (76) layered between upper electrode (74) and piezoelectric unit (70). Piezoelectric unit (70) includes piezoelectric layer (80) made of piezoelectric material containing lead, and adhesive layer (76) includes a tungsten layer made of tungsten-based material. Piezoelectric layer (80) and the tungsten layer are layered together. The structure discussed above allows preventing a piezoelectric constant from lowering and a base-point voltage from varying. The lowering and the varying have been caused by a temperature-rise.
摘要翻译：公开了一种电子部件，该部件包括具有上部电极（74），下部电极（72），设置在上部电极（74）和下部电极（72）之间的压电部件（70））形成的电极部的元件，以及层叠在上电极（74）和压电单元（70）之间的粘合层（76）。压电单元（70）包括由包含铅的压电材料制成的压电层（80），并且粘合剂层（76）包括由钨基材料制成的钨层。压电层（80）和钨层层叠在一起。上述结构允许防止压电常数降低和基点电压变化。降温和变化是由温升引起的。

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