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1. 发明申请

WO2014100362A1 APPARATUS AND METHOD FOR GENERATING DESCRIPTORS TO TRANSFER DATA TO AND FROM NON-VOLATILE SEMICONDUCTOR MEMORY OF A STORAGE DRIVE 审中-公开
标题翻译：用于生成描述符以传输数据到存储驱动器的非易失性半导体存储器的装置和方法
公开(公告)号：WO2014100362A1
公开(公告)日：2014-06-26
申请号：PCT/US2013/076437
申请日：2013-12-19
申请人： MARVELL WORLD TRADE LTD. , LEE, Chi Kong , AU, Siu-Hung Frederick , PARK, Jungil , SHIN, Hyunsuk , XU, Wei , HE, Jinjin , SUN, Fei
发明人： LEE, Chi Kong , AU, Siu-Hung Frederick , PARK, Jungil , SHIN, Hyunsuk , XU, Wei , HE, Jinjin , SUN, Fei
IPC分类号： G06F3/06 , G06F13/16
CPC分类号： G06F12/0246 , G06F3/061 , G06F3/064 , G06F3/0659 , G06F3/0679 , G06F3/0688 , G06F13/1668 , G11C16/32
摘要： A storage drive including first, second, third, fourth and fifth modules. The first module is configured to control transfer of blocks of data between a host device and the storage drive. The second module is configured to transfer the blocks of data to and from a non-volatile semiconductor memory in the storage drive. The third module is configured to generate a first descriptor, which describes a transfer of blocks of data between the second module and the non-volatile semiconductor memory. The fourth module is configured to, according to the first descriptor, generate second descriptors. Each of the second descriptors corresponds to a respective one of the blocks of data. The fifth module is configured to generate instruction signals based on the second descriptors. The second module is configured to, based on the instruction signals, transfer the blocks of data between the first module and the non-volatile semiconductor memory.
摘要翻译：包括第一，第二，第三，第四和第五模块的存储驱动器。第一个模块被配置为控制主机设备和存储驱动器之间的数据块传输。第二模块被配置为将数据块传送到存储驱动器中的非易失性半导体存储器和/或从其移出。第三模块被配置为生成第一描述符，其描述在第二模块和非易失性半导体存储器之间传输数据块。第四模块被配置为根据第一描述符生成第二描述符。每个第二描述符对应于数据块中的相应一个。第五模块被配置为基于第二描述符生成指令信号。第二模块被配置为基于指令信号在第一模块和非易失性半导体存储器之间传送数据块。

2. 发明申请

WO2013074649A1 SYSTEMS AND METHODS FOR REDUCING PEAK POWER CONSUMPTION IN A SOLID STATE DRIVE CONTROLLER 审中-公开
标题翻译：用于减少固态驱动控制器中的峰值功耗的系统和方法
公开(公告)号：WO2013074649A1
公开(公告)日：2013-05-23
申请号：PCT/US2012/065045
申请日：2012-11-14
申请人： MARVELL WORLD TRADE LTD. , SHIN, Hyunsuk , PARK, Jungil , LEE, Chi, Kong , CHEN, Chih-Ching
发明人： SHIN, Hyunsuk , PARK, Jungil , LEE, Chi, Kong , CHEN, Chih-Ching
IPC分类号： G11C5/14 , G11C16/30
CPC分类号： G11C5/14 , G11C16/30
摘要： In accordance with an embodiment of the disclosure, systems and methods are provided for reducing (102) an amount of peak power consumption in a device. In certain implementations, a first signal and a second signal (106) are received, wherein the first signal and the second signal are indicative of amounts of power consumption in a device (104). The first signal is combined (110) with the second signal to generate a combined signal, and at least a portion of the second signal is shifted in time (116) to cause a combination (118) of the first signal and the shifted portion to have a peak amplitude less than a peak amplitude of the combined signal.
摘要翻译：根据本公开的实施例，提供了用于减少（102）设备中的峰值功率消耗量的系统和方法。在某些实现中，接收第一信号和第二信号（106），其中第一信号和第二信号指示设备（104）中的功率消耗量。第一信号与第二信号组合（110）以产生组合信号，并且第二信号的至少一部分在时间上被移位（116），以使第一信号和偏移部分的组合（118）具有小于组合信号的峰值振幅的峰值振幅。

3. 发明申请

WO2012006062A1 INTERFACE MANAGEMENT CONTROL SYSTEMS AND METHODS FOR NON-VOLATILE SEMICONDUCTOR MEMORY 审中-公开
标题翻译：非易失性半导体存储器的界面管理控制系统和方法
公开(公告)号：WO2012006062A1
公开(公告)日：2012-01-12
申请号：PCT/US2011/042124
申请日：2011-06-28
申请人： MARVELL WORLD TRADE LTD. , LEE, Chi Kong , AU, Siu-Hung Fred , PARK, Jungil , SHIN, Hyunsuk
发明人： LEE, Chi Kong , AU, Siu-Hung Fred , PARK, Jungil , SHIN, Hyunsuk
IPC分类号： G06F13/16 , G11C7/00
CPC分类号： G06F12/0246 , G06F13/1668 , G06F2212/7201
摘要： A control system includes a control module ( 27 ) configured to control data transfer events of blocks of data between an interface management module ( 50 ) and a non-volatile semiconductor memory ( 28 ) based on at least two descriptors ( 84 ) for each one of the data transfer events. The non-volatile semiconductor memory is prepared for a read event or a program event of the data transfer event. The interface management module and the non-volatile semiconductor memory are configured to operate within a solid-state memory drive ( 14 ). A command management module ( 60 ) is configured to generate a parameter signal based on the at least two descriptors. The interface management module is configured to generate instruction signals ( 102 ) based on the parameter signal and transmit the instruction signals to the non-volatile semiconductor memory to perform the read event or the program event.
摘要翻译：控制系统包括控制模块（27），其被配置为基于至少两个描述符（84）来控制在接口管理模块（50）和非易失性半导体存储器（28）之间的数据块的数据传输事件的数据传输事件。准备非易失性半导体存储器用于数据传输事件的读取事件或程序事件。接口管理模块和非易失性半导体存储器被配置为在固态存储器驱动器（14）内操作。命令管理模块（60）被配置为基于所述至少两个描述符生成参数信号。接口管理模块被配置为基于参数信号产生指令信号（102），并将指令信号发送到非易失性半导体存储器以执行读取事件或程序事件。

4. 发明申请

WO2012087971A2 DESCRIPTOR SCHEDULER 审中-公开
公开(公告)号：WO2012087971A2
公开(公告)日：2012-06-28
申请号：PCT/US2011/065913
申请日：2011-12-19
申请人： MARVELL WORLD TRADE LTD. , LEE, Chi Kong , AU, Siu-Hung Fred , PARK, Jungil , SHIN, Hyunsuk
发明人： LEE, Chi Kong , AU, Siu-Hung Fred , PARK, Jungil , SHIN, Hyunsuk
IPC分类号： G06F9/48
CPC分类号： G06F3/0613 , G06F3/0659 , G06F3/068 , G06F3/0688
摘要： Methods, systems and computer program products for providing a sequencer that schedules job descriptors are described. The sequencer can manage the scheduling of the job descriptors for execution based on the availability of their respective segments and channels. For example, the sequencer can check the status of the segments, and identify one or more segments that are in busy or full state, or one or more segments that are in non-busy or empty state. Based on the status check, the sequencer can execute job descriptors out of order, and in particular, give priorities to job descriptors whose associated segments are available over job descriptors whose associated segments are in busy or full state. In doing so, pending job descriptors can be processed quicker and unnecessary latency can be avoided.
摘要翻译：描述了用于提供排序作业描述符的排序器的方法，系统和计算机程序产品。定序器可以根据各自片段和通道的可用性来管理作业描述符的调度以供执行。例如，定序器可以检查段的状态，并识别处于繁忙或满状态的一个或多个段或处于非忙或空状态的一个或多个段。基于状态检查，序列发生器可以不按顺序执行作业描述符，并且特别给作业描述符赋予优先级，其作业描述符的相关段可在相关段处于繁忙或满状态的作业描述符上可用。这样做可以更快地处理待处理的作业描述符，避免不必要的延迟。

5. 发明公开

EP2656216A2 DESCRIPTOR SCHEDULER 有权转让
标题翻译：流控制的描述符
公开(公告)号：EP2656216A2
公开(公告)日：2013-10-30
申请号：EP11811236.6
申请日：2011-12-19
申请人： Marvell World Trade Ltd.
发明人： LEE, Chi Kong , AU, Siu-Hung Fred , PARK, Jungil , SHIN, Hyunsuk
IPC分类号： G06F9/48
CPC分类号： G06F3/0613 , G06F3/0659 , G06F3/068 , G06F3/0688
摘要： Methods, systems and computer program products for providing a sequencer that schedules job descriptors are described. The sequencer can manage the scheduling of the job descriptors for execution based on the availability of their respective segments and channels. For example, the sequencer can check the status of the segments, and identify one or more segments that are in busy or full state, or one or more segments that are in non-busy or empty state. Based on the status check, the sequencer can execute job descriptors out of order, and in particular, give priorities to job descriptors whose associated segments are available over job descriptors whose associated segments are in busy or full state.

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