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1. 发明专利

JP2011227988A Circuit, architecture, device, system, algorithm, method and software for making optimum power comparison associated with recording of optical disk 有权
标题翻译：电路，结构，器件，系统，算法，方法和软件，用于制作与光盘相关的最佳功率比较
公开(公告)号：JP2011227988A
公开(公告)日：2011-11-10
申请号：JP2011148140
申请日：2011-07-04
申请人： Marvell World Trade Ltd , マーベルワールドトレードリミテッド
发明人： SUTARDJA PANTAS , WILLIAM R ROWLAND JR
IPC分类号： G11B7/0045 , G11B7/125 , G11B20/10 , G11B20/18
CPC分类号： G11B20/10009 , G11B7/1267 , G11B20/1217 , G11B2020/1275 , G11B2220/2537
摘要： PROBLEM TO BE SOLVED: To provide a circuit, an architecture, a device, a system, an algorithm, a method, and software for making optimum power comparison associated with recording of an optical disk.SOLUTION: The present invention relates to a method, software, and device for calibrating write characteristics associated with writing to an optical storage medium. Further, the present invention discloses a method for encoding calibration pattern data and calibration instructions. The method for calibration normally comprises the steps of: (a) receiving pattern data and instructions synchronized with the pattern data; (b) writing the pattern data to the optical storage medium according to an instruction; (c) reading a read-back signal corresponding to the pattern data out of the optical storage medium; (d) processing the read-back signal according to an instruction; and (e) determining values of write characteristics of writing of data to the optical storage medium based upon at least the read-back signal.
摘要翻译：要解决的问题：提供与光盘的记录相关联的用于进行最佳功率比较的电路，架构，设备，系统，算法，方法和软件。解决方案：本发明涉及用于校准与光存储介质的写入相关联的写特性的方法，软件和装置。此外，本发明公开了一种用于编码校准图案数据和校准指令的方法。校准方法通常包括以下步骤：（a）接收与模式数据同步的模式数据和指令; （b）根据指令将图案数据写入光存储介质; （c）从所述光存储介质读出对应于所述图案数据的读回信号; （d）根据指令处理所述读回信号; 以及（e）至少基于所述读回信号来确定向所述光存储介质写入数据的写入特性的值。版权所有（C）2012，JPO＆INPIT

2. 发明专利

JP2013239233A Integrated circuit and apparatus 有权
标题翻译：集成电路和设备
公开(公告)号：JP2013239233A
公开(公告)日：2013-11-28
申请号：JP2013161466
申请日：2013-08-02
申请人： Marvell World Trade Ltd , マーベルワールドトレードリミテッド
发明人： SUTARDJA PANTAS
IPC分类号： G11C16/06 , G11C16/02 , G11C16/04
CPC分类号： G11C7/1048 , G11C16/0491 , G11C16/08 , G11C16/24 , G11C2207/002
摘要： PROBLEM TO BE SOLVED: To provide control devices and a control module in a bit line decoder for sensing states of memory cells of a memory array.SOLUTION: The control devices selectively communicate with bit lines. The control devices are arranged in a multi-level configuration having a plurality of levels, each level having more than one of the control devices. The control module selects from the bit lines a first bit line and a second bit line associated with a memory cell located in the memory array when determining a state of the memory cell. The control module generates first control signals that deselect one or more of the control devices at each level. When one or more control devices at each level are deselected, a first group of the bit lines including the first bit line is charged to a first potential, and a second group of the bit lines including the second bit line is charged to a second potential.
摘要翻译：要解决的问题：在位线解码器中提供控制装置和控制模块，用于感测存储器阵列的存储单元的状态。解决方案：控制装置选择性地与位线通信。控制装置布置成具有多个级别的多级配置，每个级别具有多于一个的控制装置。当确定存储器单元的状态时，控制模块从位线中选择与位于存储器阵列中的存储单元相关联的第一位线和第二位线。控制模块产生在每个级别取消选择一个或多个控制装置的第一控制信号。当取消选择每个级别的一个或多个控制装置时，包括第一位线的第一组位线被充电到第一电位，并且包括第二位线的第二组位线被充电到第二电位。

3. 发明专利

JP2007087567A Automatic write strategy calibration method for optical drive 审中-公开
标题翻译：自动写入策略光学驱动校准方法
公开(公告)号：JP2007087567A
公开(公告)日：2007-04-05
申请号：JP2006231162
申请日：2006-08-28
申请人： Marvell World Trade Ltd , マーベルワールドトレードリミテッド
发明人： SUTARDJA PANTAS
IPC分类号： G11B7/0045 , G11B7/125
CPC分类号： G11B7/00456 , G11B7/1267
摘要： PROBLEM TO BE SOLVED: To provide a system for calibrating accurately write strategy for an optical medium. SOLUTION: The write strategy calibration system for optical media playback device comprises a memory for storing a write strategy table. A control module generates a write signal to write a training pattern to an optical storage medium according to calibration data stored in the write strategy table. A write strategy analysis module receives a read signal indicative of the training pattern written to the optical storage medium, and adjusts the calibration data according to the read signal. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供用于校准光学介质的准确写入策略的系统。解决方案：用于光学介质回放设备的写入策略校准系统包括用于存储写入策略表的存储器。控制模块根据存储在写入策略表中的校准数据生成写入信号以将训练模式写入光学存储介质。写入策略分析模块接收指示写入光存储介质的训练模式的读取信号，并根据读取的信号调整校准数据。版权所有（C）2007，JPO＆INPIT

4. 发明专利

JP2005183929A Self-repairable semiconductor and its method 有权
标题翻译：自修复半导体及其方法
公开(公告)号：JP2005183929A
公开(公告)日：2005-07-07
申请号：JP2004264756
申请日：2004-09-10
申请人： Marvell World Trade Ltd , マーベルワールドトレードリミテッド
发明人： SUTARDJA SEHAT , SUTARDJA PANTAS , LO WILLIAM
IPC分类号： H01L21/822 , G06F11/20 , H01L21/00 , H01L21/66 , H01L21/82 , H01L27/00 , H01L27/04 , H03K19/177
CPC分类号： G01R31/317 , G01R31/31718 , G01R31/3172 , G11C29/848 , H01L22/22 , H01L2924/0002 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a self-repairable semiconductor equipped with multi function units. SOLUTION: The self-repairable semiconductor is equipped with multi function units which perform the same function and have an auxiliary function unit. The semiconductor is equipped with one or more perfect or partial spare function units, when a defect of the auxiliary function unit which is accumulated to form the semiconductor is detected, its auxiliary function unit is changed so as to be replaced with an auxiliary function unit in a perfect or partial spare function unit. The reconfiguration is realized by a switching device related to the auxiliary function unit. The defective function unit or auxiliary function unit may be periodically detected in operation and/or may be detected manually while a power source is connected after assembling. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供一种配备有多功能单元的自修复半导体。
解决方案：可自修复半导体配备有执行相同功能并具有辅助功能单元的多功能单元。半导体配备有一个或多个完全或部分备用功能单元，当检测到累积以形成半导体的辅助功能单元的缺陷时，其辅助功能单元被改变以便被替换为辅助功能单元完美或部分备用功能单元。重新配置由与辅助功能单元相关的开关装置实现。在操作中可以周期性地检测故障功能单元或辅助功能单元，和/或可以在组装之后连接电源时手动检测。版权所有（C）2005，JPO＆NCIPI

5. 发明专利

JP2004214619A Semiconductor capable of correcting itself and its operating method 审中-公开
公开(公告)号：JP2004214619A
公开(公告)日：2004-07-29
申请号：JP2003380433
申请日：2003-11-10
申请人： Marvell World Trade Ltd , マーベルワールドトレードリミテッド
发明人： SUTARDJA SEHAT , SUTARDJA PANTAS
IPC分类号： H01L27/04 , G11C29/00 , H01L21/66 , H01L21/82 , H01L21/822 , H03K19/00
CPC分类号： H01L22/22 , G06F11/2028 , G06F11/2038 , G06F11/2051 , G11C29/848 , H01L2924/0002 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor which is equipped with many functional units implementing the same function and capable of correcting itself. SOLUTION: The self-correctable semiconductor includes many functional units which implement the same function and include subordinate functional units. The semiconductor includes one or more wholly or partially preliminary functional units deposited on the semiconductor. When a defect of a subordinate functional unit is detected, the subordinate functional unit is replaced with a subordinate functional unit among the wholly or partially preliminary functional units. Reconstitution is embodied by a device which is related to the subordinate functional unit. The defective function or subordinate functional unit can be detected after assembly, in power driving, in cyclic operation, and/or manually. COPYRIGHT: (C)2004,JPO&NCIPI

6. 发明专利

JP2013152780A Threshold voltage digitizer for array of programmable threshold transistors 有权
标题翻译：用于阵列可编程晶体管的阈值电压数字
公开(公告)号：JP2013152780A
公开(公告)日：2013-08-08
申请号：JP2013083911
申请日：2013-04-12
申请人： Marvell World Trade Ltd , マーベルワールドトレードリミテッド
发明人： SUTARDJA PANTAS
IPC分类号： G11C16/06 , G11C16/02 , G11C27/00 , G11C29/12
CPC分类号： G11C11/5628 , G11C7/10 , G11C7/1006 , G11C7/16 , G11C8/08 , G11C11/56 , G11C16/04 , G11C16/06 , G11C16/26 , G11C16/32 , G11C29/02 , G11C29/026 , G11C29/028 , G11C2029/5002 , G11C2211/5634 , G11C2211/5644
摘要： PROBLEM TO BE SOLVED: To reduce read time of high resolution memory devices.SOLUTION: A system comprises a voltage generator, current sensing amplifiers, and a control module. The voltage generator outputs a first voltage, which is generated based on received codewords, to a first word line connected with N transistors each having programmable threshold voltages, where N is an integer greater than 1. The current sensing amplifiers sense currents through the N transistors via N bit lines, respectively, and generate control signals when a current through a corresponding one of the N transistors is greater than or equal to a predetermined current. The control module generates measured values of the threshold voltages of the N transistors by compensating each of the codewords on the basis of at least one of positions of the corresponding ones of the N transistors and a temperature.
摘要翻译：要解决的问题：减少高分辨率存储器件的读取时间。解决方案：系统包括电压发生器，电流感测放大器和控制模块。电压发生器将基于接收到的码字产生的第一电压输出到与具有可编程阈值电压的N个晶体管连接的第一字线，其中N是大于1的整数。电流感测放大器通过N个晶体管感测电流分别通过N位线，并且当通过N个晶体管中的相应一个电流的电流大于或等于预定电流时，产生控制信号。控制模块通过基于N个晶体管中的至少一个的位置和温度补偿每个码字来产生N个晶体管的阈值电压的测量值。

7. 发明专利

JP2012119713A Self-reparable semiconductor and system including self-reparable semiconductor 有权
标题翻译：自恢复半导体和系统，包括自恢复半导体
公开(公告)号：JP2012119713A
公开(公告)日：2012-06-21
申请号：JP2012019133
申请日：2012-01-31
申请人： Marvell World Trade Ltd , マーベルワールドトレードリミテッド
发明人： SUTARDJA SEHAT , SUTARDJA PANTAS , WILLIAM LAW
IPC分类号： H01L21/82 , H01L21/822 , G06F11/20 , H01L21/00 , H01L21/66 , H01L27/00 , H01L27/04 , H03K19/173 , H03K19/177
CPC分类号： G01R31/317 , G01R31/31718 , G01R31/3172 , G11C29/848 , H01L22/22 , H01L2924/0002 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a self-reparable semiconductor capable of improving a yield.SOLUTION: The self-reparable semiconductor includes multiple functional units that execute the same function and that include sub-functional units. The semiconductor includes one or more complete or partial spare functional units, and the spare functional units are integrated into the semiconductor. When a defect in a sub-functional unit is detected, the sub-functional unit is switched out and replaced with a sub-functional unit in the complete or partial spare functional unit. The reconfiguration is realized with switching devices associated with the sub-functional units. Defective functional units or sub-functional units can be detected after assembly, during power supply, periodically during operation, and/or manually.
摘要翻译：要解决的问题：提供能够提高产率的自修复半导体。解决方案：自修复半导体包括执行相同功能并且包括子功能单元的多个功能单元。半导体包括一个或多个完整或部分备用功能单元，并且备用功能单元集成到半导体中。当检测到子功能单元中的缺陷时，子功能单元被切换，并被完全或部分备用功能单元中的子功能单元替换。通过与子功能单元相关联的切换设备实现重新配置。功能单元或子功能单元可能在组装，电源供应，运行期间和/或手动期间被检测到。版权所有（C）2012，JPO＆INPIT

8. 发明专利

JP2012043525A Automatic write strategy calibration method for optical drive 有权
标题翻译：自动写入策略光学驱动校准方法
公开(公告)号：JP2012043525A
公开(公告)日：2012-03-01
申请号：JP2011184882
申请日：2011-08-26
申请人： Marvell World Trade Ltd , マーベルワールドトレードリミテッド
发明人： SUTARDJA PANTAS
IPC分类号： G11B7/0045 , G11B7/125 , G11B7/1263 , G11B7/1267
CPC分类号： G11B7/00456 , G11B7/1267
摘要： PROBLEM TO BE SOLVED: To provide an automatic write strategy calibration system for an optical drive, and an optical media playback device.SOLUTION: A write strategy calibration system for an optical media playback device 50 comprises a memory for storing a write strategy table. A control module generates a write signal to write a training pattern to an optical storage medium 70 according to calibration data stored in the write strategy table. A write strategy analysis module 120 receives a read signal indicative of the training pattern written to the optical storage medium 70, and adjusts the calibration data according to the read signal.
摘要翻译：要解决的问题：提供一种用于光驱的自动写入策略校准系统和光学媒体回放设备。解决方案：用于光学介质回放设备50的写入策略校准系统包括用于存储写入策略表的存储器。控制模块根据存储在写入策略表中的校准数据产生写入信号以将训练模式写入光学存储介质70。写策略分析模块120接收指示写入光存储介质70的训练模式的读信号，并根据读信号调整校准数据。版权所有（C）2012，JPO＆INPIT

9. 发明专利

JP2007226942A Testing storage system electronics using loopback 审中-公开
标题翻译：使用回波测试存储系统电子
公开(公告)号：JP2007226942A
公开(公告)日：2007-09-06
申请号：JP2007008412
申请日：2007-01-17
申请人： Marvell World Trade Ltd , マーベルワールドトレードリミテッド
发明人： SUTARDJA PANTAS
IPC分类号： G11B20/18
CPC分类号： G11B27/36 , G11B2220/2516
摘要： PROBLEM TO BE SOLVED: To provide an internal testing system (inspection) for an electronic device and a sub-system in a hard disk system.
SOLUTION: A system 60 is provided with a hard disk controller (HDC) module 37 controlling the hard disk and a read channel (RC) device 25 communicating with the HDC module 37 via a read bus and a write bus.The RC device 25 has a loopback circuit looping back selectively the write bus to the read bus. The RC device generates a write clock for the HDC module 37 to write data on the write bus and a read clock for the HDC module 37 to read the data on the read bus. The write clock is independent of the read clock.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：为硬盘系统中的电子设备和子系统提供内部测试系统（检查）。解决方案：系统60设置有控制硬盘的硬盘控制器（HDC）模块37和经由读总线和写总线与HDC模块37通信的读通道（RC）设备25。器件25具有环回电路，用于将写总线选择性地回路到读总线。 RC装置产生用于HDC模块37的写入时钟，以写入总线上的数据和HDC模块37的读取时钟来读取读取总线上的数据。写时钟与读时钟无关。版权所有（C）2007，JPO＆INPIT

10. 发明专利

DE602004027592D1 Selbstreparierender Halbleiter 未知
公开(公告)号：DE602004027592D1
公开(公告)日：2010-07-22
申请号：DE602004027592
申请日：2004-09-01
申请人： MARVELL WORLD TRADE LTD
发明人： SUTARDJA SEHAT , SUTARDJA PANTAS , LO WILLIAM
IPC分类号： G06F11/20 , H01L21/66

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