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    • 3. 发明授权
    • Method for drying veneers
    • 干燥单板的方法
    • US07383643B2
    • 2008-06-10
    • US11088226
    • 2005-03-23
    • Timothy BlankenshipJunius HimesBrent LillesandJames ToddEdward Constantine
    • Timothy BlankenshipJunius HimesBrent LillesandJames ToddEdward Constantine
    • F26B5/04
    • F26B5/048F26B5/045F26B9/066F26B2210/14
    • An apparatus and method is provided to dry veneer or other items by vaporization of moisture in the item. Apparatus has an insulated chamber with a frame and a drawer with a door. A mesh surface of the drawer supports item for drying with a heater at sub-atmospheric pressure inside of the chamber. Item is placed on the layer of mesh of the drawer of the apparatus and secured with fasteners such as another layer of mesh. The drawer with fastened item is placed into the chamber of the apparatus. With the drawer fully engaged within the chamber, the drying apparatus is closed with an airtight seal. A pump draws a vacuum in the chamber and heat is directed at the item to raise the temperature of the item to less than 160° F., particularly between 120° F. to 150° F. Apparatus can dry veneer in less than five minutes.
    • 提供了一种装置和方法,用于通过物品中的水分蒸发来干燥胶合板或其它物品。 设备具有带框架的绝缘室和带门的抽屉。 抽屉的网眼表面支撑用于在室内的低于大气压的加热器干燥的物品。 将物品放置在设备的抽屉的网格层上,并用诸如另一层网的紧固件固定。 带有紧固件的抽屉放置在设备的室内。 当抽屉完全接合在室内时,干燥装置用气密密封封闭。 泵在室内抽真空,热量指向物品,以将物品的温度升高至小于160°F,特别是120°F至150°F。设备可在不到五分钟内干燥单板 。
    • 8. 发明授权
    • Innovative method to build a high precision analog capacitor with low voltage coefficient and hysteresis
    • 建立低电压系数和滞后的高精度模拟电容的创新方法
    • US06706635B2
    • 2004-03-16
    • US10163450
    • 2002-06-05
    • Imran M. KhanWilliam E. NehrerJames ToddWeidong TianLouis N. Hutter
    • Imran M. KhanWilliam E. NehrerJames ToddWeidong TianLouis N. Hutter
    • H01L21302
    • H01L28/60H01L21/3212H01L21/76838H01L27/0805
    • The present invention relates to a method for forming an anlog capacitor on a semiconductor substrate. The method comprises forming a field oxide over a portion of the substrate, and forming a polysilicon layer over the field oxide layer, and subsequently forming a silicide over the polysilicon layer. A first interlayer dielectric layer is formed over the substrate, and a capacitor masking pattern is formed. The first interlayer dielectric is etched using the capacitor masking pattern as a mask and the silicide layer as an etch stop, and a thin dielectric is formed over the substrate. A contact masking pattern is formed over the substrate, and a subsequent etch is performed on the thin dielectric and the first interlayer dielectric using the silicide and substrate as an etch stop. A metal layer is deposited over the substrate, and is subsequently planarized, thereby defining an analog capacitor.
    • 本发明涉及一种在半导体衬底上形成anlog电容器的方法。 该方法包括在衬底的一部分上形成场氧化物,并在场氧化物层上形成多晶硅层,随后在多晶硅层上形成硅化物。 在衬底上形成第一层间电介质层,形成电容器屏蔽图案。 使用电容器掩模图案作为掩模蚀刻第一层间电介质,并且将硅化物层作为蚀刻停止层,并在衬底上形成薄的电介质。 在衬底上形成接触掩模图案,并且使用硅化物和衬底作为蚀刻停止层,在薄电介质和第一层间电介质上进行随后的蚀刻。 金属层沉积在衬底上,随后被平坦化,从而限定模拟电容器。