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1. 发明申请

US20050154916A1 Intrusion detection using a network processor and a parallel pattern detection engine 有权
标题翻译：使用网络处理器和并行模式检测引擎的入侵检测
公开(公告)号：US20050154916A1
公开(公告)日：2005-07-14
申请号：US10756904
申请日：2004-01-14
申请人： Marc Boulanger , Clark Jeffries , C. Kinard , Kerry Kravec , Ravinder Sabhikhi , Ali Saidi , Jan Slyfield , Pascal Tannhof
发明人： Marc Boulanger , Clark Jeffries , C. Kinard , Kerry Kravec , Ravinder Sabhikhi , Ali Saidi , Jan Slyfield , Pascal Tannhof
IPC分类号： H04L9/00 , H04L12/24 , H04L29/06
CPC分类号： H04L63/1416 , H04L63/1441
摘要： An intrusion detection system (IDS) comprises a network processor (NP) coupled to a memory unit for storing programs and data. The NP is also coupled to one or more parallel pattern detection engines (PPDE) which provide high speed parallel detection of patterns in an input data stream. Each PPDE comprises many processing units (PUs) each designed to store intrusion signatures as a sequence of data with selected operation codes. The PUs have configuration registers for selecting modes of pattern recognition. Each PU compares a byte at each clock cycle. If a sequence of bytes from the input pattern match a stored pattern, the identification of the PU detecting the pattern is outputted with any applicable comparison data. By storing intrusion signatures in many parallel PUs, the IDS can process network data at the NP processing speed. PUs may be cascaded to increase intrusion coverage or to detect long intrusion signatures.
摘要翻译：入侵检测系统（IDS）包括耦合到用于存储程序和数据的存储器单元的网络处理器（NP）。 NP还耦合到一个或多个并行模式检测引擎（PPDE），其提供对输入数据流中的模式的高速并行检测。每个PPDE包括许多处理单元（PU），每个处理单元被设计为将入侵签名存储为具有所选操作码的数据序列。 PU具有用于选择模式识别模式的配置寄存器。每个PU在每个时钟周期比较一个字节。如果来自输入模式的字节序列与存储的模式匹配，则用任何适用的比较数据输出检测模式的PU的识别。通过在多个并行PU中存储入侵签名，IDS可以以NP处理速度处理网络数据。 PU可以级联以增加入侵覆盖或检测长入侵签名。

2. 发明申请

US20050154802A1 Parallel pattern detection engine 有权
标题翻译：并行模式检测引擎
公开(公告)号：US20050154802A1
公开(公告)日：2005-07-14
申请号：US10757187
申请日：2004-01-14
申请人： Kerry Kravec , Ali Saidi , Jan Slyfield , Pascal Tannhof
发明人： Kerry Kravec , Ali Saidi , Jan Slyfield , Pascal Tannhof
IPC分类号： G06F3/00 , G06K9/00 , G06K9/64
CPC分类号： G06K9/6202 , G06K9/00986
摘要： A parallel pattern detection engine (PPDE) comprise multiple processing units (PUs) customized to do various modes of pattern recognition. The PUs are loaded with different patterns and the input data to be matched is provided to the PUs in parallel. Each pattern has an Opcode that defines what action to take when a particular data in the input data stream either matches or does not match the corresponding data being compared during a clock cycle. Each of the PUs communicate selected information so that PUs may be cascaded to enable longer patterns to be matched or to allow more patterns to be processed in parallel for a particular input data stream.
摘要翻译：并行模式检测引擎（PPDE）包括定制的多个处理单元（PU），以执行各种模式识别模式。 PU装载有不同的图案，并且要匹配的输入数据并行提供给PU。每个模式都有一个操作码，定义当输入数据流中的特定数据与时钟周期中正在比较的对应数据匹配或不匹配时要执行的操作。每个PU通信所选择的信息，使得PU可以被级联以使得能够匹配更长的模式或允许针对特定的输入数据流并行地处理更多的模式。

3. 发明申请

US20070150621A1 Parallel Pattern Detection Engine 有权
公开(公告)号：US20070150621A1
公开(公告)日：2007-06-28
申请号：US11682547
申请日：2007-03-06
申请人： Kerry Kravec , Ali Saidi , Jan Slyfield , Pascal Tannhof
发明人： Kerry Kravec , Ali Saidi , Jan Slyfield , Pascal Tannhof
IPC分类号： G06F3/00
CPC分类号： G06K9/6202 , G06K9/00986
摘要： A parallel pattern detection engine (PPDE) comprise multiple processing units (PUs) customized to do various modes of pattern recognition. The PUs are loaded with different patterns and the input data to be matched is provided to the PUs in parallel. Each pattern has an Opcode that defines what action to take when a particular data in the input data stream either matches or does not match the corresponding data being compared during a clock cycle. Each of the PUs communicate selected information so that PUs may be cascaded to enable longer patterns to be matched or to allow more patterns to be processed in parallel for a particular input data stream.

4. 发明申请

US20070150622A1 Parallel Pattern Detection Engine 有权
标题翻译：并行模式检测引擎
公开(公告)号：US20070150622A1
公开(公告)日：2007-06-28
申请号：US11682576
申请日：2007-03-06
申请人： Kerry Kravec , Ali Saidi , Jan Slyfield , Pascal Tannhof
发明人： Kerry Kravec , Ali Saidi , Jan Slyfield , Pascal Tannhof
IPC分类号： G06F3/00
CPC分类号： G06K9/6202 , G06K9/00986
摘要： A parallel pattern detection engine (PPDE) comprise multiple processing units (PUs) customized to do various modes of pattern recognition. The PUs are loaded with different patterns and the input data to be matched is provided to the PUs in parallel. Each pattern has an Opcode that defines what action to take when a particular data in the input data stream either matches or does not match the corresponding data being compared during a clock cycle. Each of the PUs communicate selected information so that PUs may be cascaded to enable longer patterns to be matched or to allow more patterns to be processed in parallel for a particular input data stream.
摘要翻译：并行模式检测引擎（PPDE）包括定制的多个处理单元（PU），以执行各种模式识别模式。 PU装载有不同的图案，并且要匹配的输入数据并行提供给PU。每个模式都有一个操作码，定义当输入数据流中的特定数据与时钟周期中正在比较的对应数据匹配或不匹配时要执行的操作。每个PU通信所选择的信息，使得PU可以被级联以使得能够匹配更长的模式或允许针对特定的输入数据流并行地处理更多的模式。

5. 发明申请

US20050154858A1 Configurable bi-directional bus for communicating between autonomous units 失效
标题翻译：可配置双向总线，用于在自主单元之间进行通信
公开(公告)号：US20050154858A1
公开(公告)日：2005-07-14
申请号：US10757673
申请日：2004-01-14
申请人： Kerry Kravec , Ali Saidi , Jan Slyfield , Pascal Tannhof
发明人： Kerry Kravec , Ali Saidi , Jan Slyfield , Pascal Tannhof
IPC分类号： G06F13/40 , G06F15/00
CPC分类号： G06F13/4027
摘要： Processing units (PUs) are coupled with a gated bi-directional bus structure that allows the PUs to be cascaded. Each PUn has communication logic and function logic. Each PUn is physically coupled to two other PUs, a PUp and a PUf. The communication logic receives Link Out data from a PUp and sends Link In data to a PUf. The communication logic has register bits for enabling and disabling the data transmission. The communication logic couples the Link Out data from a PUp to the function logic and couples Link In data to the PUp from the function logic in response to the register bits. The function logic receives output data from the PUn and Link In data from the communication logic and forms Link Out data which is coupled to the PUf. The function logic couples Link In data from the PUf to the PUn and to the communication logic.
摘要翻译：处理单元（PU）与门控双向总线结构耦合，允许将PU级联。每个PUn具有通信逻辑和功能逻辑。每个PUn物理耦合到另外两个PU，PUp和PUf。通信逻辑从PUp接收Link Out数据，并将Link In数据发送到PUf。通信逻辑具有用于启用和禁用数据传输的寄存器位。通信逻辑将链路输出数据从PUp耦合到功能逻辑，并且响应于寄存器位将Link In数据从功能逻辑耦合到PUp。功能逻辑从通信逻辑的PUn和Link In数据接收输出数据，并形成耦合到PUf的Link Out数据。功能逻辑将来自PUf的链接数据耦合到PUn和通信逻辑。

6. 发明申请

US20070150623A1 Parallel Pattern Detection Engine 审中-公开
公开(公告)号：US20070150623A1
公开(公告)日：2007-06-28
申请号：US11682623
申请日：2007-03-06
申请人： Kerry Kravec , Ali Saidi , Jan Styfield , Pascal Tannhof
发明人： Kerry Kravec , Ali Saidi , Jan Styfield , Pascal Tannhof
IPC分类号： G06F3/00
CPC分类号： G06K9/6202 , G06K9/00986
摘要： A parallel pattern detection engine (PPDE) comprise multiple processing units (PUs) customized to do various modes of pattern recognition. The PUs are loaded with different patterns and the input data to be matched is provided to the PUs in parallel. Each pattern has an Opcode that defines what action to take when a particular data in the input data stream either matches or does not match the corresponding data being compared during a clock cycle. Each of the PUs communicate selected information so that PUs may be cascaded to enable longer patterns to be matched or to allow more patterns to be processed in parallel for a particular input data stream.

7. 发明授权

US10317306B2 Systems and methods for detecting and controlling leaks 有权
公开(公告)号：US10317306B2
公开(公告)日：2019-06-11
申请号：US15467171
申请日：2017-03-23
申请人： Ali Saidi
发明人： Ali Saidi
IPC分类号： G01M3/26 , G05D7/06 , G05B23/02
摘要： Systems and methods for detecting and controlling leaks via analysis of substance flow data. A leak management system including a processor that receives substance flow data from a plurality of substance flow sensors, analyzes the substance flow data to identify at least one discrepancy within said substance flow data, and transmits at least one alert and/or takes preventative or corrective action upon identification of said at least one discrepancy. In one aspect, identifying said at least one discrepancy includes identifying a predetermined difference between the value read at the primary one of the plurality of substance flow sensors and the sum of all values read at all of the secondary ones of the plurality of substance flow sensors, wherein the predetermined difference accounts for a margin of error. Flow sensors may be recharged by the flow of the substance through the sensor.

8. 发明授权

US5598179A Method and apparatus for driving electronic displays 失效
公开(公告)号：US5598179A
公开(公告)日：1997-01-28
申请号：US75943
申请日：1993-06-14
申请人： Noah Orlen , Ali Saidi
发明人： Noah Orlen , Ali Saidi
IPC分类号： G09G3/36
CPC分类号： G09G3/3625
摘要： A processing system (500) addresses an electronic display (100) comprising picture elements (pixels) (108) controlled by a plurality of first and second electrodes (106, 104). The plurality of first electrodes (106) are controlled by a plurality of periodic first drive signals (400) having a predetermined number of time slots independent of data being displayed. The plurality of second electrodes (104) are controlled by a plurality of second drive signals responsive of the data being displayed. The processing system (500) comprises calculating engine (610, 612) calculating from data being received the plurality of second drive signals for one of the plurality of second electrodes (104) for a time slot of the predetermined number of time slots. The calculating engine (610, 612) calculates one of the plurality of drive signals for the one of the plurality of second electrodes (104) as a function of the plurality of periodic first drive signals (400) for the time slot and a selected plurality of pixel values for pixels collectively controlled by the one of the plurality of second electrodes. The calculating engine (610, 612) represents the plurality of periodic first drive signals as a sequency-ordered Walsh-Hadamard transform (WHT) matrix (300) having a number of rows corresponding to the plurality of first electrodes (106) and a number of columns corresponding to the predetermined number of time slots (410-412). An identifier (510) identifies a plurality of hierarchical tree structures (Rows 1-8) corresponding to the WHT matrix (300) representation of the plurality of periodic first drive signals (400). An encoder (1504) encodes the data. A processor processes (510) the encoded data and the hierarchical tree structures (Rows 1-8) identified in the WHT matrix (300) for addressing of the pixels (108) of the electronic display (100).

9. 发明申请

US20180275011A1 Systems And Methods For Detecting And Controlling Leaks 审中-公开
公开(公告)号：US20180275011A1
公开(公告)日：2018-09-27
申请号：US15467171
申请日：2017-03-23
申请人： Ali Saidi
发明人： Ali Saidi
IPC分类号： G01M3/26 , G05D7/06 , G05B23/02
CPC分类号： G01M3/26 , G05B23/0289 , G05D7/0635
摘要： Systems and methods for detecting and controlling leaks via analysis of substance flow data. A leak management system including a processor that receives substance flow data from a plurality of substance flow sensors, analyzes the substance flow data to identify at least one discrepancy within said substance flow data, and transmits at least one alert and/or takes preventative or corrective action upon identification of said at least one discrepancy. In one aspect, identifying said at least one discrepancy includes identifying a predetermined difference between the value read at the primary one of the plurality of substance flow sensors and the sum of all values read at all of the secondary ones of the plurality of substance flow sensors, wherein the predetermined difference accounts for a margin of error. Flow sensors may be recharged by the flow of the substance through the sensor.

10. 发明授权

US07978670B2 Method and apparatus to facilitate bandwidth allocation management in integral combination with memory capacity information 有权
标题翻译：带宽分配管理的方法和装置与存储器容量信息的整体组合
公开(公告)号：US07978670B2
公开(公告)日：2011-07-12
申请号：US11835221
申请日：2007-08-07
申请人： Silviu Chiricescu , Ali Saidi
发明人： Silviu Chiricescu , Ali Saidi
IPC分类号： H04W4/00
CPC分类号： H04W72/1252 , H04W84/18
摘要： A method and apparatus to facilitate managing communications with at least one wireless node (102, 103) having an outbound payload memory in a severely resource-constrained wireless network (100) can provide for a coordinator node (101) for that network providing (201) information regarding remaining capacity of those outbound payload memories and then automatically using (202) that information in integral combination with a bandwidth allocation management process to control allocation of at least one wireless communication resource by which the wireless nodes can transmit items contained in the outbound payload memory.
摘要翻译：一种有助于管理与在严重资源受限无线网络（100）中具有出站有效负载存储器的至少一个无线节点（102,103）的通信的方法和装置可以为该网络提供（201）的协调器节点（101））关于那些出站有效载荷存储器的剩余容量的信息，然后自动地使用（202）与带宽分配管理过程完全组合的信息来控制至少一个无线通信资源的分配，通过该信息无线节点可以发送包含在出站有效载荷记忆

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