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1. 发明申请

US20120282377A1 Methods and Formulations for Inhibiting Degradation of Photosensitive Sweeteners and Sweetener Enhancers 审中-公开
标题翻译：抑制光敏甜味剂和甜味剂增强剂降解的方法和配方
公开(公告)号：US20120282377A1
公开(公告)日：2012-11-08
申请号：US13465919
申请日：2012-05-07
申请人： Mani Upreti , Indra Prakash , Grant Dubois , Ling Ma
发明人： Mani Upreti , Indra Prakash , Grant Dubois , Ling Ma
IPC分类号： A23L3/3517 , B65D81/30 , A23L2/44 , A23L1/236 , A23L2/60
CPC分类号： A23L3/3481 , A23L2/44 , A23L2/60 , A23L27/30 , A23L27/31
摘要： Methods of inhibiting the degradation of a photosensitive sweetener or a sweetness enhancer in a food or beverage formulation, the method comprising adding a photodegradation-inhibiting amount of one or more antioxidants to the food or beverage formulation; and/or packaging the food or beverage formulation in a UV absorbing container are provided. Food or beverage formulations comprising an antioxidant and a photosensitive sweetener or sweetness enhancer, and/or that is packaged in a UV absorbing package or dark-colored package are also provided.
摘要翻译：抑制食品或饮料配方中感光甜味剂或甜味增强剂降解的方法，该方法包括向食品或饮料配方中加入光降解抑制量的一种或多种抗氧化剂; 和/或将食品或饮料制剂包装在紫外线吸收容器中。还提供了包含抗氧化剂和感光甜味剂或甜味增强剂的食品或饮料制剂，和/或包装在UV吸收包装或深色包装中的食品或饮料制剂。

2. 发明授权

US08698232B2 Semiconductor device including a voltage controlled termination structure and method for fabricating same 有权
标题翻译：包括电压控制终端结构的半导体器件及其制造方法
公开(公告)号：US08698232B2
公开(公告)日：2014-04-15
申请号：US12655668
申请日：2010-01-04
申请人： Aram Arzumanyan , Timothy D. Henson , Ling Ma
发明人： Aram Arzumanyan , Timothy D. Henson , Ling Ma
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/7811 , H01L29/407 , H01L29/66734 , H01L29/7813
摘要： According to one embodiment, a semiconductor device including a voltage controlled termination structure comprises an active area including a base region of a first conductivity type formed in a semiconductor body of a second conductivity type formed over a first major surface of a substrate of the second conductivity type, a termination region formed in the semiconductor body adjacent the active area and including the voltage controlled termination structure. The voltage controlled termination structure includes an electrode electrically connected to a terminal of the semiconductor device. In one embodiment, the electrode of the voltage controlled termination structure is electrically connected to a gate terminal of the semiconductor device. In one embodiment, the electrode of the voltage controlled termination structure is electrically connected to a source terminal of the semiconductor device.
摘要翻译：根据一个实施例，包括电压控制终端结构的半导体器件包括有源区，该有源区包括形成在第二导电类型的半导体本体中的第一导电类型的基极区，形成在第二导电性的衬底的第一主表面上类型，形成在与有源区相邻的半导体本体中并且包括电压控制的端接结构的端接区。电压控制终端结构包括电连接到半导体器件的端子的电极。在一个实施例中，电压控制终端结构的电极电连接到半导体器件的栅极端子。在一个实施例中，电压控制终端结构的电极电连接到半导体器件的源极端子。

3. 发明授权

US08536645B2 Trench MOSFET and method for fabricating same 有权
标题翻译：沟槽MOSFET及其制造方法
公开(公告)号：US08536645B2
公开(公告)日：2013-09-17
申请号：US13031505
申请日：2011-02-21
申请人： Timothy D. Henson , Ling Ma , Hugo Burke , David P. Jones , Martin Carroll
发明人： Timothy D. Henson , Ling Ma , Hugo Burke , David P. Jones , Martin Carroll
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/7813 , H01L29/41766 , H01L29/42376 , H01L29/456 , H01L29/4933 , H01L29/66719 , H01L29/66727 , H01L29/66734
摘要： According to an exemplary embodiment, a trench field-effect transistor (trench FET) includes a trench formed in a semiconductor substrate, the trench including a gate dielectric disposed therein. A source region is disposed adjacent the trench. The trench FET also has a gate electrode including a lower portion disposed in the trench and a proud portion extending laterally over the source region. A silicide source contact can extend vertically along a sidewall of the source region. Also, a portion of the gate dielectric can extend laterally over the semiconductor substrate. The trench FET can further include a silicide gate contact formed over the proud portion of the gate electrode.
摘要翻译：根据示例性实施例，沟槽场效应晶体管（沟槽FET）包括形成在半导体衬底中的沟槽，沟槽包括设置在其中的栅极电介质。源极区域邻近沟槽设置。沟槽FET还具有包括设置在沟槽中的下部的栅电极和在源极区域上横向延伸的骄傲部分。硅化物源接触件可以沿着源极区域的侧壁垂直延伸。此外，栅极电介质的一部分可以在半导体衬底上横向延伸。沟槽FET还可以包括形成在栅电极的骄傲部分上的硅化物栅极接触。

4. 发明申请

US20120211825A1 Trench MOSFET and Method for Fabricating Same 有权
标题翻译：沟槽MOSFET及其制造方法
公开(公告)号：US20120211825A1
公开(公告)日：2012-08-23
申请号：US13031505
申请日：2011-02-21
申请人： Timothy D. Henson , Ling Ma , Hugo Burke , David P. Jones , Martin Carroll
发明人： Timothy D. Henson , Ling Ma , Hugo Burke , David P. Jones , Martin Carroll
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/7813 , H01L29/41766 , H01L29/42376 , H01L29/456 , H01L29/4933 , H01L29/66719 , H01L29/66727 , H01L29/66734
摘要： According to an exemplary embodiment, a trench field-effect transistor (trench FET) includes a trench formed in a semiconductor substrate, the trench including a gate dielectric disposed therein. A source region is disposed adjacent the trench. The trench FET also has a gate electrode including a lower portion disposed in the trench and a proud portion extending laterally over the source region. A silicide source contact can extend vertically along a sidewall of the source region. Also, a portion of the gate dielectric can extend laterally over the semiconductor substrate. The trench FET can further include a silicide gate contact formed over the proud portion of the gate electrode.
摘要翻译：根据示例性实施例，沟槽场效应晶体管（沟槽FET）包括形成在半导体衬底中的沟槽，沟槽包括设置在其中的栅极电介质。源极区域邻近沟槽设置。沟槽FET还具有包括设置在沟槽中的下部的栅电极和在源极区域上横向延伸的骄傲部分。硅化物源接触件可以沿着源极区域的侧壁垂直延伸。此外，栅极电介质的一部分可以在半导体衬底上横向延伸。沟槽FET还可以包括形成在栅电极的骄傲部分上的硅化物栅极接触。

5. 发明授权

US08154105B2 Flip chip semiconductor device and process of its manufacture 有权
标题翻译：倒装芯片半导体器件及其制造工艺
公开(公告)号：US08154105B2
公开(公告)日：2012-04-10
申请号：US11524178
申请日：2006-09-20
申请人： Ling Ma
发明人： Ling Ma
IPC分类号： H01L29/40
CPC分类号： H01L29/7809 , H01L21/76898 , H01L29/0653 , H01L29/41741 , H01L29/41766 , H01L2224/81801 , H01L2924/13091
摘要： A semiconductor die and method of making it are provided. The die includes a first via extending through the entire thickness of the die and a first via electrode disposed inside the via electrically connecting an electrode at a top surface of the die with another electrode disposed at a bottom surface of the die.
摘要翻译：提供半导体管芯及其制造方法。芯片包括延伸穿过芯片的整个厚度的第一通孔和布置在通孔内部的第一通孔电极，电极将模具的顶表面处的电极与设置在管芯的底表面处的另一个电极连接。

6. 发明申请

US20110163373A1 Semiconductor device including a voltage controlled termination structure and method for fabricating same 有权
标题翻译：包括电压控制终端结构的半导体器件及其制造方法
公开(公告)号：US20110163373A1
公开(公告)日：2011-07-07
申请号：US12655668
申请日：2010-01-04
申请人： Aram Arzumanyan , Timothy D. Henson , Ling Ma
发明人： Aram Arzumanyan , Timothy D. Henson , Ling Ma
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/7811 , H01L29/407 , H01L29/66734 , H01L29/7813
摘要： According to one embodiment, a semiconductor device including a voltage controlled termination structure comprises an active area including a base region of a first conductivity type formed in a semiconductor body of a second conductivity type formed over a first major surface of a substrate of the second conductivity type, a termination region formed in the semiconductor body adjacent the active area and including the voltage controlled termination structure. The voltage controlled termination structure includes an electrode electrically connected to a terminal of the semiconductor device. In one embodiment, the electrode of the voltage controlled termination structure is electrically connected to a gate terminal of the semiconductor device. In one embodiment, the electrode of the voltage controlled termination structure is electrically connected to a source terminal of the semiconductor device.
摘要翻译：根据一个实施例，包括电压控制终端结构的半导体器件包括有源区，该有源区包括形成在第二导电类型的半导体本体中的第一导电类型的基极区，形成在第二导电性的衬底的第一主表面上类型，形成在与有源区相邻的半导体本体中并且包括电压控制的端接结构的端接区。电压控制终端结构包括电连接到半导体器件的端子的电极。在一个实施例中，电压控制终端结构的电极电连接到半导体器件的栅极端子。在一个实施例中，电压控制终端结构的电极电连接到半导体器件的源极端子。

7. 发明授权

US07549212B2 Method of adjusting recession of an element of a slider 有权
标题翻译：调整滑块元件的凹陷的方法
公开(公告)号：US07549212B2
公开(公告)日：2009-06-23
申请号：US11685429
申请日：2007-03-13
申请人： Youping Mei , Jun Mou , Dale E. Egbert , Ling Ma
发明人： Youping Mei , Jun Mou , Dale E. Egbert , Ling Ma
IPC分类号： G11B5/127
CPC分类号： G11B5/3136 , G11B5/102 , G11B5/40 , G11B5/455 , G11B5/607 , Y10T29/49021 , Y10T29/49025 , Y10T29/49032 , Y10T29/49041 , Y10T29/49798
摘要： A method and apparatus are provided for adjusting recession of an element, such as a pole tip, in a transducer structure formed in a plurality of thin film layers on an edge of a slider. A pre-stressed structure is formed as part of the plurality of thin film layers on the edge of the slider. The pre-stressed structure has a level of material stress. The recession is measured relative to a bearing surface of the slider, and then the level of material stress is adjusted as a function of the measured to effect a corresponding change in the recession.
摘要翻译：提供一种方法和装置，用于调节在滑块的边缘上形成在多个薄膜层中的换能器结构中的元件（例如极尖）的凹陷。在滑块的边缘上形成预应力结构作为多个薄膜层的一部分。预应力结构具有材料应力水平。相对于滑块的支承表面测量凹陷，然后根据所测量的材料应力的水平来调节以实现经济衰退的相应变化。

8. 发明申请

US20070023829A1 Split electrode gate trench power device 有权
标题翻译：分离电极栅沟槽功率器件
公开(公告)号：US20070023829A1
公开(公告)日：2007-02-01
申请号：US11491743
申请日：2006-07-24
申请人： Hugo Burke , David Jones , Ling Ma , Robert Montgomery
发明人： Hugo Burke , David Jones , Ling Ma , Robert Montgomery
IPC分类号： H01L29/94 , H01L21/336
CPC分类号： H01L29/7813 , H01L21/2815 , H01L29/4236 , H01L29/42368 , H01L29/4933 , H01L29/66734
摘要： A power semiconductor device which includes gate liners extending along gate insulation liners and an insulation block spacing the two gate liners.
摘要翻译：一种功率半导体器件，其包括沿栅极绝缘衬垫延伸的栅极衬垫和间隔两个栅极衬垫的绝缘块。

9. 发明授权

US08860194B2 Buck converter power package 有权
标题翻译：降压转换器电源封装
公开(公告)号：US08860194B2
公开(公告)日：2014-10-14
申请号：US13666854
申请日：2012-11-01
申请人： Ling Ma , Andrew N. Sawle , David Paul Jones , Timothy D. Henson , Niraj Ranjan , Vijay Viswanathan , Omar Hassen
发明人： Ling Ma , Andrew N. Sawle , David Paul Jones , Timothy D. Henson , Niraj Ranjan , Vijay Viswanathan , Omar Hassen
IPC分类号： H01L23/495
CPC分类号： H01L25/18 , H01L25/072 , H01L2224/16225 , H01L2224/73253 , H01L2924/13091 , H01L2924/16251 , H02M3/1588 , Y02B70/1466 , H01L2924/00
摘要： One exemplary disclosed embodiment comprises a semiconductor package including a vertical conduction control transistor and a vertical conduction sync transistor. The vertical conduction control transistor may include a control source, a control gate, and a control drain that are all accessible from a bottom surface, thereby enabling electrical and direct surface mounting to a support surface. The vertical conduction sync transistor may include a sync drain on a top surface, which may be connected to a conductive clip that is coupled to the support surface. The conductive clip may also be thermally coupled to the control transistor. Accordingly, all terminals of the transistors are readily accessible through the support surface, and a power circuit, such as a buck converter power phase, may be implemented through traces of the support surface. Optionally, a driver IC may be integrated into the package, and a heatsink may be attached to the conductive clip.
摘要翻译：一个示例性的公开的实施例包括包括垂直导通控制晶体管和垂直导通同步晶体管的半导体封装。垂直传导控制晶体管可以包括控制源，控制栅极和控制漏极，其都可从底表面接近，从而使电和直接表面安装到支撑表面。垂直导通同步晶体管可以包括顶表面上的同步漏极，其可以连接到耦合到支撑表面的导电夹子。导电夹子也可以热耦合到控制晶体管。因此，晶体管的所有端子容易通过支撑表面接近，并且诸如降压转换器电源相的功率电路可以通过支撑表面的迹线来实现。可选地，驱动器IC可以集成到封装中，并且散热器可以附接到导电夹子。

10. 发明申请

US20130301464A1 Method and device for measurement compensation for inter-system reselection and handover in dual-mode terminal 有权
标题翻译：双模终端中系统间重选和切换的测量补偿方法和装置
公开(公告)号：US20130301464A1
公开(公告)日：2013-11-14
申请号：US13979112
申请日：2012-02-16
申请人： Shengbin Wang , Xia Hu , Ling Ma
发明人： Shengbin Wang , Xia Hu , Ling Ma
IPC分类号： H04W48/18 , H04W24/10
CPC分类号： H04W48/18 , H04W24/10 , H04W36/0094 , H04W36/14 , H04W48/16
摘要： Method and device for measurement compensation for inter-system reselection and handover in a dual-mode terminal are disclosed. The method comprises: a GSM physical layer reporting measured RSCP and Ec/No values of a 3G neighbor cell to a radio resource management layer with inter-layer primitives; the radio resource management layer receiving the inter-layer primitives carrying the RSCP and Ec/No values reported by the physical layer, and performing measurement compensation for the inter-layer primitives in the radio resource management layer. Since the measurement compensation is performed in the radio resource management layer of the terminal, the terminal preferably resides on 3G network when detecting the 3G network. It can be applied to measurement compensation for the inter-system reselection and handover when 2G and 3G mobile communication systems co-exist. The terminal is more easily retained on the network of one of the systems and allowed to make a priority selection of the networks.
摘要翻译：公开了用于双模终端中的系统间重选和切换的测量补偿的方法和装置。该方法包括：GSM物理层向具有层间原语的无线资源管理层报告测量的RSCP和3G相邻小区的Ec / No值; 无线资源管理层接收携带由物理层报告的RSCP和Ec / No值的层间原语，并对无线资源管理层中的层间原语进行测量补偿。由于在终端的无线资源管理层中进行测量补偿，所以在检测到3G网络时，终端优选地位于3G网络上。当2G和3G移动通信系统共存时，可以应用于系统间重选和切换的测量补偿。终端更容易保留在系统之一的网络上，并允许优先选择网络。

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