专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20080180859A1 MAGNETORESISTIVE ELEMENT AND MAGNETIC MEMORY 有权
标题翻译：磁性元件和磁记忆
公开(公告)号：US20080180859A1
公开(公告)日：2008-07-31
申请号：US12014522
申请日：2008-01-15
申请人： Tomomasa UEDA , Hisanori AIKAWA , Masatoshi YOSHIKAWA , Naoharu SHIMOMURA , Masahiko NAKAYAMA , Sumio IKEGAWA , Keiji HOSOTANI , Makoto NAGAMINE
发明人： Tomomasa UEDA , Hisanori AIKAWA , Masatoshi YOSHIKAWA , Naoharu SHIMOMURA , Masahiko NAKAYAMA , Sumio IKEGAWA , Keiji HOSOTANI , Makoto NAGAMINE
IPC分类号： G11B5/33
CPC分类号： G11C11/15 , H01L27/228 , H01L43/08
摘要： A magnetoresistive element includes: a magnetization free layer having a first plane and a second plane located on the opposite side from the first plane, and having a variable magnetization direction; a magnetization pinned layer provided on the first plane side of the magnetization free layer, and having a pinned magnetization direction; a first tunnel barrier layer provided between the magnetization free layer and the magnetization pinned layer; a second tunnel barrier layer provided on the second plane of the magnetization free layer; and a non-magnetic layer provided on a plane on the opposite side of the second tunnel barrier layer from the magnetization free layer. The magnetization direction of the magnetization free layer is variable by applying current between the magnetization pinned layer and the non-magnetic layer, and a resistance ratio between the first tunnel barrier layer and the second tunnel barrier layer is in a range of 1:0.25 to 1:4.
摘要翻译：磁阻元件包括：无磁化层，其具有第一平面和位于与第一平面相反的一侧的第二平面，并且具有可变的磁化方向; 磁化固定层，设置在所述磁化自由层的所述第一平面侧上，并且具有钉扎磁化方向; 设置在所述磁化自由层和所述磁化固定层之间的第一隧道势垒层; 设置在无磁化层的第二平面上的第二隧道势垒层; 以及设置在与磁化自由层相反的第二隧道势垒层的相对侧上的平面上的非磁性层。磁化自由层的磁化方向通过在磁化被钉扎层和非磁性层之间施加电流而变化，并且第一隧道势垒层和第二隧道势垒层之间的电阻比在1:0.25至 1：4。

2. 发明申请

US20080253039A1 MAGNETORESISTIVE EFFECT ELEMENT 审中-公开
标题翻译：磁感应效应元件
公开(公告)号：US20080253039A1
公开(公告)日：2008-10-16
申请号：US12100097
申请日：2008-04-09
申请人： Makoto NAGAMINE , Keiji HOSOTANI , Hisanori AIKAWA , Tomomasa UEDA , Sumio IKEGAWA
发明人： Makoto NAGAMINE , Keiji HOSOTANI , Hisanori AIKAWA , Tomomasa UEDA , Sumio IKEGAWA
IPC分类号： G11B5/33
CPC分类号： G11B5/3909 , B82Y10/00 , B82Y25/00 , B82Y40/00 , G01R33/093 , G11B5/3906 , G11C11/161 , G11C29/50 , H01F10/3254 , H01F10/3277 , H01F41/307 , H01L43/08 , H01L43/12
摘要： A magnetoresistive effect element includes a first ferromagnetic layer formed above a substrate, a second ferromagnetic layer formed above the first ferromagnetic layer, an insulating layer interposed between the first ferromagnetic layer and the second ferromagnetic layer and formed of a metal oxide, and a first nonmagnetic metal layer interposed between the insulating layer and the second ferromagnetic layer and in contact with a surface of the insulating layer on the side of the second ferromagnetic layer, the first nonmagnetic metal layer containing the same metal element as the metal oxide.
摘要翻译：磁阻效应元件包括形成在衬底上的第一铁磁层，形成在第一铁磁层之上的第二铁磁层，介于第一铁磁层和第二铁磁层之间并由金属氧化物形成的绝缘层，以及第一非磁性层金属层介于绝缘层和第二铁磁层之间并与第二铁磁层一侧的绝缘层的表面接触，第一非磁性金属层含有与金属氧化物相同的金属元素。

3. 发明申请

US20150263264A1 SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US20150263264A1
公开(公告)日：2015-09-17
申请号：US14479163
申请日：2014-09-05
申请人： Keiji HOSOTANI , Sumio IKEGAWA , Tatsuya KISHI
发明人： Keiji HOSOTANI , Sumio IKEGAWA , Tatsuya KISHI
IPC分类号： H01L43/02 , H01L43/12 , H01L27/22 , H01L43/08
CPC分类号： H01L43/02 , H01L27/222 , H01L27/228 , H01L43/08 , H01L43/12
摘要： According to one embodiment, a semiconductor memory device comprises a memory cell array. The memory cell array has a plurality of magnetic tunnel junction (MTJ) elements. Each of the MTJ elements has a first magnetic layer, a second magnetic layer and a non-magnetic layer therebetween, and a hard mask layer is arranged above the second magnetic layer. The plurality of MTJ elements have a first MTJ element having a first hard mask layer and a second MTJ element having a second hard mask layer, and a dimension of, the first hard mask layer is greater than that of the second hard mask layer.
摘要翻译：根据一个实施例，半导体存储器件包括存储单元阵列。存储单元阵列具有多个磁性隧道结（MTJ）元件。 MTJ元件中的每一个都具有第一磁性层，第二磁性层和非磁性层，硬掩模层设置在第二磁性层的上方。多个MTJ元件具有具有第一硬掩模层的第一MTJ元件和具有第二硬掩模层的第二MTJ元件，第一硬掩模层的尺寸大于第二硬掩模层的尺寸。

4. 发明申请

US20100078763A1 RESISTANCE-CHANGE MEMORY HAVING RESISTANCE-CHANGE ELEMENT AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：具有电阻变化元件的电阻变化记忆及其制造方法
公开(公告)号：US20100078763A1
公开(公告)日：2010-04-01
申请号：US12559446
申请日：2009-09-14
申请人： Keiji HOSOTANI , Yoshiaki ASAO , Kuniaki SUGIURA , Masatoshi YOSHIKAWA , Sumio IKEGAWA , Shigeki TAKAHASHI , Minoru AMANO
发明人： Keiji HOSOTANI , Yoshiaki ASAO , Kuniaki SUGIURA , Masatoshi YOSHIKAWA , Sumio IKEGAWA , Shigeki TAKAHASHI , Minoru AMANO
IPC分类号： H01L29/86 , H01L21/8239
CPC分类号： H01L43/08 , G11C11/161
摘要： A resistance-change memory includes an interlayer insulating film, a lower electrode layer, a fixed layer, a first insulating film, a recording layer, a second insulating film, a conducting layer and an interconnect. The interlayer insulating film is formed on a semiconductor substrate and has a step. The lower electrode layer is formed on the interlayer insulating film including the step. The fixed layer is formed on the lower electrode layer and has invariable magnetization. The first insulating film is formed on the fixed layer. The recording layer is formed on part of the first insulating film and has variable magnetization. The second insulating film is over the recording layer and in contact with the first insulating film. The conducting layer is formed on the second insulating film. The interconnect is connected to the conducting layer.
摘要翻译：电阻变化存储器包括层间绝缘膜，下电极层，固定层，第一绝缘膜，记录层，第二绝缘膜，导电层和互连。层间绝缘膜形成在半导体基板上并具有台阶。包括该步骤的层间绝缘膜上形成下电极层。固定层形成在下电极层上，具有不变的磁化。第一绝缘膜形成在固定层上。记录层形成在第一绝缘膜的一部分上并且具有可变的磁化强度。第二绝缘膜在记录层上方并与第一绝缘膜接触。导电层形成在第二绝缘膜上。互连连接到导电层。

5. 发明申请

US20100047930A1 MAGNETIC RANDOM ACCESS MEMORY AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：磁性随机存取存储器及其制造方法
公开(公告)号：US20100047930A1
公开(公告)日：2010-02-25
申请号：US12605072
申请日：2009-10-23
申请人： Keiji HOSOTANI , Yoshiaki Asao , Akihiro Nitayama
发明人： Keiji HOSOTANI , Yoshiaki Asao , Akihiro Nitayama
IPC分类号： H01L21/00
CPC分类号： H01L27/228 , G11C11/1657 , G11C11/1659 , G11C11/1673 , G11C11/1675
摘要： A magnetic random access memory includes a first wiring, a second wiring formed above and spaced apart from the first wiring, a magnetoresistive effect element formed between the first wiring and the second wiring, formed in contact with an upper surface of the first wiring, and having a fixed layer, a recording layer, and a nonmagnetic layer formed between the fixed layer and the recording layer, a metal layer formed on the magnetoresistive effect element and integrated with the magnetoresistive effect element to form stacked layers, a first side insulating film formed on side surfaces of the metal layer, the magnetoresistive effect element, and the first wiring, a first contact formed in contact with a side surface of the first side insulating film, and a third wiring formed on the metal layer and the first contact to electrically connect the magnetoresistive effect element and the first contact.
摘要翻译：磁性随机存取存储器包括第一布线，形成在第一布线上方并与第一布线间隔开的第二布线;形成在与第一布线的上表面接触形成的第一布线和第二布线之间的磁阻效应元件，以及具有形成在固定层和记录层之间的固定层，记录层和非磁性层，形成在磁阻效应元件上并与磁阻效应元件集成以形成堆叠层的金属层，形成第一侧绝缘膜在金属层的侧表面，磁阻效应元件和第一布线，与第一侧绝缘膜的侧表面接触形成的第一触点和形成在金属层上的第三布线和第一触点电连接连接磁阻效应元件和第一触点。

6. 发明申请

US20100020592A1 MAGNETIC RANDOM ACCESS MEMORY AND WRITE METHOD OF THE SAME 有权
标题翻译：磁性随机存取存储器及其写入方法
公开(公告)号：US20100020592A1
公开(公告)日：2010-01-28
申请号：US12510063
申请日：2009-07-27
申请人： Keiji HOSOTANI , Masahiko NAKAYAMA
发明人： Keiji HOSOTANI , Masahiko NAKAYAMA
IPC分类号： G11C11/00 , G11C11/15 , G11C7/00
CPC分类号： G11C11/1675 , G11C11/161
摘要： A first magnetic layer has a magnetization fixed along one direction. A first nonmagnetic layer on the first magnetic layer functions as a first tunnel barrier. A second magnetic layer on the first nonmagnetic layer has a magnetization whose direction can be reversed by spin transfer current injection. A second nonmagnetic layer on the second magnetic layer functions as a second tunnel barrier. A third magnetic layer on the second nonmagnetic layer has a magnetization whose direction can be reversed by spin transfer through current injection at a current density different from the second magnetic layer. First magnetic, first nonmagnetic layer, and second magnetic layers exhibit a first magnetoresistive effect. Second magnetic, second nonmagnetic, and third magnetic layers exhibit a second magnetoresistive effect. A magnetoresistive effect element records and reads out data of at least three levels based on a synthetic resistance from the first and second magnetoresistive effects.
摘要翻译：第一磁性层具有沿着一个方向固定的磁化。第一磁性层上的第一非磁性层用作第一隧道势垒。第一非磁性层上的第二磁性层具有通过自旋转移电流注入方向可以反转的磁化。第二磁性层上的第二非磁性层用作第二隧道势垒。第二非磁性层上的第三磁性层具有磁化，其方向可以通过在不同于第二磁性层的电流密度的电流注入的自旋转移来反转。第一磁性，第一非磁性层和第二磁性层表现出第一磁阻效应。第二磁性，第二非磁性和第三磁性层表现出第二磁阻效应。磁阻效应元件基于来自第一和第二磁阻效应的合成电阻来记录和读出至少三个电平的数据。

7. 发明申请

US20080225577A1 MAGNETIC RANDOM ACCESS MEMORY, AND WRITE METHOD AND MANUFACTURING METHOD OF THE SAME 有权
标题翻译：磁性随机存取存储器及其制造方法及其制造方法
公开(公告)号：US20080225577A1
公开(公告)日：2008-09-18
申请号：US12043617
申请日：2008-03-06
申请人： Keiji HOSOTANI , Yoshiaki Asao , Toshihiko Nagase
发明人： Keiji HOSOTANI , Yoshiaki Asao , Toshihiko Nagase
IPC分类号： G11C11/02 , H01L29/82 , H01L21/00 , G11C7/00
CPC分类号： G11C11/16 , B82Y10/00 , G11C11/1675 , H01L27/22 , H01L27/228 , H01L43/08
摘要： A magnetic random access memory includes a bit line running in a first direction, a first word line running in a second direction different from the first direction, and a memory element having a magnetoresistive effect element including a fixed layer having a fixed magnetization direction, a recording layer having a reversible magnetization direction, and a nonmagnetic layer formed between the fixed layer and the recording layer, the magnetization directions in the fixed layer and the recording layer being perpendicular to a film surface, and a heater layer in contact with the magnetoresistive effect element, the memory element being connected to the bit line, and formed to oppose a side surface of the first word line such that the memory element is insulated from the first word line.
摘要翻译：磁性随机存取存储器包括沿第一方向运行的位线，沿与第一方向不同的第二方向运行的第一字线，以及具有包括具有固定磁化方向的固定层的磁阻效应元件的存储元件，具有可逆磁化方向的记录层和形成在固定层和记录层之间的非磁性层，固定层和记录层中的磁化方向垂直于膜表面，以及与磁阻效应接触的加热器层所述存储元件连接到所述位线，并形成为与所述第一字线的侧表面相对，使得所述存储元件与所述第一字线绝缘。

8. 发明申请

US20080151608A1 SEMICONDUCTOR MEMORY DEVICE AND WRITE AND READ METHODS OF THE SAME 失效
标题翻译：半导体存储器件及其写入和读取方法
公开(公告)号：US20080151608A1
公开(公告)日：2008-06-26
申请号：US11959897
申请日：2007-12-19
申请人： Keiji HOSOTANI , Yoshiaki Asao
发明人： Keiji HOSOTANI , Yoshiaki Asao
IPC分类号： G11C11/00
CPC分类号： G11C11/16 , G11C11/1675 , G11C2213/75 , Y10S977/935
摘要： A semiconductor memory device includes first to fourth resistance change elements sequentially arranged apart from each other in a first direction, a first electrode which connects one terminals of the first and second resistance change elements, a second electrode which connects one terminals of the third and fourth resistance change elements, a bit line which connects the other terminals of the second and third resistance change elements, first to fourth word lines respectively paired with the first to fourth resistance change elements, arranged apart from the first and second electrodes, and running in a second direction, a first current source which supplies a first electric current to a chain structure, when writing data in a selected element, and a second current source which supplies a second electric current to a selected word line which corresponds to the selected element, when writing the data in the selected element.
摘要翻译：一种半导体存储器件，包括：沿第一方向相互顺序排列的第一至第四电阻变化元件;连接第一和第二电阻变化元件的一个端子的第一电极;连接第三和第四电极的一个端子的第二电极; 电阻变化元件，连接第二和第三电阻变化元件的其他端子的位线，与第一和第四电阻变化元件分别配对的第一至第四字线与第一和第二电极分开配置，并且以第二方向，当将数据写入所选择的元件时，将第一电流提供给链结构的第一电流源和向对应于所选择的元件的所选择的字线提供第二电流的第二电流源，在所选元素中写入数据。

9. 发明申请

US20120068283A1 SEMICONDUCTOR STORAGE DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US20120068283A1
公开(公告)日：2012-03-22
申请号：US13230746
申请日：2011-09-12
申请人： Keiji HOSOTANI , Hiroyuki Kanaya
发明人： Keiji HOSOTANI , Hiroyuki Kanaya
IPC分类号： H01L29/82 , H01L43/12
CPC分类号： H01L43/12 , H01L27/228 , H01L43/08
摘要： A semiconductor storage device according to the present embodiment includes a selection element formed on a surface of a semiconductor substrate. A lower electrode is connected to the selection element. A magnetic tunnel junction element is provided on the lower electrode. An upper electrode is provided on the magnetic tunnel junction element. A growth layer is provided on the upper electrode and is composed of a conductive material and has a larger area than the upper electrode when viewed from above the surface of the semiconductor substrate. A wiring line is provided on the growth layer.
摘要翻译：根据本实施例的半导体存储装置包括形成在半导体衬底的表面上的选择元件。下电极连接到选择元件。在下电极上设置磁性隧道结元件。上部电极设置在磁性隧道结元件上。生长层设置在上电极上并由导电材料构成，并且当从半导体衬底的表面上方观察时具有比上电极大的面积。在生长层上设置布线。

10. 发明申请

US20090129141A1 SEMICONDUCTOR MEMORY DEVICE 有权
标题翻译：半导体存储器件
公开(公告)号：US20090129141A1
公开(公告)日：2009-05-21
申请号：US12273874
申请日：2008-11-19
申请人： Keiji HOSOTANI , Yoshiaki Asao , Yoshihisa Iwata
发明人： Keiji HOSOTANI , Yoshiaki Asao , Yoshihisa Iwata
IPC分类号： G11C11/00 , G11C7/00
CPC分类号： G11C7/20 , G11C11/16 , G11C13/0004 , G11C13/0007 , G11C29/028 , G11C29/50 , G11C2013/0083 , G11C2029/1206 , G11C2029/5002 , G11C2213/31 , G11C2213/32 , G11C2213/79
摘要： A semiconductor memory device includes a memory cell array having a plurality of memory cells which are set into low-resistance states/high-resistance states according to “0” data/“1” data. An allocation of the “0” data/“1” data and the low-resistance state/high-resistance state is switched when a power source is turned on.
摘要翻译：半导体存储器件包括具有根据“0”数据/“1”数据被设置成低电阻状态/高电阻状态的多个存储器单元的存储单元阵列。当电源接通时，切换“0”数据/“1”数据和低电阻状态/高电阻状态的分配。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式