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1. 发明申请

US20090007087A1 PROGRAM ANALYZING METHOD, PROGRAM ANALYZING APPARATUS AND PROGRAM ANALYZING PROGRAM 有权
标题翻译：程序分析方法，程序分析装置和程序分析程序
公开(公告)号：US20090007087A1
公开(公告)日：2009-01-01
申请号：US12191623
申请日：2008-08-14
申请人： Makiko Ito , Hideo Miyake , Atsuhiro Suga
发明人： Makiko Ito , Hideo Miyake , Atsuhiro Suga
IPC分类号： G06F9/45
CPC分类号： G06F11/3604
摘要： A dependent element group which is invertibly contractible is found by using program analysis information including a plurality of dependent elements representing dependent relationships of statement and control, the statement and the control being included in a program. Next, a program dependence graph in which dependent elements are made to be contracted is generated by contracting the found dependent element group. The number of vertices and the number of edges of the program dependence graph are reduced by the contraction of the dependent elements, so that a program dependence graph with a rough granularity can be generated. As a result, a calculation amount (calculation time) necessary for optimization processing such as parallel processing of the program can be reduced. That is, by generating the contracted program dependence graph having invertibility, it is possible to realize the analysis and optimization of large-scale software in a realistic time.
摘要翻译：通过使用包括表示语句和控制的依赖关系的多个依赖元素的程序分析信息，语句和控件被包括在程序中，可以发现可逆收缩的依赖元素组。接下来，通过收合找到的依赖元素组来生成依赖元素被收缩的程序依赖图。通过依赖元素的收缩减少程序依赖图的顶点数和边数，从而可以生成具有粗略粒度的程序依赖图。结果，可以减少诸如程序的并行处理的优化处理所需的计算量（计算时间）。也就是说，通过生成具有可逆性的合同程序依赖图，可以在实际的时间内实现大规模软件的分析和优化。

2. 发明授权

US08181171B2 Method and apparatus for analyzing large scale program and generation of code from degenerated program dependence graph 有权
标题翻译：用于从退化程序依赖图中分析大规模程序和代码生成的方法和装置
公开(公告)号：US08181171B2
公开(公告)日：2012-05-15
申请号：US12191623
申请日：2008-08-14
申请人： Makiko Ito , Hideo Miyake , Atsuhiro Suga
发明人： Makiko Ito , Hideo Miyake , Atsuhiro Suga
IPC分类号： G06F9/45 , G06F9/44
CPC分类号： G06F11/3604
摘要： A dependent element group which is invertibly contractible is found by using program analysis information including a plurality of dependent elements representing dependent relationships of statement and control, the statement and the control being included in a program. Next, a program dependence graph in which dependent elements are made to be contracted is generated by contracting the found dependent element group. The number of vertices and the number of edges of the program dependence graph are reduced by the contraction of the dependent elements, so that a program dependence graph with a rough granularity can be generated. As a result, a calculation amount (calculation time) necessary for optimization processing such as parallel processing of the program can be reduced. That is, by generating the contracted program dependence graph having invertibility, it is possible to realize the analysis and optimization of large-scale software in a realistic time.
摘要翻译：通过使用包括表示语句和控制的依赖关系的多个依赖元素的程序分析信息，语句和控件被包括在程序中，可以发现可逆收缩的依赖元素组。接下来，通过收合找到的依赖元素组来生成依赖元素被收缩的程序依赖图。通过依赖元素的收缩减少程序依赖图的顶点数和边数，从而可以生成具有粗略粒度的程序依赖图。结果，可以减少诸如程序的并行处理的优化处理所需的计算量（计算时间）。也就是说，通过生成具有可逆性的合同程序依赖图，可以在实际的时间内实现大规模软件的分析和优化。

3. 发明授权

US08510529B2 Method for generating program and method for operating system 失效
标题翻译：用于生成操作系统的程序和方法的方法
公开(公告)号：US08510529B2
公开(公告)日：2013-08-13
申请号：US12888614
申请日：2010-09-23
申请人： Takahisa Suzuki , Hiromasa Yamauchi , Hideo Miyake , Makiko Ito
发明人： Takahisa Suzuki , Hiromasa Yamauchi , Hideo Miyake , Makiko Ito
IPC分类号： G06F12/00
CPC分类号： G06F9/445 , G06F9/44557
摘要： An information processing apparatus sequentially selects a function whose execution frequency is high as a selected function that is to be stored in an internal memory, in a source program having a hierarchy structure. The information processing apparatus allocates the selected function to a memory area of the internal memory, allocates a function that is not the selected function and is called from the selected function to an area close to the memory area of the internal memory, and generates an internal load module. The information processing apparatus allocates a remaining function to an external memory coupled to a processor and generates an external load module. Then, a program executed by the processor having the internal memory is generated.
摘要翻译：在具有层次结构的源程序中，信息处理装置顺序选择执行频率高的功能作为要存储在内部存储器中的选择功能。信息处理装置将所选择的功能分配给内部存储器的存储区域，分配不是所选功能的功能，并且从所选择的功能调用到靠近内部存储器的存储区域的区域，并且生成内部加载模块。信息处理装置将剩余的功能分配给耦合到处理器的外部存储器，并生成外部负载模块。然后，生成由具有内部存储器的处理器执行的程序。

4. 发明授权

US07953962B2 Multiprocessor system and control method thereof 有权
标题翻译：多处理器系统及其控制方法
公开(公告)号：US07953962B2
公开(公告)日：2011-05-31
申请号：US12585620
申请日：2009-09-18
申请人： Yasuki Nakamura , Takahisa Suzuki , Makiko Ito , Hideo Miyake
发明人： Yasuki Nakamura , Takahisa Suzuki , Makiko Ito , Hideo Miyake
IPC分类号： G06F9/54
CPC分类号： G06F9/54
摘要： A multiprocessor system according to an embodiment comprises a plurality of processors, an execution control unit to control processing by the plurality of processors and data transfer between the plurality of processors; and an internal data storage unit to store data dependence information indicating status of the data transfer. If control flow of processing by a processor is fixed after a preceding data transfer is registered for execution and another data transfer to a similar destination as the preceding data transfer is necessary, the execution control unit cancels the preceding data transfer based on the data dependence information.
摘要翻译：根据实施例的多处理器系统包括多个处理器，执行控制单元，用于控制多个处理器的处理和多个处理器之间的数据传输; 以及内部数据存储单元，用于存储指示数据传送状态的数据相关信息。如果在先前的数据传送被注册执行之后处理器的处理的控制流程是固定的，并且需要与之前的数据传送相同的目的地的另一数据传送，则执行控制单元基于数据依赖信息来取消先前的数据传送。

5. 发明申请

US20090019259A1 MULTIPROCESSING METHOD AND MULTIPROCESSOR SYSTEM 审中-公开
标题翻译：多处理方法和多处理器系统
公开(公告)号：US20090019259A1
公开(公告)日：2009-01-15
申请号：US12235209
申请日：2008-09-22
申请人： Takahisa SUZUKI , Makiko Ito , Hideo Miyake
发明人： Takahisa SUZUKI , Makiko Ito , Hideo Miyake
IPC分类号： G06F15/76 , G06F9/02
CPC分类号： G06F9/5038
摘要： A multiprocessing method and a multiprocessor system capable of reducing time lost due to sequential waiting when procedures (program units) having dependencies are executed in which an order of execution of a plurality of program units in a sequential execution program and dependencies of the plurality of program units are registered, the execution states of the plurality of program units are managed based on the registered dependencies, executable program units are determined, and are assigned to server processors sequentially and executed are disclosed.
摘要翻译：一种多处理方法和多处理器系统，其能够在顺序执行程序中执行多个程序单元的执行顺序和多个程序的依赖性时执行具有依赖关系的程序（程序单元）时由于顺序等待而减少时间损失注册单元，基于注册的依赖关系管理多个程序单元的执行状态，确定可执行程序单元，并且依次分配给服务器处理器并执行。

6. 发明授权

US08656347B2 Generation of parallelized program based on program dependence graph 失效
标题翻译：基于程序依赖图生成并行程序
公开(公告)号：US08656347B2
公开(公告)日：2014-02-18
申请号：US12585957
申请日：2009-09-29
申请人： Makiko Ito
发明人： Makiko Ito
IPC分类号： G06F9/44
CPC分类号： G06F8/456 , F17C2201/0109 , F17C2203/0604 , F17C2203/0619 , F17C2203/0636 , F17C2203/066 , F17C2203/067 , F17C2203/0673 , F17C2205/0142 , F17C2205/0305 , F17C2209/2118 , F17C2209/2154 , F17C2209/234 , F17C2221/012 , F17C2223/0123 , F17C2223/035 , F17C2260/012 , F17C2270/0105 , F17C2270/0168 , F17C2270/0178 , F17C2270/0184 , F17C2270/0189 , Y02E60/321
摘要： A method of generating a parallelized program includes calculating an execution order of vertices of a degenerate program dependence graph, generating basic blocks by consolidating vertices including neither branching nor merging, generating procedures each corresponding to a respective one of the vertices, and generating a procedure control program by arranging an instruction to execute a first procedure after an instruction to wait for output data transfer from a second procedure for a dependence relation crossing a border between the basic blocks, generating an instruction to register a dependence relation that a third procedure has on output data transfer from a fourth procedure for a dependence relation within one of the basic blocks, and generating an instruction to perform a given data transfer directly from procedure to procedure for each of a data transfer within one of the basic blocks and a data transfer crossing a border between the basic blocks.
摘要翻译：一种生成并行化程序的方法包括：计算退化程序依赖图的顶点的执行次序，通过合并不包括分支或合并的顶点来生成基本块，生成与各个顶点对应的过程，以及生成过程控制程序，通过在从基本块之间的边界之间的依赖关系的第二过程等待输出数据传送的指令之后执行第一过程的指令，生成用于注册第三过程具有输出的依赖关系的指令从基本块之一内的依赖关系的第四过程进行数据传输，并且生成直接从过程到过程执行给定数据传输的指令，用于在一个基本块内的数据传输和数据传输过程中的每一个基本块之间的边界。

7. 发明申请

US20100107174A1 SCHEDULER, PROCESSOR SYSTEM, AND PROGRAM GENERATION METHOD 审中-公开
标题翻译：调度器，处理器系统和程序生成方法
公开(公告)号：US20100107174A1
公开(公告)日：2010-04-29
申请号：US12606837
申请日：2009-10-27
申请人： Takahisa SUZUKI , Makiko Ito
发明人： Takahisa SUZUKI , Makiko Ito
IPC分类号： G06F9/50
CPC分类号： G06F9/5033
摘要： A scheduler for conducting scheduling for a processor system including a plurality of processor cores and a plurality of memories respectively corresponding to the plurality of processor cores includes: a scheduling section that allocates one of the plurality of processor cores to one of a plurality of process requests corresponding to a process group based on rule information; and a rule changing section that, when a first processor core is allocated to a first process of the process group, changes the rule information and allocates the first processor core to a subsequent process of the process group, and that restores the rule information when a second processor core is allocated to a final process of the process group.
摘要翻译：用于对包括分别对应于所述多个处理器核心的多个处理器核和多个存储器的处理器系统进行调度的调度器包括：调度部分，其将所述多个处理器核中的一个分配到多个处理请求之一对应于基于规则信息的进程组; 以及规则变更部，其中当第一处理器核被分配给所述进程组的第一进程时，改变所述规则信息并将所述第一处理器核分配给所述进程组的后续进程，并且当第二处理器核心被分配给进程组的最后进程。

8. 发明授权

US09619235B2 Compressing detected current and preceding instructions with the same operation code and operand patterns 有权
公开(公告)号：US09619235B2
公开(公告)日：2017-04-11
申请号：US13481221
申请日：2012-05-25
申请人： Mitsuru Tomono , Hiroya Uehara , Makiko Ito
发明人： Mitsuru Tomono , Hiroya Uehara , Makiko Ito
IPC分类号： G06F9/30 , G06F9/38
CPC分类号： G06F9/30185 , G06F9/30032 , G06F9/30072 , G06F9/30145 , G06F9/3016 , G06F9/30178 , G06F9/3802 , G06F9/3816
摘要： A processor accesses memory storing a compressed instruction sequence that includes compression information indicating that an instruction that with respect to the preceding instruction, has identical operation code and operand continuity is compressed. The processor includes a fetcher that fetches a bit string from the memory and determines whether the bit string is a non-compressed instruction, where if so, transfers the given bit string and if not, transfers the compression information; and a decoder that upon receiving the non-compressed instruction, holds in a buffer, instruction code and an operand pattern of the non-compressed instruction and executes processing to set to an initial value, the value of an instruction counter that indicates a count of consecutive instructions having identical operation code and operand continuity, and upon receiving the compression information, restores the instruction code based on the instruction code held in the buffer, the instruction counter value, and the operand pattern.

9. 发明申请

US20100023731A1 Generation of parallelized program based on program dependence graph 失效
标题翻译：基于程序依赖图生成并行程序
公开(公告)号：US20100023731A1
公开(公告)日：2010-01-28
申请号：US12585957
申请日：2009-09-29
申请人： Makiko Ito
发明人： Makiko Ito
IPC分类号： G06F9/30
CPC分类号： G06F8/456 , F17C2201/0109 , F17C2203/0604 , F17C2203/0619 , F17C2203/0636 , F17C2203/066 , F17C2203/067 , F17C2203/0673 , F17C2205/0142 , F17C2205/0305 , F17C2209/2118 , F17C2209/2154 , F17C2209/234 , F17C2221/012 , F17C2223/0123 , F17C2223/035 , F17C2260/012 , F17C2270/0105 , F17C2270/0168 , F17C2270/0178 , F17C2270/0184 , F17C2270/0189 , Y02E60/321
摘要： A method of generating a parallelized program includes calculating an execution order of vertices of a degenerate program dependence graph, generating basic blocks by consolidating vertices including neither branching nor merging, generating procedures each corresponding to a respective one of the vertices, and generating a procedure control program by arranging an instruction to execute a first procedure after an instruction to wait for output data transfer from a second procedure for a dependence relation crossing a border between the basic blocks, generating an instruction to register a dependence relation that a third procedure has on output data transfer from a fourth procedure for a dependence relation within one of the basic blocks, and generating an instruction to perform a given data transfer directly from procedure to procedure for each of a data transfer within one of the basic blocks and a data transfer crossing a border between the basic blocks.
摘要翻译：一种生成并行化程序的方法包括：计算退化程序依赖图的顶点的执行次序，通过合并不包括分支或合并的顶点来生成基本块，生成与各个顶点对应的过程，以及生成过程控制程序，通过在从基本块之间的边界之间的依赖关系的第二过程等待输出数据传送的指令之后执行第一过程的指令，生成用于注册第三过程具有输出的依赖关系的指令从基本块之一内的依赖关系的第四过程进行数据传输，并且生成直接从过程到过程执行给定数据传输的指令，用于在一个基本块内的数据传输和数据传输过程中的每一个基本块之间的边界。

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