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    • 3. 发明专利
    • DE1665064B1
    • 1971-03-04
    • DE1665064
    • 1966-07-29
    • MATSUSHITA ELECTRIC WORKS LTDWATANABE TOSHIO
    • WATANABE TOSHIOUKITA SHIGETSUGU
    • H01H9/54H01H9/30
    • 1,113,732. Arcing preventing in switches. MATSUSHITA DENKO KABUSHIKI KAISHA and T. WATANABE. 28 July, 1966 [30 July, 1965; 18 Aug., 1965], No. 33972/66. Heading H1N. An arc suppressing arrangement for use with a pair of contacts (SW) used to interrupt an alternating current comprises a two-terminal multi-layer semi-conductor device (SSS) across the contacts (Fig. 3, not shown). The device (SSS) is a five-layer diode, and a series combination of a capacitor (C) and resistor (R) is inserted in parallel with the switch (SW) and load (L) to protect the diode against voltage surges (Fig. 4, not shown), or is alternatively in parallel with the diode (SSS), (Fig. 5, not shown). An inductor (L 1 ) may be connected in series with the device (SSS), (Figs. 6, 7, not shown), to restrict the current therethrough. The secondary winding (L2) of a transformer (T) is connected in series with the device (SSS), the primary winding (L1) being in series with a capacitor (C1) and the combination being connected across the switch contacts. A voltage surge-limiting capacitor (C2) is optionally provided (Figs. 8-15, not shown).