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1. 发明专利

DE60124665D1 未知
公开(公告)号：DE60124665D1
公开(公告)日：2007-01-04
申请号：DE60124665
申请日：2001-06-05
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： KAWAMOTO EIJI , YAMANE SHIGERU , TAKENAKA TOSHIAKI , NISHII TOSHIHIRO
IPC分类号： H05K1/11 , H05K3/40 , H05K3/00
摘要： A method of manufacturing a PCB comprising the steps of: forming through-holes in a substrate having releasing layers on front and back faces; filling conductive paste in the through-holes; removing the releasing layers and disposing metal foil on both faces of the substrate; and heat pressing them. A diameter of the through-holes is larger than that of corresponding holes formed on the releasing layers. According to the present invention, when the conductive paste is compressed, conductive paste protruding from the surface of the substrate is trapped at the edges of the through-holes. This configuration prevents short circuits with undesirable wiring patterns. So, an enough amount of the conductive paste can protrude from the surface of the substrate. Therefore, after the compression, stable electric connections inside the conductive paste and between the conductive paste and the metal foils are ensured, thus PCBs with superior reliability can be produced.

2. 发明专利

DE69325696T2 未知
公开(公告)号：DE69325696T2
公开(公告)日：2000-04-06
申请号：DE69325696
申请日：1993-12-02
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： NAKAMURA TETSURO , KAWAMOTO EIJI , FUJIWARA SHINJI
IPC分类号： G02B6/08 , H04N1/031 , H04N1/028 , G02B6/42
摘要： The present invention provides a direct-contact type image sensor device in which an image sensor chip having electrodes and a photosensitive element array is mounted on an optical fiber array plate by a flip-chip-bonding method. The optical fiber array plate includes a first opaque substrate, a second opaque substrate, an optical fiber array formed by arranging a plurality of optical fibers, and a transparent member disposed in contact with a side face of the optical fiber array, the optical fiber array and the transparent member being interposed between the first and second opaque substrates. Each of the plurality of optical fibers includes a center core, a clad provided on an outer surface of the core, and a light absorbing layer provided on an outer surface of the clad. The image sensor chip is provided in such a way that the photosensitive element array is disposed along an upper end of the optical fiber array and in a portion of the optical fiber array plate except the transparent member, the transparent member forming a slit for transmitting light.

3. 发明公开

EP1267595A4 CIRCUIT FORMING BOARD PRODUCING METHOD, CIRCUIT FORMING BOARD, AND MATERIAL FOR CIRCUIT FORMING BOARD 有权
标题翻译： METHOD FOR循环训练板，线路板培训和材料循环训练板
公开(公告)号：EP1267595A4
公开(公告)日：2003-02-26
申请号：EP01974853
申请日：2001-10-15
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： YAMANE SHIGERU , KAWAMOTO EIJI , KOMODA HIDEAKI , SUZUKI TAKESHI , NISHII TOSHIHIRO , NAKAMURA SHINJI
IPC分类号： H05K1/09 , B32B5/00 , B32B5/14 , B32B15/08 , H05K1/03 , H05K1/11 , H05K3/00 , H05K3/06 , H05K3/40 , H05K3/46
CPC分类号： B32B5/14 , B32B15/08 , H05K1/036 , H05K1/0366 , H05K3/4069 , H05K2201/0245 , H05K2201/0355 , H05K2203/0191 , H05K2203/1461 , Y10T29/49156 , Y10T428/24273 , Y10T428/24917 , Y10T428/249924 , Y10T428/24994 , Y10T428/249962 , Y10T428/249995 , Y10T428/2839 , Y10T442/2984 , Y10T442/607
摘要： A circuit forming board producing method comprising the steps of sticking a releasable film to a prepreg sheet, forming non-through or through holes in the prepreg sheet provided with the releasable film, filling the holes with electrically conductive paste, stripping the releasable film, and heating and pressure-welding a metal foil to the prepreg sheet. In the circuit forming board, the prepreg sheet is formed with a flat smooth surface on one or both surfaces thereof, inhibiting the electrically conductive paste from seeping into the interface between the prepreg sheet and the releasable film. This prevents a short circuit between wired circuits and prevents a lowing in insulation reliability, thus making it possible to provide a circuit board that has improved yield, high quality and high reliability.

4. 发明专利

DE60124665T2 未知
公开(公告)号：DE60124665T2
公开(公告)日：2007-03-08
申请号：DE60124665
申请日：2001-06-05
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： KAWAMOTO EIJI , YAMANE SHIGERU , TAKENAKA TOSHIAKI , NISHII TOSHIHIRO
IPC分类号： H05K1/11 , H05K3/40 , H05K3/00
摘要： A method of manufacturing a PCB comprising the steps of: forming through-holes in a substrate having releasing layers on front and back faces; filling conductive paste in the through-holes; removing the releasing layers and disposing metal foil on both faces of the substrate; and heat pressing them. A diameter of the through-holes is larger than that of corresponding holes formed on the releasing layers. According to the present invention, when the conductive paste is compressed, conductive paste protruding from the surface of the substrate is trapped at the edges of the through-holes. This configuration prevents short circuits with undesirable wiring patterns. So, an enough amount of the conductive paste can protrude from the surface of the substrate. Therefore, after the compression, stable electric connections inside the conductive paste and between the conductive paste and the metal foils are ensured, thus PCBs with superior reliability can be produced.

5. 发明专利

DE69325696D1 未知
公开(公告)号：DE69325696D1
公开(公告)日：1999-08-26
申请号：DE69325696
申请日：1993-12-02
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： NAKAMURA TETSURO , KAWAMOTO EIJI , FUJIWARA SHINJI
IPC分类号： G02B6/08 , H04N1/031 , H04N1/028 , G02B6/42
摘要： The present invention provides a direct-contact type image sensor device in which an image sensor chip having electrodes and a photosensitive element array is mounted on an optical fiber array plate by a flip-chip-bonding method. The optical fiber array plate includes a first opaque substrate, a second opaque substrate, an optical fiber array formed by arranging a plurality of optical fibers, and a transparent member disposed in contact with a side face of the optical fiber array, the optical fiber array and the transparent member being interposed between the first and second opaque substrates. Each of the plurality of optical fibers includes a center core, a clad provided on an outer surface of the core, and a light absorbing layer provided on an outer surface of the clad. The image sensor chip is provided in such a way that the photosensitive element array is disposed along an upper end of the optical fiber array and in a portion of the optical fiber array plate except the transparent member, the transparent member forming a slit for transmitting light.

6. 发明公开

EP1229770A4 METHOD FOR MANUFACTURING PRINTED-CIRCUIT BOARD 有权
标题翻译： HERTELLUNGSMETHODEFÜREINE LEITERPLATTE
公开(公告)号：EP1229770A4
公开(公告)日：2004-09-29
申请号：EP01934557
申请日：2001-06-05
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： KAWAMOTO EIJI , YAMANE SHIGERU , TAKENAKA TOSHIAKI , NISHII TOSHIHIRO
IPC分类号： H05K1/11 , H05K3/00 , H05K3/40
CPC分类号： H05K3/4069 , H05K2201/0355 , H05K2201/09827 , H05K2201/09845 , H05K2203/0191 , H05K2203/1461 , Y10T29/49126
摘要： A PCB manufacturing method comprising: forming through holes in a substrate having parting layers formed on its front and back surfaces; filling the through holes with a conductive paste; removing the parting layers and arranging metal foils on the front and back surfaces of the substrate; and heating and compressing them to manufacture a PCB, wherein the through holes in the front and back surfaces of the substrate have diameters larger than those in the corresponding parting layers. When the conductive paste compresses, according to this method, the outflow of the conductive paste from the surface of the substrate stops at the boundary portions of the through holes so that the protrusion of the conductive paste from the substrate surface can be ensured while eliminating the short-circuit with other wiring patterns. Even after the substrate compression, therefore, the electric connections of the inside of the conductive paste and between the conductive paste and the metal foils can be improved to manufacture a highly reliable PCB.
摘要翻译：一种制造PCB的方法，包括以下步骤：在前面和背面上形成具有释放层的基板中形成通孔; 在通孔中填充导电膏; 去除释放层并在金属箔的两个面上设置金属箔; 并热压它们。通孔的直径大于形成在释放层上的相应孔的直径。根据本发明，当导电膏被压缩时，从基板的表面突出的导电糊被捕获在通孔的边缘处。这种配置可以防止出现不良布线图形的短路。因此，足够量的导电糊可以从基板的表面突出。因此，在压缩之后，确保导电性浆料内部和导电性糊料与金属箔之间的稳定的电连接，能够制造出具有优异的可靠性的PCB。

7. 发明专利

JP2008218942A Electronic circuit device, electronic apparatus employing it and its manufacturing method 审中-公开
标题翻译：电子电路设备，使用其的电子设备及其制造方法
公开(公告)号：JP2008218942A
公开(公告)日：2008-09-18
申请号：JP2007058041
申请日：2007-03-08
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： KAWAMOTO EIJI , HONJO KAZUHIKO , SASAOKA TATSUO , ECHIGO FUMIO
IPC分类号： H05K3/46 , H01L23/12
CPC分类号： H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/19105 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide an electronic circuit device having a double-sided mounting structure for simplifying interlayer connection while enhancing reliability. SOLUTION: The electronic circuit device 100 comprises a first wiring layer 101, an electronic component 105 mounted to an electrode provided on the upper surface of the first wiring layer 101, a second wiring layer 104 connected with the first wiring layer 101 through a bump 110 on the first wiring layer 101, and an adhesive layer 108 arranged between the first wiring layer 101 and the second wiring layer 104. The second wiring layer 104 has an opening larger than the upper surface of the electronic component 105 above the electronic component 105, the bump 110 has a height shorter than the distance between upper surfaces of the first wiring layer 101 and the electronic component 105, and the adhesive layer 108 is composed of an anisotropic conductive film or an insulating film. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供一种具有双面安装结构的电子电路装置，用于简化层间连接同时提高可靠性。解决方案：电子电路装置100包括第一布线层101，安装在设置在第一布线层101的上表面上的电极的电子部件105，与第一布线层101连接的第二布线层104 第一布线层101上的突起110以及布置在第一布线层101和第二布线层104之间的粘合剂层108.第二布线层104的开口大于电子部件105的上表面以上的开口突起110的高度比第一布线层101和电子部件105的上表面之间的距离短，粘合层108由各向异性导电膜或绝缘膜构成。版权所有（C）2008，JPO＆INPIT

8. 发明专利

JP2006324568A MULTILAYER MODULE AND ITS MANUFACTURING METHOD 审中-公开
公开(公告)号：JP2006324568A
公开(公告)日：2006-11-30
申请号：JP2005147865
申请日：2005-05-20
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： KIMURA JUNICHI , HONJO KAZUHIKO , KAWAMOTO EIJI , HARADA SHINJI , KITAGAWA MOTOYOSHI
IPC分类号： H05K3/46 , H05K1/11 , H05K1/14
摘要： PROBLEM TO BE SOLVED: To prevent electronic components from being mounted on an area depending on the number of modules to be stacked. SOLUTION: This multilayer module is a component-incorporated module where a resin layer 39 covering an electronic component 2a at one side of a circuit substrate 1, connection terminals 34a and 34b provided on this resin layer 39 and the other side of the circuit substrate 1 and a through-hole 46 connecting the both sides of a module 32 are all built in advance. A module 33 employs a module with connection terminals 35a and 35b formed at the positions corresponding to the above connection terminals 34a and 34b, a through-hole 47 formed in advance to connect the above connection terminals 35a and 35b and an electronic component 2b, and an insulated layer 36 formed between the conductive layers 34 and 35 is provided with a conductive adhesive 37 for connecting the connection terminals 34a and 34b and those 35a and 35b, respectively. In this way, the positions of the through-hole 47 and an electronic component 2c are not restricted by the position of the through-hole 46 in the module 33. COPYRIGHT: (C)2007,JPO&INPIT

9. 发明专利

JP2005294674A Manufacturing methods of multilayer substrate, semiconductor package, and module 审中-公开
标题翻译：多层基板，半导体封装和模块的制造方法
公开(公告)号：JP2005294674A
公开(公告)日：2005-10-20
申请号：JP2004109782
申请日：2004-04-02
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： SUGAYA YASUHIRO , KATSUMATA MASAAKI , TSUNEOKA MICHIO , KAWAMOTO EIJI
IPC分类号： H05K1/16 , H01L23/12 , H05K3/46
CPC分类号： H01L2224/16225 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2924/15311 , H01L2924/15313 , H01L2924/19105 , H01L2924/00014 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To manufacture a multilayer substrate without damaging the electronic components incorporated therein. SOLUTION: The manufacturing method of a multilayer substrate has a process for burying electronic components 12 in the inside of a composite sheet 13; a process for curing thereafter the composite sheet 13; a process for constituting an electronic-component incorporating layer 15 out of the electronic components 12 the composite sheet 13, and first wiring layers 14a, 14b formed by patterning first metal foils 11a, 11b into desired shapes; a process for providing thereafter uncured insulation substrates 16a, 16b oppositely to each other on the front and rear surfaces of the electronic-component incorporating layer 15 via the first wiring layers 14a, 14b; a process for forming subsequently second metal foils 17a, 17b on the opposite sides of the insulation substrates 16a, 16b to the electronic-component incorporating layer 15; a process for so heating the uncured insulation substrates 16a, 16b and the second metal foils 17a, 17b as to cure them; and a process for so patterning further the second metal foils 17a, 17b into desired shapes as to form second wiring layers 18a, 18b. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：制造多层基板而不损害其中所包含的电子部件。解决方案：多层基板的制造方法具有将电子部件12埋入复合片13内部的工序; 用于固化复合片材13的方法; 用于构成电子部件12中的电子部件结合层15的工序，复合片13，以及将第一金属箔11a，11b形成为所需形状而形成的第一布线层14a，14b; 一种用于经由第一布线层14a，14b在电子部件结合层15的前表面和后表面上彼此相对地提供未固化的绝缘基板16a，16b的工艺; 在绝缘基板16a，16b的相对侧上形成第二金属箔17a，17b到电子部件结合层15的工序; 对未固化绝缘基板16a，16b和第二金属箔17a，17b进行加热以使其固化的工艺; 以及用于使第二金属箔17a，17b进一步图案化以形成第二布线层18a，18b的所需形状的工艺。版权所有（C）2006，JPO＆NCIPI

10. 发明专利

JP2004103998A Circuit component incorporating module 有权
公开(公告)号：JP2004103998A
公开(公告)日：2004-04-02
申请号：JP2002266736
申请日：2002-09-12
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： KAWAMOTO EIJI , HAYAMA MASAAKI , KATSUMATA MASAAKI , YABE HIROKI , ANPO TAKEO
IPC分类号： H05K1/02 , H05K1/14 , H05K3/28 , H05K3/34 , H05K3/46 , H05K9/00
CPC分类号： H05K3/284 , H01L2924/15311 , H05K1/0218 , H05K1/141 , H05K3/3442 , H05K3/3452 , H05K2201/0989 , H05K2201/10636 , Y02P70/611
摘要： PROBLEM TO BE SOLVED: To solve the problem that solder is remelted to cause short-circuiting between electrodes of circuit components at the time of reflow connection with a mother board in a circuit component incorporating module having a resin mold structure through mounting the circuit components by using solder. SOLUTION: There is provided the circuit component incorporating module comprising circuit components 104 composed of at least one or more electronic parts, an interconnection substrate 102 including an electrode 103 and solder resist 106 on its surface and at least one or more interconnection layers, and an electromagnetic shield layer formed by a metal film 115 laid on a surface layer of a first insulative resin 107 covering the circuit components 104 connected by solder 105. In the circuit component incorporating module, the solder resist 106 is partially removed which exists between two electrodes 103 connected with the circuit components 104 to form a first groove 116 and the first insulative resin 107 is filled in a space between the first groove 116 and the circuit components 104. COPYRIGHT: (C)2004,JPO

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