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1. 发明专利

JP2003271403A Control device and control device for mounting machine using the same 审中-公开
标题翻译：用于安装机器的控制装置和控制装置
公开(公告)号：JP2003271403A
公开(公告)日：2003-09-26
申请号：JP2002075282
申请日：2002-03-19
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： UEDA TOMIYASU , MATSUZAKI YUTAKA , KATADA HISASHI , KOMINAMI SHINYA
IPC分类号： G06F9/46 , G06F9/48
摘要： PROBLEM TO BE SOLVED: To solve a problem of a conventional control device wherein the control device is difficult to be miniaturized and can't be mounted on equipment requiring miniaturization of the control device, since a system is constituted by using each different interruption bus signal to prevent a plurality of OSs from being overlapped and fixing each OS for every interruption level in each OS, when using the plurality of OSs. SOLUTION: This control device has an arithmetic device 1 having a plurality of operating systems, an interruption circuit 11 for inputting an interruption request signal into the arithmetic device 1 from the outside, and a resource control circuit 101. The resource control circuit 101 designates the assigning of the resource of the arithmetic device 1 to any operating system when an interruption request signal is given to the interruption circuit 11. After starting an interruption processing of the OS having the highest priority upon generation of an interruption by the resource control circuit 101, an interruption signal is used in common by the plurality of OSs by successively starting an OS interruption processing with the next highest priority. COPYRIGHT: (C)2003,JPO
摘要翻译：要解决的问题为了解决控制装置难以小型化并且不能安装在需要控制装置小型化的设备上的常规控制装置的问题，因为通过使用各种不同的方式构成系统中断总线信号，以防止多个OS重叠，并且在使用多个OS时在每个OS中为每个中断级固定每个OS。解决方案：该控制装置具有具有多个操作系统的运算装置1，用于从外部向运算装置1输入中断请求信号的中断电路11以及资源控制电路101.资源控制电路 101表示当向中断电路11给出中断请求信号时，将运算装置1的资源分配给任何操作系统。在通过资源控制产生中断时具有最高优先级的OS的中断处理电路101，通过连续地开始具有下一个最高优先级的OS中断处理，由多个OS共同使用中断信号。版权所有（C）2003，JPO

2. 发明专利

JP2003044284A Activation method for computer system and program for activation 审中-公开
标题翻译：计算机系统的激活方法和激活程序
公开(公告)号：JP2003044284A
公开(公告)日：2003-02-14
申请号：JP2001226875
申请日：2001-07-27
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： MATSUZAKI YUTAKA , UEDA TOMIYASU , KATADA HISASHI , KOMINAMI SHINYA
IPC分类号： G06F1/00 , G06F9/445
摘要： PROBLEM TO BE SOLVED: To provide an activation method of a controller, capable of shortening activation time in the second or succeeding time and dissolving abnormality on a main memory, which is generated by the execution of software for control at the next activation.
SOLUTION: An operating system is loaded from a storage device onto the main memory and then the operating system is executed (steps 2 and 3). Then, the software for the control is loaded from the storage device onto the main memory (step 4) and data for the activation on the main memory immediately after the operating system is activated and the software for the control is loaded are preserved in the storage device as they are (step 5). Also, when the data for the activation are present in the storage device at activating the controller, that is at the activation of the second or succeeding time, the data for the activation are read onto the main memory (step 1 and 7).
COPYRIGHT: (C)2003,JPO
摘要翻译：要解决的问题：提供一种控制器的激活方法，其能够缩短在第二次或之后的时间内的激活时间，并且通过执行下一次激活时的控制软件产生的主存储器上的异常。解决方案：将操作系统从存储设备加载到主存储器上，然后执行操作系统（步骤2和3）。然后，用于控制的软件从操作系统激活之后立即从存储设备加载到主存储器（步骤4）上并且在主存储器上激活的数据，并且用于控制的软件被加载到存储器中设备（步骤5）。此外，当激活控制器（即处于激活第二个或其后的时间）时激活的数据存在于存储装置中时，将激活的数据读入主存储器（步骤1和7）。

3. 发明专利

JP2003248593A MULTI OPERATING SYSTEM CONTROL APPARATUS 审中-公开
公开(公告)号：JP2003248593A
公开(公告)日：2003-09-05
申请号：JP2002047244
申请日：2002-02-25
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： UEDA TOMIYASU , KATADA HISASHI , NAKAMURA HITOSHI , YANACHI SEISHIRO
IPC分类号： G06F9/46 , H05K13/04
摘要： PROBLEM TO BE SOLVED: To provide a multi OS control apparatus having the configuration suitable to the case of developing a control device in a short time, by which a control device can be made compact in the case of using two or more kinds of OS. SOLUTION: The multi OS control apparatus comprises one arithmetic device 1 having two kinds of operation systems, an interrupt circuit 11 for inputting an interrupt request signal from the outside to the arithmetic device, and a resource control circuit 101 for specifying to assign the source of the arithmetic device to one of the operating systems when there is an interrupt request signal to the interrupt circuit. COPYRIGHT: (C)2003,JPO

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