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    • 8. 发明申请
    • TECHNIQUES TO IMPROVE THE STRESS ISSUE IN CASCODE POWER AMPLIFIER DESIGN
    • 改进CASCODE功率放大器设计中的应力问题的技术
    • WO2012088523A1
    • 2012-06-28
    • PCT/US2011/067244
    • 2011-12-23
    • MARVELL ASIA PTE, LTD.LEONG, Poh BoonSONG, PingSUTARDJA, Sehat
    • LEONG, Poh BoonSONG, PingSUTARDJA, Sehat
    • H03F3/68
    • H03F3/265H03F1/223H03F3/193H03F3/245H03F2200/306H03F2200/408H03F2200/534H03F2200/537H03F2200/541
    • An amplifier includes a first transistor, and a first inductor disposed between the first transistor and a voltage source. A first output node is between the first transistor and the first inductor. The amplifier further includes a second inductor disposed between the first transistor and ground. The amplifier further includes a second transistor, and a third inductor disposed between the second transistor and a ground. A second output node is between the second transistor and the third inductor. The amplifier further includes a fourth inductor disposed between the second transistor and the voltage source. The amplifier further includes a first capacitor disposed between the first output node and the second output node, and a second capacitor disposed between a first mid-node, which is between the first transistor and the first inductor, and a second mid-node, which is between the second transistor and fourth inductor.
    • 放大器包括第一晶体管和设置在第一晶体管和电压源之间的第一电感器。 第一输出节点位于第一晶体管和第一电感器之间。 放大器还包括设置在第一晶体管和地之间的第二电感器。 放大器还包括第二晶体管,以及设置在第二晶体管和地之间的第三电感器。 第二输出节点在第二晶体管和第三电感之间。 放大器还包括设置在第二晶体管和电压源之间的第四电感器。 所述放大器还包括设置在所述第一输出节点和所述第二输出节点之间的第一电容器,以及设置在所述第一晶体管和所述第一电感器之间的第一中间节点和第二中间节点之间的第二电容器,所述第二中间节点 在第二晶体管和第四电感之间。
    • 9. 发明申请
    • LOW-STRESS CASCODE STRUCTURE
    • 低应变框架结构
    • WO2013061138A1
    • 2013-05-02
    • PCT/IB2012/002143
    • 2012-10-25
    • MARVELL WORLD TRADE LTD.
    • DO, Aaron Vinh ThanhLEONG, Poh Boon
    • H03F1/22H03F1/52
    • H03F1/223H03F1/52H03F2200/75Y10T29/49002Y10T29/49117
    • An amplifier system comprises a cascode common-source (CS) amplifier including a plurality of transistors connected in a common-source configuration. A stress reducing circuit is connected to at least one of the plurality of transistors to equalize a voltage drop across the plurality of transistors. The stress reducing circuit includes a first transistor including a control terminal, a first terminal and a second terminal. The second terminal of the first transistor is connected to a first terminal of a first one of the plurality of transistors. A capacitance has a first terminal connected to the control terminal of the first transistor and a second terminal connected to a control terminal of a second one of the plurality of transistors.
    • 放大器系统包括共源共栅源(CS)放大器,其包括以共源配置连接的多个晶体管。 应力降低电路连接到多个晶体管中的至少一个,以均衡跨越多个晶体管的电压降。 应力降低电路包括:第一晶体管,包括控制端子,第一端子和第二端子。 第一晶体管的第二端子连接到多个晶体管中的第一晶体管的第一端子。 电容具有连接到第一晶体管的控制端子的第一端子和连接到多个晶体管中的第二晶体管的控制端子的第二端子。