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1. 发明授权

US5760480A Low RC interconnection 失效
公开(公告)号：US5760480A
公开(公告)日：1998-06-02
申请号：US530658
申请日：1995-09-20
申请人： Lu You , Robin W. Cheung , Simon S. Chan , Richard J. Huang
发明人： Lu You , Robin W. Cheung , Simon S. Chan , Richard J. Huang
IPC分类号： H01L21/3205 , H01L21/312 , H01L21/768 , H01L23/31 , H01L23/52 , H01L23/522 , H01L23/532 , B29B13/00 , B05D3/02 , H01L21/283
CPC分类号： H01L23/3142 , H01L23/5222 , H01L23/5329 , H01L2924/0002 , H01L2924/12044
摘要： A low RC delay interconnection pattern is formed with a low resistivity metal, such as copper, and a low dielectric constant material, such as organic polymers. An intermediate bonding layer is formed between the low resistivity metal and low dielectric constant material employing an adhesion promoter, such as a silane-based adhesion promoter. The adhesion promoter can be applied between the metal and dielectric layers or incorporated in the dielectric layer.

2. 发明授权

US5861677A Low RC interconnection 失效
标题翻译：低RC互连
公开(公告)号：US5861677A
公开(公告)日：1999-01-19
申请号：US890905
申请日：1997-07-10
申请人： Lu You , Robin W. Cheung , Simon S. Chan , Richard J. Huang
发明人： Lu You , Robin W. Cheung , Simon S. Chan , Richard J. Huang
IPC分类号： H01L21/3205 , H01L21/312 , H01L21/768 , H01L23/31 , H01L23/52 , H01L23/522 , H01L23/532 , B29B13/00 , B05D3/02 , H01L21/283
CPC分类号： H01L23/3142 , H01L23/5222 , H01L23/5329 , H01L2924/0002 , H01L2924/12044
摘要： A low RC delay interconnection pattern is formed with a low resistivity metal, such as copper, and a low dielectric constant material, such as organic polymers. An intermediate bonding layer is formed between the low resistivity metal and low dielectric constant material employing an adhesion promoter, such as a silane-based adhesion promoter. The adhesion promoter can be applied between the metal and dielectric layers or incorporated in the dielectric layer.
摘要翻译：低阻抗延迟互连图案由诸如铜的低电阻率金属和诸如有机聚合物的低介电常数材料形成。在使用粘合促进剂的低电阻率金属和低介电常数材料之间形成中间粘合层，例如硅烷类粘合促进剂。粘合促进剂可以施加在金属和电介质层之间或并入电介质层中。

3. 发明授权

US5843836A Tunneling technology for reducing intra-conductive layer capacitance 失效
标题翻译：用于降低导电层电容的隧道技术
公开(公告)号：US5843836A
公开(公告)日：1998-12-01
申请号：US744655
申请日：1996-11-06
申请人： Robin W. Cheung , Simon S. Chan , Richard J. Huang
发明人： Robin W. Cheung , Simon S. Chan , Richard J. Huang
IPC分类号： H01L21/768 , H01L23/522 , H01L23/532 , H01L21/441
CPC分类号： H01L21/7682 , H01L23/5222 , H01L23/5329 , H01L2924/0002
摘要： The control speed of semiconductor circuitry is increased by forming air tunnels in the interwiring spaces of a conductive pattern to reduce intra-conductive layer capacitance.
摘要翻译：通过在导电图案的布线间隙中形成空气隧道以减少导电层电容来增加半导体电路的控制速度。

4. 发明授权

US5670828A Tunneling technology for reducing intra-conductive layer capacitance 失效
标题翻译：用于降低导电层电容的隧道技术
公开(公告)号：US5670828A
公开(公告)日：1997-09-23
申请号：US391692
申请日：1995-02-21
申请人： Robin W. Cheung , Simon S. Chan , Richard J. Huang
发明人： Robin W. Cheung , Simon S. Chan , Richard J. Huang
IPC分类号： H01L21/768 , H01L23/522 , H01L23/532 , H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L21/7682 , H01L23/5222 , H01L23/5329 , H01L2924/0002
摘要： The control speed of semiconductor circuitry is increased by forming air tunnels in the interwiring spaces of a conductive pattern to reduce intra-conductive layer capacitance.
摘要翻译：通过在导电图案的布线间隙中形成空气隧道以减少导电层电容来增加半导体电路的控制速度。

5. 发明授权

US5814560A Metallization sidewall passivation technology for deep sub-half micrometer IC applications 失效
标题翻译：金属化侧壁钝化技术，用于深半微米IC应用
公开(公告)号：US5814560A
公开(公告)日：1998-09-29
申请号：US564752
申请日：1995-11-29
申请人： Robin W. Cheung , Simon S. Chan , Subhash Gupta
发明人： Robin W. Cheung , Simon S. Chan , Subhash Gupta
IPC分类号： H01L23/52 , H01L21/3205 , H01L21/768 , H01L23/528 , H01L23/532 , H01L21/4763
CPC分类号： H01L21/76886 , H01L23/5283 , H01L23/53223 , H01L2924/0002
摘要： A method is provided for forming metal interconnect structures which resists the formation of pile-ups caused by electromigration. Each metal interconnect structure includes an aluminum interconnect sandwiched between two refractory metal layers. The method of the present invention involves forming a layer of aluminum intermetallic alloy on the sidewalls of the aluminum interconnects. The layer of aluminum intermetallic alloy provides reinforcement for the sidewalls. The layer of aluminum intermetallic alloy comprises aluminum-refractory metal alloy. The aluminum-refractory metal alloy is formed by reacting the exposed aluminum on the sidewalls with refractory metal-containing precursor material. After the formation of the layer of aluminum intermetallic alloy the sidewalls of the aluminum interconnects, the formation of pile-ups will be suppressed. Thus, the lifetime of the aluminum interconnects is extended. Accordingly, the method of the present invention improves the reliability and wear resistance of integrated circuits employing aluminum interconnects.
摘要翻译：提供一种用于形成金属互连结构的方法，其抵抗由电迁移引起的堆积的形成。每个金属互连结构包括夹在两个难熔金属层之间的铝互连。本发明的方法包括在铝互连件的侧壁上形成铝金属间合金层。铝金属间合金层为侧壁提供加固。铝金属间合金层包括铝 - 难熔金属合金。铝 - 难熔金属合金是通过将侧壁上暴露的铝与含难熔金属的前体材料反应而形成的。在形成铝金属间合金层之后，铝互连的侧壁，堆积的形成将被抑制。因此，铝互连的寿命延长。因此，本发明的方法提高了采用铝互连的集成电路的可靠性和耐磨性。

6. 发明授权

US5674781A Landing pad technology doubled up as a local interconnect and borderless contact for deep sub-half micrometer IC application 失效
标题翻译：作为本地互连和无边界接触，着陆垫技术加倍，用于深度二分之一微米IC应用
公开(公告)号：US5674781A
公开(公告)日：1997-10-07
申请号：US608377
申请日：1996-02-28
申请人： Richard J. Huang , Robin W. Cheung , Rajat Rakkhit , Raymond T. Lee
发明人： Richard J. Huang , Robin W. Cheung , Rajat Rakkhit , Raymond T. Lee
IPC分类号： H01L23/522 , H01L23/532 , H01L21/441
CPC分类号： H01L21/76895 , H01L21/28518 , H01L23/485 , H01L23/53257 , H01L2924/0002 , Y10S257/915
摘要： The present invention is directed to a technology that simplifies the process of fabricating multilayer interconnects and reduces capacitance in integrated circuits employing multilayer interconnects. The novel landing pad technology of the present invention simplifies the current process steps involved in the formation of multilayer interconnects. The same contact/via etch, the same PVD TiN deposition, etc., can be modularized and repeated to build up multilayer metalization. The process of the present invention for forming multilayer interconnects involves the formation of Ti/TiN stack interconnect structures that can be used as local interconnects and contact landing pads on the same level. The contact landing pads facilitate the use of a borderless contact approach which enables a reduction in the size of the source-drain area. As the source-drain area is reduced, junction capacitance decreases, and packing density can be increased. Source-drain real estate can be also be minimized by using the Ti/TiN stack interconnect structures as contact landing pads in the implementation of raised source-drain technology. The Ti/TiN stack interconnect structures can also be used as short local interconnects in SRAM devices.
摘要翻译：本发明涉及一种简化多层互连的制造工艺并减少采用多层互连的集成电路中的电容的技术。本发明的新型着陆垫技术简化了形成多层互连所涉及的当前工艺步骤。相同的接触/通孔蚀刻，相同的PVD TiN沉积等可以被模块化和重复以建立多层金属化。用于形成多层互连的本发明的方法涉及形成可用作局部互连的Ti / TiN叠层互连结构并且在相同的层上接触着陆焊盘。接触着陆垫有利于使用无边界接触方法，这使得能够减小源极 - 漏极区域的尺寸。随着源极 - 漏极面积的减小，结电容降低，堆积密度增加。在实施升高的源极 - 漏极技术中，通过使用Ti / TiN堆叠互连结构作为接触着陆焊盘，也可以最大限度地减少源极漏极空间。 Ti / TiN堆叠互连结构也可以用作SRAM器件中的短局部互连。

7. 发明授权

US5654589A Landing pad technology doubled up as local interconnect and borderless contact for deep sub-half micrometer IC application 失效
标题翻译：作为本地互连和无边界接触，着陆垫技术加倍，用于深半微米IC应用
公开(公告)号：US5654589A
公开(公告)日：1997-08-05
申请号：US466649
申请日：1995-06-06
申请人： Richard J. Huang , Robin W. Cheung , Rajat Rakkhit , Raymond T. Lee
发明人： Richard J. Huang , Robin W. Cheung , Rajat Rakkhit , Raymond T. Lee
IPC分类号： H01L23/522 , H01L23/532 , H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L21/76895 , H01L21/28518 , H01L23/485 , H01L23/53257 , H01L2924/0002 , Y10S257/915
摘要： The present invention is directed to a technology that simplifies the process of fabricating multilayer interconnects and reduces capacitance in integrated circuits employing multilayer interconnects. The novel landing pad technology of the present invention simplifies the current process steps involved in the formation of multilayer interconnects. The same contact/via etch, the same PVD TiN deposition, etc., can be modularized and repeated to build up multilayer metalization. The process of the present invention for forming multilayer interconnects involves the formation of Ti/TiN stack interconnect structures that can be used as local interconnects and contact landing pads on the same level. The contact landing pads facilitate the use of a borderless contact approach which enables a reduction in the size of the source-drain area. As the source-drain area is reduced, junction capacitance decreases, and packing density can be increased. Source-drain real estate can be also be minimized by using the Ti/TiN stack interconnect structures as contact landing pads in the implementation of raised source-drain technology. The Ti/TiN stack interconnect structures can also be used as short local interconnects in SRAM devices.
摘要翻译：本发明涉及一种简化多层互连的制造工艺并减少采用多层互连的集成电路中的电容的技术。本发明的新型着陆垫技术简化了形成多层互连所涉及的当前工艺步骤。相同的接触/通孔蚀刻，相同的PVD TiN沉积等可以被模块化和重复以建立多层金属化。用于形成多层互连的本发明的方法涉及形成可用作局部互连的Ti / TiN叠层互连结构并且在相同的层上接触着陆焊盘。接触着陆垫有利于使用无边界接触方法，这使得能够减小源极 - 漏极区域的尺寸。随着源极 - 漏极面积的减小，结电容降低，堆积密度增加。在实施升高的源极 - 漏极技术中，通过使用Ti / TiN堆叠互连结构作为接触着陆焊盘，也可以最大限度地减少源极漏极空间。 Ti / TiN堆叠互连结构也可以用作SRAM器件中的短局部互连。

8. 发明授权

US06271120B1 Method of enhanced silicide layer for advanced metal diffusion barrier layer application 失效
标题翻译：用于先进金属扩散阻挡层应用的增强硅化物层的方法
公开(公告)号：US06271120B1
公开(公告)日：2001-08-07
申请号：US08402252
申请日：1995-03-10
申请人： Richard J. Huang , Robin W. Cheung
发明人： Richard J. Huang , Robin W. Cheung
IPC分类号： H01L214763
CPC分类号： H01L21/76867 , H01L21/76843
摘要： A rapid thermal anneal (>600° C.) in a nitrogen-containing atmosphere is used to form a barrier TiN layer at the bottom of contact openings. To form source and drain contacts, contact openings are etched in a dielectric down to a titanium silicide layer on top of doped regions in the semiconductor (i.e. polysilicon or doped regions in the semiconductor substrate). The barrier TiN layer on the bottom of the contact openings is provided by a rapid thermal anneal in a nitrogen-containing atmosphere which converts the top part of the titanium silicide layer in the contact openings into a barrier TiN layer. This nitrogen-containing atmosphere contains nitrogen-containing species (e.g., N2, NH3, N2O) that react with titanium silicide to form TiN under the conditions provided by the rapid thermal anneal.
摘要翻译：在含氮气氛中的快速热退火（> 600℃）用于在接触开口的底部形成阻挡层TiN层。为了形成源极和漏极触点，在电介质中将接触开口蚀刻到半导体中的掺杂区域（即半导体衬底中的多晶硅或掺杂区域）顶部的硅化钛层。通过在含氮气氛中的快速热退火来提供接触开口底部的阻挡层TiN层，其将接触开口中的硅化钛层的顶部转化为势垒TiN层。该含氮气氛含有与硅化钛反应形成TiN的含氮物质（例如，N 2，NH 3，N 2 O），在快速热退火条件下

9. 发明授权

US5625231A Low cost solution to high aspect ratio contact/via adhesion layer application for deep sub-half micrometer back-end-of line technology 失效
标题翻译：低成本解决高长宽比接触/通过粘合层应用深层次半微米后端的线技术
公开(公告)号：US5625231A
公开(公告)日：1997-04-29
申请号：US402254
申请日：1995-03-10
申请人： Richard J. Huang , Robin W. Cheung
发明人： Richard J. Huang , Robin W. Cheung
IPC分类号： H01L23/485 , H01L23/522 , H01L23/532 , H01L23/48 , H01L29/41
CPC分类号： H01L23/53223 , H01L23/485 , H01L23/5226 , H01L2924/0002 , Y10S257/915
摘要： A process for applying a TiN contact/via adhesion layer to high aspect ratio contact/via openings etched in a dielectric comprises providing a first layer of TiN on the bottom of the contact/via openings and then depositing the second layer of TiN on the first layer of TiN and on the sidewalls of the contact/via openings. The second layer of TiN serves as the contact/via adhesion layer for structurally supporting the adhesion of a tungsten plug in the contact/via openings. In the case where a contact is etched in the dielectric down to a junction with a titanium silicide layer on top, the first layer of TiN on the bottom of the contact opening is provided by a rapid thermal anneal in a nitrogen-containing atmosphere which converts the top part of the titanium silicide layer in the contact into a barrier TiN layer. Alternatively, in the case where a contact is etched in the dielectric down to an underlying barrier TiN layer, the first layer of TiN on the bottom of the contact opening can be provided by a contact etch which is able to stop on an underlying barrier TiN layer with minimum TiN loss. In the case where a via is etched in the dielectric down to an underlying TiN anti-reflection coating on top of a metal layer, the first layer of TiN on the bottom of the via is provided by a via etch which is able to stop on the underlying TiN anti-reflection coating on top of the metal layer with minimum TiN loss.
摘要翻译：将TiN接触/通孔粘合层施加到蚀刻在电介质中的高纵横比接触/通孔开口的方法包括在接触/通孔开口的底部提供第一TiN层，然后在第一层上沉积TiN的第二层 TiN层和接触/通孔开口的侧壁上。第二层TiN用作接触/通孔粘合层，用于在接触/通孔开口中结构地支撑钨丝塞的粘附。在将电介质中的接触层蚀刻到顶部具有硅化钛层的接合点的情况下，接触开口底部的第一TiN层由含氮气氛中的快速热退火提供，钛硅化物层的顶部接触形成阻挡TiN层。或者，在将电介质中的接触蚀刻到下面的阻挡层TiN层的情况下，接触开口底部的第一TiN层可以通过接触蚀刻来提供，该接触蚀刻能够在下面的势垒TiN 具有最小TiN损失的层。在通孔在电介质中蚀刻到金属层顶部的下面的TiN抗反射涂层的情况下，通孔底部的第一TiN层由通孔蚀刻提供，该通孔蚀刻能够停止金属层顶部的TiN抗反射涂层，TiN损失最小。

10. 发明授权

US5970370A Manufacturing capping layer for the fabrication of cobalt salicide structures 有权
标题翻译：用于制造钴化硅化物结构的制造覆盖层
公开(公告)号：US5970370A
公开(公告)日：1999-10-19
申请号：US208597
申请日：1998-12-08
申请人： Paul R. Besser , Robin W. Cheung , Robert Chen
发明人： Paul R. Besser , Robin W. Cheung , Robert Chen
IPC分类号： H01L21/28 , H01L21/285 , H01L21/336 , H01L21/768
CPC分类号： H01L29/665 , H01L21/28052 , H01L21/28518 , H01L21/76895 , Y10S438/902
摘要： An improved process for manufacturing cobalt silicide layers uses two capping layers. A first capping layer of titanium nitride prevents the formation of a cobalt/titanium intermetallic. A subsequently formed titanium metallic layer getters impurities from outgassing and the ambient preventing corruption of the cobalt layer. Two rapid thermal annealing steps convert the cobalt at the cobalt/silicon intermetallic into highly conductive cobalt disilicide. The cobalt silicide does not suffer from linewidth dependent increases in resistivity. Therefore, the cobalt disilicide formed by the present method is useful for semiconductor devices with linewidths and feature sizes less than 0.20 .mu.m. The process has wide applicability and may be used to fabricate local circuit interconnects, floating gates, double polysilicon stacked floating gates as well as other uses.
摘要翻译：制造钴硅化物层的改进方法使用两个封盖层。氮化钛的第一覆盖层防止形成钴/钛金属间化合物。随后形成的钛金属层吸收来自除气的杂质和环境防止钴层的腐蚀。两个快速热退火步骤将钴/硅金属间的钴转化为高导电性的二硅化钴。硅化钴不影响电阻率的线宽依赖性增加。因此，通过本方法形成的二硅化钴对于具有小于0.20μm的线宽和特征尺寸的半导体器件是有用的。该方法具有广泛的适用性，可用于制造本地电路互连，浮动栅极，双多晶硅堆叠浮栅以及其他用途。

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