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1. 发明授权

US08912809B2 Methods and apparatus for performing wafer-level testing on antenna tuning elements 有权
标题翻译：在天线调谐元件上执行晶片级测试的方法和装置
公开(公告)号：US08912809B2
公开(公告)日：2014-12-16
申请号：US13494663
申请日：2012-06-12
申请人： Liang Han , Matthew A. Mow , Ming Tsai , Thomas E. Biedka , Robert W. Schlub , Ruben Caballero
发明人： Liang Han , Matthew A. Mow , Ming Tsai , Thomas E. Biedka , Robert W. Schlub , Ruben Caballero
IPC分类号： G01R31/00 , G01R31/26
CPC分类号： H01Q9/0442 , H01Q9/42 , H04B17/21
摘要： A test system for testing an antenna tuning element is provided. The test system may include a tester, a test fixture, and a probing structure. The probing structure may include probe tips configured to mate with corresponding solder bumps formed on a device under test (DUT) containing an antenna tuning element. The DUT may be tested in a shunt or series configuration. The tester may be electrically coupled to the test probe via first and second connectors on the test fixture. An adjustable load circuit that is coupled to the second connector may be configured in a selected state so that a desired amount of electrical stress may be presented to the DUT during testing. The tester may be used to obtain measurement results on the DUT. Systematic effects associated with the test structures may be de-embedded from the measured results to obtain calibrated results.
摘要翻译：提供了一种用于测试天线调谐元件的测试系统。测试系统可以包括测试仪，测试夹具和探测结构。探测结构可以包括配置成与包含天线调谐元件的被测器件（DUT）上形成的相应焊料凸块配合的探针尖端。可以在分流或串联配置中测试DUT。测试器可以通过测试夹具上的第一和第二连接器电耦合到测试探针。耦合到第二连接器的可调节负载电路可以被配置为选择状态，使得在测试期间可以向DUT呈现期望量的电应力。测试仪可用于获得DUT上的测量结果。与测试结构相关的系统效应可以从测量结果中去嵌入，以获得校准结果。

2. 发明申请

US20130328582A1 Methods and Apparatus for Performing Wafer-Level Testing on Antenna Tuning Elements 有权
标题翻译：在天线调谐元件上进行晶片级测试的方法和装置
公开(公告)号：US20130328582A1
公开(公告)日：2013-12-12
申请号：US13494663
申请日：2012-06-12
申请人： Liang Han , Matthew A. Mow , Ming Tsai , Thomas E. Biedka , Robert W. Schlub , Ruben Caballero
发明人： Liang Han , Matthew A. Mow , Ming Tsai , Thomas E. Biedka , Robert W. Schlub , Ruben Caballero
IPC分类号： G01R31/00 , G01R31/26 , G01R35/00
CPC分类号： H01Q9/0442 , H01Q9/42 , H04B17/21
摘要： A test system for testing an antenna tuning element is provided. The test system may include a tester, a test fixture, and a probing structure. The probing structure may include probe tips configured to mate with corresponding solder bumps formed on a device under test (DUT) containing an antenna tuning element. The DUT may be tested in a shunt or series configuration. The tester may be electrically coupled to the test probe via first and second connectors on the test fixture. An adjustable load circuit that is coupled to the second connector may be configured in a selected state so that a desired amount of electrical stress may be presented to the DUT during testing. The tester may be used to obtain measurement results on the DUT. Systematic effects associated with the test structures may be de-embedded from the measured results to obtain calibrated results.
摘要翻译：提供了一种用于测试天线调谐元件的测试系统。测试系统可以包括测试仪，测试夹具和探测结构。探测结构可以包括配置成与包含天线调谐元件的被测器件（DUT）上形成的相应焊料凸块配合的探针尖端。 DUT可以在分流或串联配置下进行测试。测试器可以通过测试夹具上的第一和第二连接器电耦合到测试探针。耦合到第二连接器的可调节负载电路可以被配置为选择状态，使得在测试期间可以向DUT呈现期望量的电应力。测试仪可用于获得DUT上的测量结果。与测试结构相关的系统效应可以从测量结果中去嵌入，以获得校准结果。

3. 发明申请

US20070102765A1 Layout structure of electrostatic discharge protection circuit 有权
公开(公告)号：US20070102765A1
公开(公告)日：2007-05-10
申请号：US11364178
申请日：2006-03-01
申请人： Ming Tsai , Chih-Long Ho
发明人： Ming Tsai , Chih-Long Ho
IPC分类号： H01L23/62
CPC分类号： H01L23/60 , H01L23/5222 , H01L27/0251 , H01L2924/0002 , H01L2924/00
摘要： A layout structure of electrostatic discharge (ESD) protection circuit cooperated with an ESD protection device includes a first electrically conductive layer and a second electrically conductive layer. The first electrically conductive layer is disposed on the ESD protection device and electrically connected to the ESD protection device. The second electrically conductive layer is disposed on the first electrically conductive layer and electrically connected to the first electrically conductive layer. A width or a projection area of the second electrically conductive layer is less than that of the first electrically conductive layer.

4. 发明授权

US07151502B2 Phased antenna array module 有权
标题翻译：相控天线阵列模块
公开(公告)号：US07151502B2
公开(公告)日：2006-12-19
申请号：US11025397
申请日：2004-12-29
申请人： Andy Stavros , Ming Tsai , Stuart E. Wilson
发明人： Andy Stavros , Ming Tsai , Stuart E. Wilson
IPC分类号： H01Q21/00
CPC分类号： H01Q9/285 , H01Q21/0025
摘要： A phased antenna array is disclosed. The phased antenna array is composed of one or more modules and has a plurality of antenna. The array has a plurality of antenna configured to operate as an array and each module has at least one antenna. The modules have a substrate that supports the antenna, a microelectronic device for sending signals to or receiving signals from said antenna and conductive traces that connect that antenna to the microelectronic device. In those embodiments where the phased antenna array has more than one module, a common substrate supports the one or more modules. A combination of circuitry and interconnects achieves the desired electrical interconnection between the modules.
摘要翻译：公开了一种相控天线阵列。相控天线阵列由一个或多个模块组成并具有多个天线。阵列具有被配置为作为阵列操作的多个天线，并且每个模块具有至少一个天线。模块具有支撑天线的基板，用于向所述天线发送信号或从所述天线接收信号的微电子装置和将该天线连接到微电子装置的导电迹线。在相控天线阵列具有多于一个模块的那些实施例中，公共基板支撑一个或多个模块。电路和互连的组合实现了模块之间期望的电互连。

5. 发明申请

US20060089606A1 Medicine-adding port of vein infusion set and catheter needle set 审中-公开
标题翻译：静脉输液器和导管针组加药口
公开(公告)号：US20060089606A1
公开(公告)日：2006-04-27
申请号：US10971036
申请日：2004-10-25
申请人： Ming Tsai , Chia Tsai , Tsai Mu
发明人： Ming Tsai , Chia Tsai , Tsai Mu
IPC分类号： A61M5/14
CPC分类号： A61M5/1408 , A61M5/1412 , A61M39/02 , A61M39/20 , A61M39/26
摘要： A drug administration port of infusion set and catheter needle set, including: a drug administration socket having a drug through hole, a free end of the drug administration socket being formed with a seat defining an opening communicating with the drug through hole; a plastic plug for blocking the opening of the seat; and a connecting member connected with the free end of the drug administration socket. The connecting member has a tapered hole axially positioned on the upper face of the plastic plug. A small diameter end of the tapered hole faces the plastic plug. A threaded section is formed on an opposing end of the connecting member. An upper face of the plastic plug is cut with a split axially corresponding to the position of the tapered hole. The split serves to communicate with the drug through hole.
摘要翻译：输液器和导管针组的药物管理端口，包括：具有药物通孔的药物管理插座，药物管理插座的自由端形成有限定与药物通孔连通的开口的座; 用于阻挡座椅开口的塑料塞子; 以及与药物管理插座的自由端连接的连接部件。连接构件具有轴向位于塑料塞的上表面上的锥形孔。锥形孔的小直径端面向塑料塞。螺纹部分形成在连接构件的相对端上。塑料塞的上表面是与锥形孔的位置轴向地分开切割的。分裂用于与药物通孔沟通。

6. 发明申请

US20060139210A1 Phased antenna array module 有权
公开(公告)号：US20060139210A1
公开(公告)日：2006-06-29
申请号：US11025397
申请日：2004-12-29
申请人： Andy Stavros , Ming Tsai , Stuart Wilson
发明人： Andy Stavros , Ming Tsai , Stuart Wilson
IPC分类号： H01Q1/38
CPC分类号： H01Q9/285 , H01Q21/0025
摘要： A phased antenna array is disclosed. The phased antenna array is composed of one or more modules and has a plurality of antenna. The array has a plurality of antenna configured to operate as an array and each module has at least one antenna. The modules have a substrate that supports the antenna, a microelectronic device for sending signals to or receiving signals from said antenna and conductive traces that connect that antenna to the microelectronic device. In those embodiments where the phased antenna array has more than one module, a common substrate supports the one or more modules. A combination of circuitry and interconnects achieves the desired electrical interconnection between the modules.

7. 发明申请

US20060027460A1 Metal interconnect features with a doping gradient 有权
标题翻译：具有掺杂梯度的金属互连特性
公开(公告)号：US20060027460A1
公开(公告)日：2006-02-09
申请号：US10913759
申请日：2004-08-06
申请人： Chung Chang , Ming Tsai , Winston Shue
发明人： Chung Chang , Ming Tsai , Winston Shue
IPC分类号： C25D5/18 , C25D7/12
CPC分类号： H01L21/76877 , C25D5/18 , C25D7/123 , H01L21/2885
摘要： A metal filled damascene structure with improved electromigration resistance and method for forming the same, the method including providing a semiconductor process wafer comprising damascene openings; and, depositing metal and at least one metal dopant according to an ECD process to from a metal filled damascene comprising a doped metal alloy portion.
摘要翻译：一种具有改进的电迁移电阻的金属填充镶嵌结构及其形成方法，所述方法包括提供包括镶嵌开口的半导体工艺晶片; 以及根据ECD工艺将金属和至少一种金属掺杂剂沉积到包含掺杂金属合金部分的金属填充镶嵌件中。

8. 发明申请

US20050083121A1 Trace-following powered amplifier 审中-公开
标题翻译：跟踪功率放大器
公开(公告)号：US20050083121A1
公开(公告)日：2005-04-21
申请号：US10813290
申请日：2004-03-30
申请人： Ming Tsai , Ping Ling
发明人： Ming Tsai , Ping Ling
IPC分类号： H03F1/02 , H03G3/00 , H03G3/20
CPC分类号： H03F1/0222 , H03G3/004
摘要： The invention disclosed a trace following powered amplifier mainly used in solving the problem of circuit overheating caused by long test time, especially to an amplifier applicable to a low frequency and low distortion test apparatus such as a capacitor ripple current tester. The amplifier of present invention can make the most efficient use of electrical energy by incorporating a low frequency voltage peak value of an amplifier signal plus an estimated tolerance.
摘要翻译：本发明公开了主要用于解决由长测试时间引起的电路过热问题的跟随放大放大器，特别是适用于诸如电容器纹波电流测试仪的低频和低失真测试装置的放大器。本发明的放大器可以通过结合放大器信号的低频电压峰值加估计公差来最有效地利用电能。

9. 发明申请

US20050024869A1 Illuminated pattern device 有权
标题翻译：照明图案装置
公开(公告)号：US20050024869A1
公开(公告)日：2005-02-03
申请号：US10893610
申请日：2004-07-16
申请人： Ga-Lane Chen , Tsung-Wei Chiang , Chun-Yu Lee , Ming Tsai
发明人： Ga-Lane Chen , Tsung-Wei Chiang , Chun-Yu Lee , Ming Tsai
IPC分类号： G09F13/04 , F21V1/14
CPC分类号： G09F13/04 , Y10S362/812
摘要： An illuminated pattern device includes a pattern body (32) having a pattern (321), a bottom board (39) having a reflective surface, a plurality of dot light sources arranged on the bottom board, and a frame (36) sandwiched between the pattern body and the bottom board. The pattern defines a projection surface on the bottom board. The dot light sources are evenly arranged on the bottom board such that they provide relatively uniform brightness for the pattern body.
摘要翻译：照明图案装置包括具有图案（321）的图案体（32），具有反射表面的底板（39），布置在底板上的多个点光源和夹在其间的框架（36）图案体和底板。图案定义了底板上的投影面。点光源均匀地布置在底板上，使得它们为图案体提供相对均匀的亮度。

10. 发明授权

US07489524B2 Assembly including vertical and horizontal joined circuit panels 有权
标题翻译：组装包括垂直和水平连接电路板
公开(公告)号：US07489524B2
公开(公告)日：2009-02-10
申请号：US11143201
申请日：2005-06-02
申请人： Ronald Green , Sridhar Krishnan , Stuart E. Wilson , James Gill Shook , Ming Tsai , Andy Stavros
发明人： Ronald Green , Sridhar Krishnan , Stuart E. Wilson , James Gill Shook , Ming Tsai , Andy Stavros
IPC分类号： H05K1/11
CPC分类号： H05K3/368 , H05K1/145 , H05K3/0052 , H05K3/3442 , H05K3/366 , H05K3/403 , H05K3/4092 , H05K2201/0397 , H05K2201/048 , H05K2201/0715 , H05K2201/09036 , H05K2201/09181 , H05K2201/09845 , H05K2201/0999 , H05K2201/10484
摘要： An assembly is provided which includes a first circuit panel having a top surface, a first dielectric element and first conductive traces disposed on the first dielectric element. In addition, a second circuit panel has a bottom surface, a second dielectric element and second conductive traces disposed on the second dielectric element, where at least a portion of the second circuit panel overlies at least a portion of the first circuit panel. The assembly further includes an interconnect circuit panel having a third dielectric element which has a front surface, a rear surface opposite the front surface, a top end extending between the front and rear surfaces, a bottom end extending between the front and rear surfaces, and a plurality of interconnect traces disposed on the dielectric element. The bottom end of the interconnect element abuts the top surface of the first circuit panel and the top end abuts the bottom surface of the second circuit panel, where at least some of the first conductive traces are in conductive communication with the second conductive traces through the interconnect traces.
摘要翻译：提供了一种组件，其包括具有顶表面的第一电路板，设置在第一介电元件上的第一介电元件和第一导电迹线。此外，第二电路板具有底表面，第二介电元件和设置在第二电介质元件上的第二导电迹线，其中第二电路板的至少一部分覆盖在第一电路板的至少一部分上。该组件还包括具有第三电介质元件的互连电路板，第三电介质元件具有前表面，与前表面相对的后表面，在前表面和后表面之间延伸的顶端，在前表面和后表面之间延伸的底端，以及布置在电介质元件上的多个互连迹线。互连元件的底端邻接第一电路板的顶表面，并且顶端邻接第二电路板的底表面，其中至少一些第一导电迹线通过第二导电迹线与第二导电迹线导通连通互连线。

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