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    • 6. 发明授权
    • Digital time alignment in a polar modulator
    • 极坐标调制器中的数字时间校准
    • US07042958B2
    • 2006-05-09
    • US10454906
    • 2003-06-04
    • Thomas E. BiedkaWayne S. LeeGary L. Do
    • Thomas E. BiedkaWayne S. LeeGary L. Do
    • H04K1/02
    • H04L27/361H03C5/00
    • Methods of and apparatus for digitally controlling, with sub-sample resolution, the relative timing of the magnitude and phase paths in a polar modulator. The timing resolution is limited by the dynamic range of the system as opposed to the sample rate. The methods and apparatus of the invention use a digital filter to approximate a sub-sample time delay. Various techniques for approximating a sub-sample time delay using digital signal processing may be used to achieve the approximation. Ideally, the filter will have an all-pass magnitude response and a linear phase response. In practice, the magnitude may be low-pass and the phase may not be perfectly linear. Such deviation from the ideal response will introduce some distortion. However, this distortion may be acceptably small depending on the particular signal being processed.
    • 利用子样本分辨率数字控制的方法和装置,极坐标调制器中的幅度和相位路径的相对定时。 定时分辨率受系统动态范围的限制,而不是采样率。 本发明的方法和装置使用数字滤波器近似子采样时间延迟。 可以使用用于使用数字信号处理近似子采样时间延迟的各种技术来实现近似。 理想情况下,滤波器将具有全通幅度响应和线性相位响应。 实际上,幅度可能是低通,相位可能不是完全线性的。 这种偏离理想的反应会引入一些失真。 然而,根据正在处理的特定信号,该失真可能是可接受的。
    • 8. 发明申请
    • SYSTEM FOR TESTING MULTI-ANTENNA DEVICES USING BIDIRECTIONAL FADED CHANNELS
    • 使用双向渐变通道测试多天线设备的系统
    • US20120100813A1
    • 2012-04-26
    • US13052381
    • 2011-03-21
    • Matt A. MowRobert W. SchlubRocco V. Dragone, JR.Ruben CaballeroThomas E. Biedka
    • Matt A. MowRobert W. SchlubRocco V. Dragone, JR.Ruben CaballeroThomas E. Biedka
    • H04B17/00
    • H04B17/3911H04B7/10H04B17/12H04B17/16
    • A test system for testing multiple-input and multiple-output (MIMO) systems is provided. The test system may convey radio-frequency (RF) signals bidirectionally between a device under test (DUT) and at least one base station. The DUT may be placed within a test chamber during testing. An antenna mounting structure may surround the DUT. Multiple antennas may be mounted on the antenna mounting structure to transmit and receive RF signals to and from the DUT. A first group of dual-polarized antennas may be coupled to the base station through downlink circuitry. A second group of dual-polarized antennas may be coupled to the base station through uplink circuitry. The uplink and downlink circuitry may each include a splitter/combiner, channel emulators, amplifier circuits, and switch circuitry. The channel emulators and amplifier circuits may be configured to provide desired path loss, spatial interference, and channel characteristics to model real-world wireless network transmission.
    • 提供了一种用于测试多输入和多输出(MIMO)系统的测试系统。 测试系统可以在被测设备(DUT)和至少一个基站之间双向地传送射频(RF)信号。 在测试期间,DUT可以放置在测试室内。 天线安装结构可以围绕DUT。 可以在天线安装结构上安装多个天线以向DUT发送和接收RF信号。 第一组双极化天线可以通过下行链路电路耦合到基站。 第二组双极化天线可以通过上行链路电路耦合到基站。 上行链路和下行链路电路可以各自包括分离器/组合器,信道仿真器,放大器电路和开关电路。 信道仿真器和放大器电路可以被配置为提供期望的路径损耗,空间干扰和信道特性来建模真实世界的无线网络传输。
    • 9. 发明授权
    • Multi-point modulation and VCO compensation
    • 多点调制和VCO补偿
    • US07576615B2
    • 2009-08-18
    • US11890597
    • 2007-08-06
    • Thomas E. Biedka
    • Thomas E. Biedka
    • H03L7/00
    • H03L7/093H03C3/0925H03C3/0933H03C3/0941H03C3/095H03C3/0966H03C3/0991H03L2207/06
    • The present invention, generally speaking, provides a VCO linearization technique applicable to advanced loop architectures. In particular, the linearization technique is applicable to a mostly-digital frequency locked loop (FLL), phase locked loop (PLL) or the like using multi-point modulation. In an exemplary embodiment, a correction table is used to form a corrected control variable that affects one modulation point only (e.g., a fast modulation path) of the multi-point modulation circuit. The other modulation point (e.g., a slow modulation path) of the multi-point modulation circuit is controlled in accordance with an error-forming circuit including a loop filter. The use of correction within the fast path enables the VCO to achieve more rapid phase changes than would otherwise be possible, an advantage in high-data-rate communications applications, for example.
    • 本发明一般地提供一种适用于高级环路架构的VCO线性化技术。 特别地,线性化技术可应用于使用多点调制的大多数数字锁相环(FLL),锁相环(PLL)等。 在示例性实施例中,校正表用于形成影响多点调制电路的一个调制点(例如,快速调制路径)的校正控制变量。 根据包括环路滤波器的误差形成电路来控制多点调制电路的另一调制点(例如,慢调制路径)。 在快速通路中使用校正使得VCO能够实现比否则可能的更快速的相位变化,例如在高数据速率通信应用中的优点。