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1. 发明申请

US20100230777A1 SELECTIVE STI STRESS RELAXATION THROUGH ION IMPLANTATION 有权
标题翻译：选择性的STI应力放松通过离子植入
公开(公告)号：US20100230777A1
公开(公告)日：2010-09-16
申请号：US12790975
申请日：2010-05-31
申请人： Lee Wee TEO , Shiang Yang ONG , Jae Gon LEE , Vincent LEONG , Elgin QUEK , Dong Kyun SOHN
发明人： Lee Wee TEO , Shiang Yang ONG , Jae Gon LEE , Vincent LEONG , Elgin QUEK , Dong Kyun SOHN
IPC分类号： H01L29/06
CPC分类号： H01L27/092 , H01L21/31155 , H01L21/76224 , H01L21/823807 , H01L29/6659 , H01L29/7846
摘要： A first example embodiment comprises the following steps and the structure formed therefrom. A trench having opposing sidewalls is formed within a substrate. A stress layer having an inherent stress is formed over the opposing trench sidewalls. The stress layer having stress layer sidewalls over the trench sidewalls. Ions are implanted into one or more portions of the stress layer to form ion-implanted relaxed portions with the portions of the stress layer that are not implanted are un-implanted portions, whereby the inherent stress of the one or more ion-implanted relaxed portions of stress layer portions is relaxed.
摘要翻译：第一示例性实施例包括以下步骤和由其形成的结构。在衬底内形成具有相对侧壁的沟槽。在相对的沟槽侧壁上形成具有固有应力的应力层。应力层在沟槽侧壁上具有应力层侧壁。将离子注入应力层的一个或多个部分以形成离子注入的松弛部分，其中未注入的应力层的部分是未注入的部分，由此一个或多个离子注入的松弛部分的固有应力的应力层部分被松弛。

2. 发明申请

US20090023280A1 METHOD FOR FORMING HIGH-K CHARGE STORAGE DEVICE 审中-公开
标题翻译：用于形成高K充电存储器件的方法
公开(公告)号：US20090023280A1
公开(公告)日：2009-01-22
申请号：US12243962
申请日：2008-10-01
申请人： Chew-Hoe ANG , Dong Kyun SOHN , Liang Choo HSIA
发明人： Chew-Hoe ANG , Dong Kyun SOHN , Liang Choo HSIA
IPC分类号： H01L21/3205
CPC分类号： H01L29/513 , H01L29/40117 , H01L29/792
摘要： Structures and methods of fabricating of a floating gate non-volatile memory device. In a first example embodiment, We form a bottom tunnel layer comprised of a lower oxide tunnel layer and a upper hafnium oxide tunnel layer; a charge storage layer comprised of a tantalum oxide and a top blocking layer preferably comprised of a lower hafnium oxide storage layer and an upper oxide storage layer. We form a gate electrode over the top blocking layer. We pattern the layers to form a gate structure and form source/drain regions to complete the memory device. In a second example embodiment, we form a floating gate non-volatile memory device comprised of: a bottom tunnel layer comprised essentially of silicon oxide; a charge storage layer comprised of a tantalum oxide; a top blocking layer comprised essentially of silicon oxide; and a gate electrode. The embodiments also comprise anneals and nitridation steps.
摘要翻译：浮栅非易失性存储器件的制造结构和方法。在第一示例性实施例中，我们形成由较低氧化物隧道层和上部氧化铪隧道层组成的底部隧道层; 电荷存储层，其由氧化钽和顶部阻挡层组成，其优选由下部氧化铪存储层和上部氧化物存储层组成。我们在顶部阻挡层上形成栅电极。我们对这些层进行图案化以形成栅极结构并形成源极/漏极区域以完成存储器件。在第二示例实施例中，我们形成浮栅非易失性存储器件，其包括：基本上由氧化硅组成的底部隧道层; 电荷存储层，由钽氧化物构成; 基本上由氧化硅组成的顶部阻挡层; 和栅电极。实施例还包括退火和氮化步骤。

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