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    • 1. 发明授权
    • Method of forming a pattern and method of manufacturing a capacitor
    • 形成图案的方法和制造电容器的方法
    • US08053308B2
    • 2011-11-08
    • US11945934
    • 2007-11-27
    • Kyoung-Min KimJae-Ho KimYoung-Ho KimMyung-Sun Kim
    • Kyoung-Min KimJae-Ho KimYoung-Ho KimMyung-Sun Kim
    • H01L21/8242
    • H01G4/33H01L27/10814H01L27/10852H01L28/91
    • In a method of forming a pattern, a mold layer having an opening is formed on a substrate. A conductive layer is formed on the mold layer having the opening, the conductive layer having a substantially uniform thickness. A buffer layer pattern is formed in the opening having the conductive layer, the buffer layer pattern having a cross-linked structure of water-soluble copolymers including a repeating unit of N-vinyl-2-pyrrolidone and a repeating unit of acrylate. An upper portion of the conductive layer exposed over the buffer layer pattern is etched. Accordingly, a conductive pattern for a semiconductor device is formed on the substrate. The method of forming a pattern may simplify manufacturing processes for a capacitor and a semiconductor device, and may improve their efficiencies.
    • 在形成图案的方法中,在基板上形成具有开口的模具层。 在具有开口的模具层上形成导电层,导电层具有基本均匀的厚度。 在具有导电层的开口中形成缓冲层图案,缓冲层图案具有包含N-乙烯基-2-吡咯烷酮的重复单元和丙烯酸重复单元的水溶性共聚物的交联结构。 蚀刻在缓冲层图案上暴露的导电层的上部。 因此,在基板上形成用于半导体器件的导电图案。 形成图案的方法可以简化电容器和半导体器件的制造工艺,并且可以提高它们的效率。
    • 3. 发明授权
    • Method of forming fine pattern employing self-aligned double patterning
    • 使用自对准双重图案形成精细图案的方法
    • US08071484B2
    • 2011-12-06
    • US12132548
    • 2008-06-03
    • Kyoung-Mi KimJae-Ho KimYoung-Ho KimMyung-Sun KimYoun-Kyung WangMi-Ra Park
    • Kyoung-Mi KimJae-Ho KimYoung-Ho KimMyung-Sun KimYoun-Kyung WangMi-Ra Park
    • H01L21/311B44C1/22
    • H01L21/0337
    • There are provided a method of forming a fine pattern employing self-aligned double patterning. The method includes providing a substrate. First mask patterns are formed on the substrate. A reactive layer is formed on the substrate having the first mask patterns. The reactive layer adjacent to the first mask patterns is reacted using a chemical attachment process, thereby forming sacrificial layers along outer walls of the first mask patterns. The reactive layer that is not reacted is removed to expose the sacrificial layers. Second mask patterns are formed between the sacrificial layers adjacent to sidewalls of the first mask patterns facing each other. The sacrificial layers are removed to expose the first and second mask patterns and the substrate exposed between the first and second mask patterns. The substrate is etched using the first and second mask patterns as an etching mask.
    • 提供了使用自对准双重图案形成精细图案的方法。 该方法包括提供基板。 在基板上形成第一掩模图案。 在具有第一掩模图案的基板上形成反应层。 使用化学附着工艺反应与第一掩模图案相邻的反应层,从而沿着第一掩模图案的外壁形成牺牲层。 去除未反应的反应层以暴露牺牲层。 在与彼此面对的第一掩模图案的侧壁相邻的牺牲层之间形成第二掩模图案。 去除牺牲层以暴露在第一和第二掩模图案之间暴露的第一和第二掩模图案和衬底。 使用第一和第二掩模图案作为蚀刻掩模蚀刻衬底。
    • 6. 发明申请
    • METHOD OF FORMING A PATTERN AND METHOD OF MANUFACTURING A CAPACITOR
    • 形成图案的方法和制造电容器的方法
    • US20080121609A1
    • 2008-05-29
    • US11945934
    • 2007-11-27
    • Kyoung-Mi KimJae-Ho KimYoung-Ho KimMyung-Sun Kim
    • Kyoung-Mi KimJae-Ho KimYoung-Ho KimMyung-Sun Kim
    • H01G4/00
    • H01G4/33H01L27/10814H01L27/10852H01L28/91
    • In a method of forming a pattern, a mold layer having an opening is formed on a substrate. A conductive layer is formed on the mold layer having the opening, the conductive layer having a substantially uniform thickness. A buffer layer pattern is formed in the opening having the conductive layer, the buffer layer pattern having a cross-linked structure of water-soluble copolymers including a repeating unit of N-vinyl-2-pyrrolidone and a repeating unit of acrylate. An upper portion of the conductive layer exposed over the buffer layer pattern is etched. Accordingly, a conductive pattern for a semiconductor device is formed on the substrate. The method of forming a pattern may simplify manufacturing processes for a capacitor and a semiconductor device, and may improve their efficiencies.
    • 在形成图案的方法中,在基板上形成具有开口的模具层。 在具有开口的模具层上形成导电层,导电层具有基本均匀的厚度。 在具有导电层的开口中形成缓冲层图案,缓冲层图案具有包含N-乙烯基-2-吡咯烷酮的重复单元和丙烯酸重复单元的水溶性共聚物的交联结构。 蚀刻在缓冲层图案上暴露的导电层的上部。 因此,在基板上形成用于半导体器件的导电图案。 形成图案的方法可以简化电容器和半导体器件的制造工艺,并且可以提高它们的效率。
    • 7. 发明授权
    • Method of forming a pattern and method of manufacturing a capacitor using the same
    • 形成图案的方法和使用其形成电容器的方法
    • US07638388B2
    • 2009-12-29
    • US11945922
    • 2007-11-27
    • Kyoung-Min KimJae-Ho KimYoung-Ho KimBoo-Deuk KimSeok Han
    • Kyoung-Min KimJae-Ho KimYoung-Ho KimBoo-Deuk KimSeok Han
    • H01L21/8244
    • H01G4/33H01G4/40H01L27/10817H01L27/10852H01L28/91
    • In a method of forming a pattern and a method of manufacturing a capacitor using the same, a conductive layer is formed on a mold layer having an opening. A first buffer layer pattern including a polymer having a repeating unit of anthracene-methyl methacrylate and a repeating unit of alkoxyl-vinyl benzene is formed on the conductive layer in the opening. The first buffer layer pattern is baked to cross-link the polymers and form a second buffer layer pattern that is insoluble in a developing solution. The conductive layer on a top portion of the mold layer is selectively removed by using the second buffer layer pattern as an etching mask. Accordingly, a conductive pattern for a semiconductor device is formed. The method of forming a pattern may simplify manufacturing processes for a capacitor and a semiconductor device, and may improve their efficiencies.
    • 在形成图案的方法和使用其的电容器的制造方法中,在具有开口的模具层上形成导电层。 在开口中的导电层上形成包含具有蒽 - 甲基丙烯酸甲酯的重复单元的聚合物和烷氧基 - 乙烯基苯的重复单元的第一缓冲层图案。 烘烤第一缓冲层图案以交联聚合物并形成不溶于显影溶液的第二缓冲层图案。 通过使用第二缓冲层图案作为蚀刻掩模,选择性地去除模层顶部的导电层。 因此,形成用于半导体器件的导电图案。 形成图案的方法可以简化电容器和半导体器件的制造工艺,并且可以提高它们的效率。