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1. 发明授权

US06842346B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US06842346B2
公开(公告)日：2005-01-11
申请号：US10742888
申请日：2003-12-23
申请人： Kyouichi Takagawa , Kozo Sakamoto , Nobuyoshi Matsuura , Masashi Koyano
发明人： Kyouichi Takagawa , Kozo Sakamoto , Nobuyoshi Matsuura , Masashi Koyano
IPC分类号： G06F1/26 , H01L23/495 , H01L25/07 , H01L25/18 , H01L27/04 , H01L27/088 , H01L29/78 , H05K7/02 , H05K7/06 , H05K7/08 , H05K7/10
CPC分类号： H01L25/072 , H01L23/49562 , H01L23/49575 , H01L24/05 , H01L24/06 , H01L24/40 , H01L24/41 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L27/088 , H01L2224/0401 , H01L2224/04042 , H01L2224/05556 , H01L2224/05624 , H01L2224/0603 , H01L2224/16245 , H01L2224/32245 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/48465 , H01L2224/48624 , H01L2224/48724 , H01L2224/49111 , H01L2224/49112 , H01L2224/73253 , H01L2224/73265 , H01L2224/8385 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01023 , H01L2924/01028 , H01L2924/01029 , H01L2924/01031 , H01L2924/01041 , H01L2924/01047 , H01L2924/01061 , H01L2924/01074 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/12032 , H01L2924/12035 , H01L2924/1306 , H01L2924/13091 , H01L2924/181 , H01L2924/19041 , H01L2924/30105 , H01L2924/30107 , H01L2924/00 , H01L2924/00012 , H01L2224/37099
摘要： Disclosed is a technique capable of improving a power supply efficiency in a power supply circuit. A power MOSFET in a high side of a combined power MOSFET constituting a DC-DC converter is constituted of a horizontal MOSFET, and a power MOSFET in a low side thereof is constituted of a vertical MOSFET.
摘要翻译：公开了能够提高电源电路的电力供给效率的技术。构成DC-DC转换器的组合功率MOSFET的高侧的功率MOSFET由水平MOSFET构成，其低侧的功率MOSFET由垂直MOSFET构成。

2. 发明授权

US06700793B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US06700793B2
公开(公告)日：2004-03-02
申请号：US10046261
申请日：2002-01-16
申请人： Kyouichi Takagawa , Kozo Sakamoto , Nobuyoshi Matsuura , Masashi Koyano
发明人： Kyouichi Takagawa , Kozo Sakamoto , Nobuyoshi Matsuura , Masashi Koyano
IPC分类号： H05K702
CPC分类号： H01L25/072 , H01L23/49562 , H01L23/49575 , H01L24/05 , H01L24/06 , H01L24/40 , H01L24/41 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L27/088 , H01L2224/0401 , H01L2224/04042 , H01L2224/05556 , H01L2224/05624 , H01L2224/0603 , H01L2224/16245 , H01L2224/32245 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/48465 , H01L2224/48624 , H01L2224/48724 , H01L2224/49111 , H01L2224/49112 , H01L2224/73253 , H01L2224/73265 , H01L2224/8385 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01023 , H01L2924/01028 , H01L2924/01029 , H01L2924/01031 , H01L2924/01041 , H01L2924/01047 , H01L2924/01061 , H01L2924/01074 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/12032 , H01L2924/12035 , H01L2924/1306 , H01L2924/13091 , H01L2924/181 , H01L2924/19041 , H01L2924/30105 , H01L2924/30107 , H01L2924/00 , H01L2924/00012 , H01L2224/37099
摘要： Disclosed is a technique capable of improving a power supply efficiency in a power supply circuit. A power MOSFET in a high side of a combined power MOSFET constituting a DC-DC converter is constituted of a horizontal MOSFET, and a power MOSFET in a low side thereof is constituted of a vertical MOSFET.
摘要翻译：公开了能够提高电源电路的电力供给效率的技术。构成DC-DC转换器的组合功率MOSFET的高侧的功率MOSFET由水平MOSFET构成，其低侧的功率MOSFET由垂直MOSFET构成。

3. 发明授权

US07005834B2 Synchronous rectifier circuit and power supply 有权
标题翻译：同步整流电路和电源
公开(公告)号：US07005834B2
公开(公告)日：2006-02-28
申请号：US10882672
申请日：2004-07-02
申请人： Takayuki Iwasaki , Kozo Sakamoto , Masaki Shiraishi , Nobuyoshi Matsuura , Tomoaki Uno
发明人： Takayuki Iwasaki , Kozo Sakamoto , Masaki Shiraishi , Nobuyoshi Matsuura , Tomoaki Uno
IPC分类号： G05F1/613 , G05F1/656
CPC分类号： H02M3/1588 , Y02B70/1466
摘要： In a power supply of a synchronous rectification type, the self-turn on phenomenon of MOSFET is suppressed without increase of the drive loss to thereby improve the power efficiency. In a synchronous rectifier circuit, a threshold value of a commutation MOSFET is made higher than that of a rectification MOSFET and particularly a threshold value of a commutation MOSFET 3 is made 0.5V or more higher than that of a rectification MOSFET 2. The threshold value of the rectification MOSFET 2 is lower than 1.5V and the threshold of the commutation MOSFET 3 is higher than 2.0V.
摘要翻译：在同步整流型的电源中，不增加驱动损耗来抑制MOSFET的自转导通现象，从而提高功率效率。在同步整流电路中，使换向MOSFET的阈值高于整流MOSFET的阈值，特别是使换向MOSFET 3的阈值比整流MOSFET2的阈值高0.5V以上。整流用MOSFET2的阈值低于1.5V，换流用MOSFET3的阈值高于2.0V。

4. 发明申请

US20050007078A1 Synchronous rectifier circuit and power supply 有权
标题翻译：同步整流电路和电源
公开(公告)号：US20050007078A1
公开(公告)日：2005-01-13
申请号：US10882672
申请日：2004-07-02
申请人： Takayuki Iwasaki , Kozo Sakamoto , Masaki Shiraishi , Nobuyoshi Matsuura , Tomoaki Uno
发明人： Takayuki Iwasaki , Kozo Sakamoto , Masaki Shiraishi , Nobuyoshi Matsuura , Tomoaki Uno
IPC分类号： H02M7/21 , H02M3/155 , H02M3/158 , G05F1/652
CPC分类号： H02M3/1588 , Y02B70/1466
摘要： In a power supply of a synchronous rectification type, the self-turn on phenomenon of MOSFET is suppressed without increase of the drive loss to thereby improve the power efficiency. In a synchronous rectifier circuit, a threshold value of a commutation MOSFET is made higher than that of a rectification MOSFET and particularly a threshold value of a commutation MOSFET 3 is made 0.5V or more higher than that of a rectification MOSFET 2. The threshold value of the rectification MOSFET 2 is lower than 1.5V and the threshold of the commutation MOSFET 3 is higher than 2.0V.
摘要翻译：在同步整流型的电源中，不增加驱动损耗来抑制MOSFET的自转导通现象，从而提高功率效率。在同步整流电路中，使换向MOSFET的阈值高于整流MOSFET的阈值，特别是使换向MOSFET 3的阈值比整流MOSFET2的阈值高0.5V以上。阈值的整流用MOSFET2的电压低于1.5V，换流用MOSFET3的阈值高于2.0V。

5. 发明授权

US08536643B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08536643B2
公开(公告)日：2013-09-17
申请号：US12709260
申请日：2010-02-19
申请人： Nobuyuki Shirai , Nobuyoshi Matsuura
发明人： Nobuyuki Shirai , Nobuyoshi Matsuura
IPC分类号： H01L29/76
CPC分类号： H01L29/7811 , H01L21/56 , H01L22/32 , H01L23/3107 , H01L23/4824 , H01L23/49562 , H01L24/03 , H01L24/11 , H01L24/13 , H01L24/94 , H01L29/0615 , H01L29/41766 , H01L29/4238 , H01L29/456 , H01L29/4941 , H01L29/66727 , H01L29/66734 , H01L29/7802 , H01L29/7813 , H01L2221/6834 , H01L2221/68372 , H01L2224/02166 , H01L2224/0401 , H01L2224/04026 , H01L2224/05155 , H01L2224/05166 , H01L2224/05572 , H01L2224/05624 , H01L2224/05644 , H01L2224/0615 , H01L2224/1131 , H01L2224/13021 , H01L2224/13144 , H01L2224/14051 , H01L2224/1415 , H01L2224/16 , H01L2224/16245 , H01L2224/32245 , H01L2224/45144 , H01L2224/73153 , H01L2224/73253 , H01L2224/81191 , H01L2224/81203 , H01L2224/94 , H01L2924/0002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/0102 , H01L2924/01023 , H01L2924/01032 , H01L2924/01033 , H01L2924/01039 , H01L2924/01047 , H01L2924/01057 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/01088 , H01L2924/1306 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H01L2924/00014 , H01L2224/03 , H01L2224/11 , H01L2924/00 , H01L2224/05552
摘要： A semiconductor device includes a gate electrode GE electrically connected to a gate portion which is made of a polysilicon film provided in the inside of a plurality of grooves formed in a striped form along the direction of T of a chip region CA wherein the gate electrode GE is formed as a film at the same layer level as a source electrode SE electrically connected to a source region formed between adjacent stripe-shaped grooves and the gate electrode GE is constituted of a gate electrode portion G1 formed along a periphery of the chip region CA and a gate finger portion G2 arranged so that the chip region CA is divided into halves along the direction of X. The source electrode SE is constituted of an upper portion and a lower portion, both relative to the gate finger portion G2, and the gate electrode GE and the source electrode SE are connected to a lead frame via a bump electrode.
摘要翻译：半导体器件包括栅极电极GE，栅极电极GE电连接到栅极部分，栅极部分由沿芯片区域CA的T的方向形成的多个沟槽的内部设置的多晶硅膜制成，其中栅电极GE 形成为与与形成在相邻条形槽之间的源极区域电连接的源极电极SE相同的层级，并且栅电极GE由沿着芯片区域CA的周边形成的栅电极部分G1 以及栅极指部分G2，其布置成使得芯片区域CA沿着X方向被分成两半。源电极SE由相对于栅极指部分G2的两个上部和下部构成，并且栅极电极GE和源电极SE通过凸块电极连接到引线框架。

6. 发明授权

US08237493B2 Semiconductor device and power supply device using the same 失效
标题翻译：半导体装置及使用该装置的电源装置
公开(公告)号：US08237493B2
公开(公告)日：2012-08-07
申请号：US13243642
申请日：2011-09-23
申请人： Takayuki Hashimoto , Nobuyoshi Matsuura , Masaki Shiraishi , Yukihiro Satou , Tetsuya Kawashima
发明人： Takayuki Hashimoto , Nobuyoshi Matsuura , Masaki Shiraishi , Yukihiro Satou , Tetsuya Kawashima
IPC分类号： H01L25/00
CPC分类号： H01L25/16 , H01L25/074 , H01L2224/05554 , H01L2224/0603 , H01L2224/40245 , H01L2224/48091 , H01L2224/48137 , H01L2224/4903 , H01L2224/49175 , H01L2924/00014 , H01L2924/12032 , H01L2924/13091 , H01L2924/181 , H01L2924/30107 , H01L2924/3011 , H02M3/1588 , Y02B70/1466 , H01L2924/00 , H01L2924/00012 , H01L2224/37099
摘要： A semiconductor device capable of reducing an inductance is provided. In the semiconductor device in which a rectification MOSFET, a commutation MOSFET, and a driving IC that drives these MOSFETs are mounted on one package, the rectification MOSFET, a metal plate, and the commutation MOSFET are laminated. A current of a main circuit flows from a back surface of the package to a front surface thereof. The metal plate is connected to an output terminal via a wiring in the package. Wire bondings are used for wirings for connecting the driving IC, the rectification MOSFET, and the commutation MOSFET, all terminals being placed on the same plane. For this reason, the inductance becomes small and also a power source loss and a spike voltage are reduced.
摘要翻译：提供能够减小电感的半导体器件。在其中将整流MOSFET，换向MOSFET和驱动这些MOSFET的驱动IC安装在一个封装上的半导体器件中，整流MOSFET，金属板和换向MOSFET被层压。主电路的电流从封装的后表面流向其前表面。金属板通过封装中的布线连接到输出端子。引线键合用于连接驱动IC，整流MOSFET和换向MOSFET，所有端子都放置在同一平面上。因此，电感变小，电源损耗和尖峰电压也降低。

7. 发明授权

US08159054B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08159054B2
公开(公告)日：2012-04-17
申请号：US13188613
申请日：2011-07-22
申请人： Yukihiro Satou , Tomoaki Uno , Nobuyoshi Matsuura , Masaki Shiraishi
发明人： Yukihiro Satou , Tomoaki Uno , Nobuyoshi Matsuura , Masaki Shiraishi
IPC分类号： H01L23/495
CPC分类号： H01L23/5386 , H01L23/49575 , H01L23/50 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/85 , H01L25/165 , H01L29/4175 , H01L2224/05554 , H01L2224/0603 , H01L2224/29339 , H01L2224/45015 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48095 , H01L2224/48137 , H01L2224/48247 , H01L2224/4903 , H01L2224/49051 , H01L2224/49111 , H01L2224/49171 , H01L2224/49175 , H01L2224/4943 , H01L2224/83855 , H01L2224/85 , H01L2224/85203 , H01L2224/85205 , H01L2924/01002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/0102 , H01L2924/01023 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/20753 , H01L2924/20755 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H02M3/1588 , H05K7/02 , Y02B70/1466 , H01L2924/00014 , H01L2924/00 , H01L2924/00012 , H01L2924/2075 , H01L2924/20754
摘要： The present invention provides a non-insulated type DC-DC converter having a circuit in which a power MOSωFET for a high side switch and a power MOSωFET for a low side switch are connected in series. In the non-insulated type DC-DC converter, the power transistor for the high side switch, the power transistor for the low side switch, and driver circuits that drive these are respectively constituted by different semiconductor chips. The three semiconductor chips are accommodated in one package, and the semiconductor chip including the power transistor for the high side switch, and the semiconductor chip including the driver circuits are disposed so as to approach each other.
摘要翻译：本发明提供一种具有电路的非绝缘型DC-DC转换器，其中用于高侧开关的功率MOSωFET和用于低侧开关的功率MOSωFET串联连接。在非绝缘型DC-DC转换器中，用于高侧开关的功率晶体管，低边开关的功率晶体管和驱动它们的驱动电路分别由不同的半导体芯片构成。三个半导体芯片被容纳在一个封装中，并且包括用于高侧开关的功率晶体管的半导体芯片和包括驱动电路的半导体芯片被布置成彼此接近。

8. 发明授权

US08120102B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08120102B2
公开(公告)日：2012-02-21
申请号：US12964651
申请日：2010-12-09
申请人： Nobuyuki Shirai , Nobuyoshi Matsuura
发明人： Nobuyuki Shirai , Nobuyoshi Matsuura
IPC分类号： H01L29/76
CPC分类号： H01L29/7811 , H01L21/56 , H01L22/32 , H01L23/3107 , H01L23/4824 , H01L23/49562 , H01L24/03 , H01L24/11 , H01L24/13 , H01L24/94 , H01L29/0615 , H01L29/41766 , H01L29/4238 , H01L29/456 , H01L29/4941 , H01L29/66727 , H01L29/66734 , H01L29/7802 , H01L29/7813 , H01L2221/6834 , H01L2221/68372 , H01L2224/02166 , H01L2224/0401 , H01L2224/04026 , H01L2224/05155 , H01L2224/05166 , H01L2224/05572 , H01L2224/05624 , H01L2224/05644 , H01L2224/0615 , H01L2224/1131 , H01L2224/13021 , H01L2224/13144 , H01L2224/14051 , H01L2224/1415 , H01L2224/16 , H01L2224/16245 , H01L2224/32245 , H01L2224/45144 , H01L2224/73153 , H01L2224/73253 , H01L2224/81191 , H01L2224/81203 , H01L2224/94 , H01L2924/0002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/0102 , H01L2924/01023 , H01L2924/01032 , H01L2924/01033 , H01L2924/01039 , H01L2924/01047 , H01L2924/01057 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/01088 , H01L2924/1306 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H01L2924/00014 , H01L2224/03 , H01L2224/11 , H01L2924/00 , H01L2224/05552
摘要： A semiconductor device includes a gate electrode GE electrically connected to a gate portion which is made of a polysilicon film provided in the inside of a plurality of grooves formed in a striped form along the direction of T of a chip region CA wherein the gate electrode GE is formed as a film at the same layer level as a source electrode SE electrically connected to a source region formed between adjacent stripe-shaped grooves and the gate electrode GE is constituted of a gate electrode portion G1 formed along a periphery of the chip region CA and a gate finger portion G2 arranged so that the chip region CA is divided into halves along the direction of X. The source electrode SE is constituted of an upper portion and a lower portion, both relative to the gate finger portion G2, and the gate electrode GE and the source electrode SE are connected to a lead frame via a bump electrode.
摘要翻译：半导体器件包括栅极电极GE，栅极电极GE电连接到栅极部分，栅极部分由沿芯片区域CA的T的方向形成的多个沟槽的内部设置的多晶硅膜制成，其中栅电极GE 形成为与与形成在相邻条形槽之间的源极区域电连接的源极电极SE相同的层级，并且栅电极GE由沿着芯片区域CA的周边形成的栅电极部分G1 以及栅极指部分G2，其布置成使得芯片区域CA沿着X方向被分成两半。源电极SE由相对于栅极指部分G2的两个上部和下部构成，并且栅极电极GE和源电极SE通过凸块电极连接到引线框架。

9. 发明授权

US08013430B2 Semiconductor device including DC-DC converter 有权
标题翻译：包括DC-DC转换器的半导体器件
公开(公告)号：US08013430B2
公开(公告)日：2011-09-06
申请号：US12708044
申请日：2010-02-18
申请人： Yukihiro Satou , Tomoaki Uno , Nobuyoshi Matsuura , Masaki Shiraishi
发明人： Yukihiro Satou , Tomoaki Uno , Nobuyoshi Matsuura , Masaki Shiraishi
IPC分类号： H01L23/495
CPC分类号： H01L23/5386 , H01L23/49575 , H01L23/50 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/85 , H01L25/165 , H01L29/4175 , H01L2224/05554 , H01L2224/0603 , H01L2224/29339 , H01L2224/45015 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48095 , H01L2224/48137 , H01L2224/48247 , H01L2224/4903 , H01L2224/49051 , H01L2224/49111 , H01L2224/49171 , H01L2224/49175 , H01L2224/4943 , H01L2224/83855 , H01L2224/85 , H01L2224/85203 , H01L2224/85205 , H01L2924/01002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/0102 , H01L2924/01023 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/20753 , H01L2924/20755 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H02M3/1588 , H05K7/02 , Y02B70/1466 , H01L2924/00014 , H01L2924/00 , H01L2924/00012 , H01L2924/2075 , H01L2924/20754
摘要： The present invention provides a non-insulated type DC-DC converter having a circuit in which a power MOS·FET for a high side switch and a power MOS·FET for a low side switch are connected in series. In the non-insulated type DC-DC converter, the power transistor for the high side switch, the power transistor for the low side switch, and driver circuits that drive these are respectively constituted by different semiconductor chips. The three semiconductor chips are accommodated in one package, and the semiconductor chip including the power transistor for the high side switch, and the semiconductor chip including the driver circuits are disposed so as to approach each other.
摘要翻译：本发明提供一种非绝缘型DC-DC转换器，其具有用于高侧开关的功率MOS·FET和低侧开关的功率MOS·FET串联连接的电路。在非绝缘型DC-DC转换器中，用于高侧开关的功率晶体管，低边开关的功率晶体管和驱动它们的驱动电路分别由不同的半导体芯片构成。三个半导体芯片被容纳在一个封装中，并且包括用于高侧开关的功率晶体管的半导体芯片和包括驱动电路的半导体芯片被布置成彼此接近。

10. 发明申请

US20110024802A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20110024802A1
公开(公告)日：2011-02-03
申请号：US12901929
申请日：2010-10-11
申请人： NOBUYUKI SHIRAI , Nobuyoshi Matsuura , Yoshito Nakazawa
发明人： NOBUYUKI SHIRAI , Nobuyoshi Matsuura , Yoshito Nakazawa
IPC分类号： H01L29/812 , H01L29/772
CPC分类号： H01L29/7806 , H01L27/0629 , H01L29/0615 , H01L29/0619 , H01L29/0696 , H01L29/0847 , H01L29/0878 , H01L29/1095 , H01L29/20 , H01L29/402 , H01L29/407 , H01L29/4236 , H01L29/456 , H01L29/47 , H01L29/475 , H01L29/7802 , H01L29/7811 , H01L29/7813 , H01L29/782 , H01L29/7823 , H01L29/872 , H01L29/8725
摘要： To attain reduction in size of a semiconductor device having a power transistor and an SBD, a semiconductor device according to the present invention comprises a first region and a second region formed on a main surface of a semiconductor substrate; plural first conductors and plural second conductors formed in the first and second regions respectively; a first semiconductor region and a second semiconductor region formed between adjacent first conductors in the first region, the second semiconductor region lying in the first semiconductor region and having a conductivity type opposite to that of the first semiconductor region; a third semiconductor region formed between adjacent second conductors in the second region, the third semiconductor region having the same conductivity type as that of the second semiconductor region and being lower in density than the second semiconductor region; a metal formed on the semiconductor substrate in the second region, the third semiconductor region having a metal contact region for contact with the metal, the metal being electrically connected to the second semiconductor region, and a center-to-center distance between adjacent first conductors in the first region being smaller than that between adjacent second conductors in the second region.
摘要翻译：为了实现具有功率晶体管和SBD的半导体器件的尺寸的减小，根据本发明的半导体器件包括形成在半导体衬底的主表面上的第一区域和第二区域; 分别形成在第一和第二区域中的多个第一导体和多个第二导体; 形成在所述第一区域中的相邻第一导体之间的第一半导体区域和第二半导体区域，所述第二半导体区域位于所述第一半导体区域中并具有与所述第一半导体区域相反的导电类型; 形成在所述第二区域的相邻的第二导体之间的第三半导体区域，所述第三半导体区域具有与所述第二半导体区域相同的导电类型，并且密度低于所述第二半导体区域; 在所述第二区域中形成在所述半导体衬底上的金属，所述第三半导体区域具有用于与所述金属接触的金属接触区域，所述金属电连接到所述第二半导体区域，以及相邻的第一导体之间的中心到中心距离在所述第一区域中小于所述第二区域中相邻的第二导体之间的距离。

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