专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US08536643B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08536643B2
公开(公告)日：2013-09-17
申请号：US12709260
申请日：2010-02-19
申请人： Nobuyuki Shirai , Nobuyoshi Matsuura
发明人： Nobuyuki Shirai , Nobuyoshi Matsuura
IPC分类号： H01L29/76
CPC分类号： H01L29/7811 , H01L21/56 , H01L22/32 , H01L23/3107 , H01L23/4824 , H01L23/49562 , H01L24/03 , H01L24/11 , H01L24/13 , H01L24/94 , H01L29/0615 , H01L29/41766 , H01L29/4238 , H01L29/456 , H01L29/4941 , H01L29/66727 , H01L29/66734 , H01L29/7802 , H01L29/7813 , H01L2221/6834 , H01L2221/68372 , H01L2224/02166 , H01L2224/0401 , H01L2224/04026 , H01L2224/05155 , H01L2224/05166 , H01L2224/05572 , H01L2224/05624 , H01L2224/05644 , H01L2224/0615 , H01L2224/1131 , H01L2224/13021 , H01L2224/13144 , H01L2224/14051 , H01L2224/1415 , H01L2224/16 , H01L2224/16245 , H01L2224/32245 , H01L2224/45144 , H01L2224/73153 , H01L2224/73253 , H01L2224/81191 , H01L2224/81203 , H01L2224/94 , H01L2924/0002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/0102 , H01L2924/01023 , H01L2924/01032 , H01L2924/01033 , H01L2924/01039 , H01L2924/01047 , H01L2924/01057 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/01088 , H01L2924/1306 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H01L2924/00014 , H01L2224/03 , H01L2224/11 , H01L2924/00 , H01L2224/05552
摘要： A semiconductor device includes a gate electrode GE electrically connected to a gate portion which is made of a polysilicon film provided in the inside of a plurality of grooves formed in a striped form along the direction of T of a chip region CA wherein the gate electrode GE is formed as a film at the same layer level as a source electrode SE electrically connected to a source region formed between adjacent stripe-shaped grooves and the gate electrode GE is constituted of a gate electrode portion G1 formed along a periphery of the chip region CA and a gate finger portion G2 arranged so that the chip region CA is divided into halves along the direction of X. The source electrode SE is constituted of an upper portion and a lower portion, both relative to the gate finger portion G2, and the gate electrode GE and the source electrode SE are connected to a lead frame via a bump electrode.
摘要翻译：半导体器件包括栅极电极GE，栅极电极GE电连接到栅极部分，栅极部分由沿芯片区域CA的T的方向形成的多个沟槽的内部设置的多晶硅膜制成，其中栅电极GE 形成为与与形成在相邻条形槽之间的源极区域电连接的源极电极SE相同的层级，并且栅电极GE由沿着芯片区域CA的周边形成的栅电极部分G1 以及栅极指部分G2，其布置成使得芯片区域CA沿着X方向被分成两半。源电极SE由相对于栅极指部分G2的两个上部和下部构成，并且栅极电极GE和源电极SE通过凸块电极连接到引线框架。

2. 发明授权

US08120102B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08120102B2
公开(公告)日：2012-02-21
申请号：US12964651
申请日：2010-12-09
申请人： Nobuyuki Shirai , Nobuyoshi Matsuura
发明人： Nobuyuki Shirai , Nobuyoshi Matsuura
IPC分类号： H01L29/76
CPC分类号： H01L29/7811 , H01L21/56 , H01L22/32 , H01L23/3107 , H01L23/4824 , H01L23/49562 , H01L24/03 , H01L24/11 , H01L24/13 , H01L24/94 , H01L29/0615 , H01L29/41766 , H01L29/4238 , H01L29/456 , H01L29/4941 , H01L29/66727 , H01L29/66734 , H01L29/7802 , H01L29/7813 , H01L2221/6834 , H01L2221/68372 , H01L2224/02166 , H01L2224/0401 , H01L2224/04026 , H01L2224/05155 , H01L2224/05166 , H01L2224/05572 , H01L2224/05624 , H01L2224/05644 , H01L2224/0615 , H01L2224/1131 , H01L2224/13021 , H01L2224/13144 , H01L2224/14051 , H01L2224/1415 , H01L2224/16 , H01L2224/16245 , H01L2224/32245 , H01L2224/45144 , H01L2224/73153 , H01L2224/73253 , H01L2224/81191 , H01L2224/81203 , H01L2224/94 , H01L2924/0002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/0102 , H01L2924/01023 , H01L2924/01032 , H01L2924/01033 , H01L2924/01039 , H01L2924/01047 , H01L2924/01057 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/01088 , H01L2924/1306 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H01L2924/00014 , H01L2224/03 , H01L2224/11 , H01L2924/00 , H01L2224/05552
摘要： A semiconductor device includes a gate electrode GE electrically connected to a gate portion which is made of a polysilicon film provided in the inside of a plurality of grooves formed in a striped form along the direction of T of a chip region CA wherein the gate electrode GE is formed as a film at the same layer level as a source electrode SE electrically connected to a source region formed between adjacent stripe-shaped grooves and the gate electrode GE is constituted of a gate electrode portion G1 formed along a periphery of the chip region CA and a gate finger portion G2 arranged so that the chip region CA is divided into halves along the direction of X. The source electrode SE is constituted of an upper portion and a lower portion, both relative to the gate finger portion G2, and the gate electrode GE and the source electrode SE are connected to a lead frame via a bump electrode.
摘要翻译：半导体器件包括栅极电极GE，栅极电极GE电连接到栅极部分，栅极部分由沿芯片区域CA的T的方向形成的多个沟槽的内部设置的多晶硅膜制成，其中栅电极GE 形成为与与形成在相邻条形槽之间的源极区域电连接的源极电极SE相同的层级，并且栅电极GE由沿着芯片区域CA的周边形成的栅电极部分G1 以及栅极指部分G2，其布置成使得芯片区域CA沿着X方向被分成两半。源电极SE由相对于栅极指部分G2的两个上部和下部构成，并且栅极电极GE和源电极SE通过凸块电极连接到引线框架。

3. 发明申请

US20110024802A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20110024802A1
公开(公告)日：2011-02-03
申请号：US12901929
申请日：2010-10-11
申请人： NOBUYUKI SHIRAI , Nobuyoshi Matsuura , Yoshito Nakazawa
发明人： NOBUYUKI SHIRAI , Nobuyoshi Matsuura , Yoshito Nakazawa
IPC分类号： H01L29/812 , H01L29/772
CPC分类号： H01L29/7806 , H01L27/0629 , H01L29/0615 , H01L29/0619 , H01L29/0696 , H01L29/0847 , H01L29/0878 , H01L29/1095 , H01L29/20 , H01L29/402 , H01L29/407 , H01L29/4236 , H01L29/456 , H01L29/47 , H01L29/475 , H01L29/7802 , H01L29/7811 , H01L29/7813 , H01L29/782 , H01L29/7823 , H01L29/872 , H01L29/8725
摘要： To attain reduction in size of a semiconductor device having a power transistor and an SBD, a semiconductor device according to the present invention comprises a first region and a second region formed on a main surface of a semiconductor substrate; plural first conductors and plural second conductors formed in the first and second regions respectively; a first semiconductor region and a second semiconductor region formed between adjacent first conductors in the first region, the second semiconductor region lying in the first semiconductor region and having a conductivity type opposite to that of the first semiconductor region; a third semiconductor region formed between adjacent second conductors in the second region, the third semiconductor region having the same conductivity type as that of the second semiconductor region and being lower in density than the second semiconductor region; a metal formed on the semiconductor substrate in the second region, the third semiconductor region having a metal contact region for contact with the metal, the metal being electrically connected to the second semiconductor region, and a center-to-center distance between adjacent first conductors in the first region being smaller than that between adjacent second conductors in the second region.
摘要翻译：为了实现具有功率晶体管和SBD的半导体器件的尺寸的减小，根据本发明的半导体器件包括形成在半导体衬底的主表面上的第一区域和第二区域; 分别形成在第一和第二区域中的多个第一导体和多个第二导体; 形成在所述第一区域中的相邻第一导体之间的第一半导体区域和第二半导体区域，所述第二半导体区域位于所述第一半导体区域中并具有与所述第一半导体区域相反的导电类型; 形成在所述第二区域的相邻的第二导体之间的第三半导体区域，所述第三半导体区域具有与所述第二半导体区域相同的导电类型，并且密度低于所述第二半导体区域; 在所述第二区域中形成在所述半导体衬底上的金属，所述第三半导体区域具有用于与所述金属接触的金属接触区域，所述金属电连接到所述第二半导体区域，以及相邻的第一导体之间的中心到中心距离在所述第一区域中小于所述第二区域中相邻的第二导体之间的距离。

4. 发明授权

US07768065B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US07768065B2
公开(公告)日：2010-08-03
申请号：US11944343
申请日：2007-11-21
申请人： Nobuyuki Shirai , Nobuyoshi Matsuura
发明人： Nobuyuki Shirai , Nobuyoshi Matsuura
IPC分类号： H01L29/76
CPC分类号： H01L29/7811 , H01L21/56 , H01L22/32 , H01L23/3107 , H01L23/4824 , H01L23/49562 , H01L24/03 , H01L24/11 , H01L24/13 , H01L24/94 , H01L29/0615 , H01L29/41766 , H01L29/4238 , H01L29/456 , H01L29/4941 , H01L29/66727 , H01L29/66734 , H01L29/7802 , H01L29/7813 , H01L2221/6834 , H01L2221/68372 , H01L2224/02166 , H01L2224/0401 , H01L2224/04026 , H01L2224/05155 , H01L2224/05166 , H01L2224/05572 , H01L2224/05624 , H01L2224/05644 , H01L2224/0615 , H01L2224/1131 , H01L2224/13021 , H01L2224/13144 , H01L2224/14051 , H01L2224/1415 , H01L2224/16 , H01L2224/16245 , H01L2224/32245 , H01L2224/45144 , H01L2224/73153 , H01L2224/73253 , H01L2224/81191 , H01L2224/81203 , H01L2224/94 , H01L2924/0002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/0102 , H01L2924/01023 , H01L2924/01032 , H01L2924/01033 , H01L2924/01039 , H01L2924/01047 , H01L2924/01057 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/01088 , H01L2924/1306 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H01L2924/00014 , H01L2224/03 , H01L2224/11 , H01L2924/00 , H01L2224/05552
摘要： A semiconductor device includes a gate electrode GE electrically connected to a gate portion which is made of a polysilicon film provided in the inside of a plurality of grooves formed in a striped form along the direction of T of a chip region CA wherein the gate electrode GE is formed as a film at the same layer level as a source electrode SE electrically connected to a source region formed between adjacent stripe-shaped grooves and the gate electrode GE is constituted of a gate electrode portion G1 formed along a periphery of the chip region CA and a gate finger portion G2 arranged so that the chip region CA is divided into halves along the direction of X. The source electrode SE is constituted of an upper portion and a lower portion, both relative to the gate finger portion G2, and the gate electrode GE and the source electrode SE are connected to a lead frame via a bump electrode.
摘要翻译：半导体器件包括栅极电极GE，栅极电极GE电连接到栅极部分，栅极部分由沿芯片区域CA的T的方向形成的多个沟槽的内部设置的多晶硅膜制成，其中栅电极GE 形成为与与形成在相邻条形槽之间的源极区域电连接的源极电极SE相同的层级，并且栅电极GE由沿着芯片区域CA的周边形成的栅电极部分G1 以及栅极指部分G2，其布置成使得芯片区域CA沿着X方向被分成两半。源电极SE由相对于栅极指部分G2的两个上部和下部构成，并且栅极电极GE和源电极SE通过凸块电极连接到引线框架。

5. 发明授权

US07317224B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US07317224B2
公开(公告)日：2008-01-08
申请号：US11180612
申请日：2005-07-14
申请人： Nobuyuki Shirai , Nobuyoshi Matsuura
发明人： Nobuyuki Shirai , Nobuyoshi Matsuura
IPC分类号： H01L23/58 , H01L29/94
CPC分类号： H01L29/7811 , H01L21/56 , H01L22/32 , H01L23/3107 , H01L23/4824 , H01L23/49562 , H01L24/03 , H01L24/11 , H01L24/13 , H01L24/94 , H01L29/0615 , H01L29/41766 , H01L29/4238 , H01L29/456 , H01L29/4941 , H01L29/66727 , H01L29/66734 , H01L29/7802 , H01L29/7813 , H01L2221/6834 , H01L2221/68372 , H01L2224/02166 , H01L2224/0401 , H01L2224/04026 , H01L2224/05155 , H01L2224/05166 , H01L2224/05572 , H01L2224/05624 , H01L2224/05644 , H01L2224/0615 , H01L2224/1131 , H01L2224/13021 , H01L2224/13144 , H01L2224/14051 , H01L2224/1415 , H01L2224/16 , H01L2224/16245 , H01L2224/32245 , H01L2224/45144 , H01L2224/73153 , H01L2224/73253 , H01L2224/81191 , H01L2224/81203 , H01L2224/94 , H01L2924/0002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/0102 , H01L2924/01023 , H01L2924/01032 , H01L2924/01033 , H01L2924/01039 , H01L2924/01047 , H01L2924/01057 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/01088 , H01L2924/1306 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H01L2924/00014 , H01L2224/03 , H01L2224/11 , H01L2924/00 , H01L2224/05552
摘要： A semiconductor device includes a gate electrode GE electrically connected to a gate portion which is made of a polysilicon film provided in the inside of a plurality of grooves formed in a striped form along the direction of T of a chip region CA wherein the gate electrode GE is formed as a film at the same layer level as a source electrode SE electrically connected to a source region formed between adjacent stripe-shaped grooves and the gate electrode GE is constituted of a gate electrode portion G1 formed along a periphery of the chip region CA and a gate finger portion G2 arranged so that the chip region CA is divided into halves along the direction of X. The source electrode SE is constituted of an upper portion and a lower portion, both relative to the gate finger portion G2, and the gate electrode GE and the source electrode SE are connected to a lead frame via a bump electrode.
摘要翻译：半导体器件包括栅极电极GE，栅极电极GE电连接到栅极部分，栅极部分由沿芯片区域CA的T的方向形成的多个沟槽的内部设置的多晶硅膜制成，其中栅电极GE 形成为与与形成在相邻条形槽之间的源极区域电连接的源极电极SE相同的层级，并且栅电极GE由沿着芯片区域的周边形成的栅电极部分G 1 CA和栅极指部分G 2，其布置成使得芯片区域CA沿着X方向分成两半。源电极SE由相对于栅极指部分G 2的上部和下部构成，并且栅电极GE和源电极SE经由凸块电极连接到引线框架。

6. 发明申请

US20050242393A1 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US20050242393A1
公开(公告)日：2005-11-03
申请号：US11180612
申请日：2005-07-14
申请人： Nobuyuki Shirai , Nobuyoshi Matsuura
发明人： Nobuyuki Shirai , Nobuyoshi Matsuura
IPC分类号： H01L29/417 , H01L21/336 , H01L21/60 , H01L23/482 , H01L23/495 , H01L23/544 , H01L29/76 , H01L29/78
CPC分类号： H01L29/7811 , H01L21/56 , H01L22/32 , H01L23/3107 , H01L23/4824 , H01L23/49562 , H01L24/03 , H01L24/11 , H01L24/13 , H01L24/94 , H01L29/0615 , H01L29/41766 , H01L29/4238 , H01L29/456 , H01L29/4941 , H01L29/66727 , H01L29/66734 , H01L29/7802 , H01L29/7813 , H01L2221/6834 , H01L2221/68372 , H01L2224/02166 , H01L2224/0401 , H01L2224/04026 , H01L2224/05155 , H01L2224/05166 , H01L2224/05572 , H01L2224/05624 , H01L2224/05644 , H01L2224/0615 , H01L2224/1131 , H01L2224/13021 , H01L2224/13144 , H01L2224/14051 , H01L2224/1415 , H01L2224/16 , H01L2224/16245 , H01L2224/32245 , H01L2224/45144 , H01L2224/73153 , H01L2224/73253 , H01L2224/81191 , H01L2224/81203 , H01L2224/94 , H01L2924/0002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/0102 , H01L2924/01023 , H01L2924/01032 , H01L2924/01033 , H01L2924/01039 , H01L2924/01047 , H01L2924/01057 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/01088 , H01L2924/1306 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H01L2924/00014 , H01L2224/03 , H01L2224/11 , H01L2924/00 , H01L2224/05552
摘要： A semiconductor device includes a gate electrode GE electrically connected to a gate portion which is made of a polysilicon film provided in the inside of a plurality of grooves formed in a striped form along the direction of T of a chip region CA wherein the gate electrode GE is formed as a film at the same layer level as a source electrode SE electrically connected to a source region formed between adjacent stripe-shaped grooves and the gate electrode GE is constituted of a gate electrode portion G1 formed along a periphery of the chip region CA and a gate finger portion G2 arranged so that the chip region CA is divided into halves along the direction of X. The source electrode SE is constituted of an upper portion and a lower portion, both relative to the gate finger portion G2, and the gate electrode GE and the source electrode SE are connected to a lead frame via a bump electrode.
摘要翻译：半导体器件包括栅极电极GE，栅极电极GE电连接到栅极部分，栅极部分由沿芯片区域CA的T的方向形成的多个沟槽的内部设置的多晶硅膜制成，其中栅电极GE 形成为与与形成在相邻条形槽之间的源极区域电连接的源极电极SE相同的层级，并且栅电极GE由沿着芯片区域的周边形成的栅电极部分G 1 CA和栅极指部分G 2，其布置成使得芯片区域CA沿着X方向分成两半。源电极SE由相对于栅极指部分G 2的上部和下部构成，并且栅电极GE和源电极SE经由凸块电极连接到引线框架。

7. 发明申请

US20050035400A1 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US20050035400A1
公开(公告)日：2005-02-17
申请号：US10948305
申请日：2004-09-24
申请人： Nobuyuki Shirai , Nobuyoshi Matsuura , Yoshito Nakazawa
发明人： Nobuyuki Shirai , Nobuyoshi Matsuura , Yoshito Nakazawa
IPC分类号： H01L29/872 , H01L21/8234 , H01L27/04 , H01L27/088 , H01L27/095 , H01L29/06 , H01L29/08 , H01L29/10 , H01L29/40 , H01L29/45 , H01L29/47 , H01L29/78 , H01L31/0336 , H01L31/062
CPC分类号： H01L29/7806 , H01L27/0629 , H01L29/0615 , H01L29/0619 , H01L29/0696 , H01L29/0847 , H01L29/0878 , H01L29/1095 , H01L29/20 , H01L29/402 , H01L29/407 , H01L29/4236 , H01L29/456 , H01L29/47 , H01L29/475 , H01L29/7802 , H01L29/7811 , H01L29/7813 , H01L29/782 , H01L29/7823 , H01L29/872 , H01L29/8725
摘要： To attain reduction in size of a semiconductor device having a power transistor and an SBD, a semiconductor device according to the present invention comprises a first region and a second region formed on a main surface of a semiconductor substrate; plural first conductors and plural second conductors formed in the first and second regions respectively; a first semiconductor region and a second semiconductor region formed between adjacent first conductors in the first region, the second semiconductor region lying in the first semiconductor region and having a conductivity type opposite to that of the first semiconductor region; a third semiconductor region formed between adjacent second conductors in the second region, the third semiconductor region having the same conductivity type as that of the second semiconductor region and being lower in density than the second semiconductor region; a metal formed on the semiconductor substrate in the second region, the third semiconductor region having a metal contact region for contact with the metal, the metal being electrically connected to the second semiconductor region, and a center-to-center distance between adjacent first conductors in the first region being smaller than that between adjacent second conductors in the second region.
摘要翻译：为了实现具有功率晶体管和SBD的半导体器件的尺寸的减小，根据本发明的半导体器件包括形成在半导体衬底的主表面上的第一区域和第二区域; 分别形成在第一和第二区域中的多个第一导体和多个第二导体; 形成在所述第一区域中的相邻第一导体之间的第一半导体区域和第二半导体区域，所述第二半导体区域位于所述第一半导体区域中并具有与所述第一半导体区域相反的导电类型; 形成在所述第二区域的相邻的第二导体之间的第三半导体区域，所述第三半导体区域具有与所述第二半导体区域相同的导电类型，并且密度低于所述第二半导体区域; 在所述第二区域中形成在所述半导体衬底上的金属，所述第三半导体区域具有用于与所述金属接触的金属接触区域，所述金属电连接到所述第二半导体区域，以及相邻的第一导体之间的中心到中心距离在所述第一区域中小于所述第二区域中相邻的第二导体之间的距离。

8. 发明授权

US08426910B2 Semiconductor device for use in a power supply circuit and having a power MOSFET and Schottky barrier diode 有权
标题翻译：用于电源电路并具有功率MOSFET和肖特基势垒二极管的半导体器件
公开(公告)号：US08426910B2
公开(公告)日：2013-04-23
申请号：US13467536
申请日：2012-05-09
申请人： Nobuyuki Shirai , Nobuyoshi Matsuura , Yoshito Nakazawa
发明人： Nobuyuki Shirai , Nobuyoshi Matsuura , Yoshito Nakazawa
IPC分类号： H01L29/76
CPC分类号： H01L29/7806 , H01L27/0629 , H01L29/0615 , H01L29/0619 , H01L29/0696 , H01L29/0847 , H01L29/0878 , H01L29/1095 , H01L29/20 , H01L29/402 , H01L29/407 , H01L29/4236 , H01L29/456 , H01L29/47 , H01L29/475 , H01L29/7802 , H01L29/7811 , H01L29/7813 , H01L29/782 , H01L29/7823 , H01L29/872 , H01L29/8725
摘要： A semiconductor device for use in a power supply circuit has first and second MOSFETS. The source-drain path of one of the MOSFETS are coupled to the source-drain path of the other, and a load element is coupled to a connection node of the source-drain paths. The second MOSFET is formed on a semiconductor substrate with a Schottky barrier diode. First gate electrodes of the second MOSFET are formed in trenches in a first region of the semiconductor substrate, while second gate electrodes of the second MOSFET are formed in trenches in a second region of the semiconductor substrate. The first and second gate electrodes are electrically connected together. Portions of the Schottky barrier diode are formed between adjacent ones of the second gate electrodes. A center-to-center spacing between adjacent first gate electrodes is smaller than a center-to-center spacing between adjacent second gate electrodes.
摘要翻译：用于电源电路的半导体器件具有第一和第二MOSFET。 MOSFET之一的源极 - 漏极路径耦合到另一个MOSFET的源极 - 漏极路径，并且负载元件耦合到源极 - 漏极路径的连接节点。第二MOSFET形成在具有肖特基势垒二极管的半导体衬底上。第二MOSFET的第一栅电极形成在半导体衬底的第一区域中的沟槽中，而第二MOSFET的第二栅电极形成在半导体衬底的第二区域中的沟槽中。第一和第二栅极电连接在一起。在相邻的第二栅电极之间形成肖特基势垒二极管的部分。相邻的第一栅电极之间的中心到中心的间隔小于相邻的第二栅电极之间的中心间距。

9. 发明授权

US08193578B2 Power supply circuit having a semiconductor device including a MOSFET and a Schottky junction 失效
标题翻译：电源电路具有包括MOSFET和肖特基结的半导体器件
公开(公告)号：US08193578B2
公开(公告)日：2012-06-05
申请号：US13214131
申请日：2011-08-19
申请人： Nobuyuki Shirai , Nobuyoshi Matsuura , Yoshito Nakazawa
发明人： Nobuyuki Shirai , Nobuyoshi Matsuura , Yoshito Nakazawa
IPC分类号： H01L29/76
CPC分类号： H01L29/7806 , H01L27/0629 , H01L29/0615 , H01L29/0619 , H01L29/0696 , H01L29/0847 , H01L29/0878 , H01L29/1095 , H01L29/20 , H01L29/402 , H01L29/407 , H01L29/4236 , H01L29/456 , H01L29/47 , H01L29/475 , H01L29/7802 , H01L29/7811 , H01L29/7813 , H01L29/782 , H01L29/7823 , H01L29/872 , H01L29/8725
摘要： A power supply circuit includes first and second switching MOSFETS. A semiconductor device, including the second switching MOSFET, has a plurality of transistor cell regions disposed in a semiconductor substrate. A source electrode of the second MOSFET is disposed over a main surface of the semiconductor substrate and is in contact with a top surface of a source region in each of the plurality of transistor cell regions. A drain electrode of the second MOSFET is disposed over a back surface of the semiconductor substrate and is electrically connected to the semiconductor substrate. A Schottky cell region is disposed between the plurality of transistor cell regions in the semiconductor substrate. The source electrode is in contact with a part of the main surface of the semiconductor so as to form a Schottky junction in the Schottky cell region.
摘要翻译：电源电路包括第一和第二开关MOSFET。包括第二开关MOSFET的半导体器件具有设置在半导体衬底中的多个晶体管单元区域。第二MOSFET的源电极设置在半导体衬底的主表面上，并且与多个晶体管单元区域中的每一个中的源极区域的顶表面接触。第二MOSFET的漏电极设置在半导体衬底的背面上并与半导体衬底电连接。肖特基电池区设置在半导体衬底中的多个晶体管单元区域之间。源电极与半导体的主表面的一部分接触，以便在肖特基电池区域中形成肖特基结。

10. 发明授权

US07518208B2 Semiconductor device having power transistors and Schottky barrier diode 有权
标题翻译：具有功率晶体管和肖特基势垒二极管的半导体器件
公开(公告)号：US07518208B2
公开(公告)日：2009-04-14
申请号：US11482765
申请日：2006-07-10
申请人： Nobuyuki Shirai , Nobuyoshi Matsuura , Yoshito Nakazawa
发明人： Nobuyuki Shirai , Nobuyoshi Matsuura , Yoshito Nakazawa
IPC分类号： H01L29/47
CPC分类号： H01L29/7806 , H01L27/0629 , H01L29/0615 , H01L29/0619 , H01L29/0696 , H01L29/0847 , H01L29/0878 , H01L29/1095 , H01L29/20 , H01L29/402 , H01L29/407 , H01L29/4236 , H01L29/456 , H01L29/47 , H01L29/475 , H01L29/7802 , H01L29/7811 , H01L29/7813 , H01L29/782 , H01L29/7823 , H01L29/872 , H01L29/8725
摘要： A semiconductor device has a first region and a second region formed on a surface of a substrate. Plural first conductors and second conductors are formed in the first and second regions respectively. A first semiconductor region and a second semiconductor region are formed between adjacent first conductors. The second semiconductor region is in the first semiconductor region and has a conductivity type opposite to that of the first semiconductor. A third semiconductor region is formed between adjacent second conductors. The third semiconductor region has the same conductivity type as the second semiconductor region and is lower in density than the second semiconductor region. The third semiconductor region has a metal contact region for contact with a metal, which is electrically connected to the second semiconductor region. A center-to-center distance between adjacent first conductors is smaller than that between adjacent second conductors.
摘要翻译：半导体器件具有形成在衬底的表面上的第一区域和第二区域。多个第一导体和第二导体分别形成在第一和第二区域中。在相邻的第一导体之间形成第一半导体区域和第二半导体区域。第二半导体区域处于第一半导体区域并具有与第一半导体区域相反的导电类型。在相邻的第二导体之间形成第三半导体区域。第三半导体区域具有与第二半导体区域相同的导电类型，并且密度低于第二半导体区域。第三半导体区域具有与金属接触的金属接触区域，其与第二半导体区域电连接。相邻的第一导体之间的中心到中心的距离小于相邻的第二导体之间的距离。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式