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1. 发明申请

US20120325138A1 FILM-FORMING APPARATUS AND FILM-FORMING METHOD 有权
标题翻译：薄膜成型装置和成膜方法
公开(公告)号：US20120325138A1
公开(公告)日：2012-12-27
申请号：US13527198
申请日：2012-06-19
申请人： Kunihiko SUZUKI , Hideki Ito , Naohisa Ikeya , Hidekazu Tsuchida , Isaho Kamata , Masahiko Ito , Masami Naito , Hiroaki Fujibayashi , Ayumu Adachi , Koichi Nishikawa
发明人： Kunihiko SUZUKI , Hideki Ito , Naohisa Ikeya , Hidekazu Tsuchida , Isaho Kamata , Masahiko Ito , Masami Naito , Hiroaki Fujibayashi , Ayumu Adachi , Koichi Nishikawa
IPC分类号： C30B25/10
CPC分类号： C30B25/10
摘要： A film-forming apparatus and method comprising a film-forming chamber for supplying a reaction gas into, a cylindrical shaped liner provided between an inner wall of the film-forming chamber and a space for performing a film-forming process, a main-heater for heating a substrate placed inside the liner, from the bottom side, a sub-heater cluster provided between the liner and the inner wall, for heating the substrate from the top side, wherein the main-heater and the sub-heater cluster are resistive heaters, wherein the sub-heater cluster has a first sub-heater provided at the closest position to the substrate, and a second sub-heater provided above the first sub-heater, wherein the first sub-heater heats the substrate in combination with the main-heater, the second sub-heater heats the liner at a lower output than the first sub-heater, wherein each temperature of the main-heater, the first sub-heater, and the second sub-heater is individually controlled.
摘要翻译：一种成膜装置和方法，包括：用于将反应气体供应的成膜室，设置在成膜室的内壁和用于进行成膜工艺的空间之间的圆柱形衬套，主加热器用于从底侧加热设置在衬套内的衬底，设置在衬套和内壁之间的副加热器组，用于从顶侧加热衬底，其中主加热器和次加热器组是电阻的加热器，其中所述副加热器组具有设置在与所述基板最靠近的位置的第一副加热器，以及设置在所述第一子加热器上方的第二副加热器，其中所述第一副加热器将所述基板与主加热器，第二分热器以比第一副加热器低的输出加热衬套，其中主加热器，第一副加热器和第二副加热器的每个温度被单独控制。

2. 发明授权

US09598792B2 Film-forming apparatus and film-forming method 有权
公开(公告)号：US09598792B2
公开(公告)日：2017-03-21
申请号：US13527198
申请日：2012-06-19
申请人： Kunihiko Suzuki , Hideki Ito , Naohisa Ikeya , Hidekazu Tsuchida , Isaho Kamata , Masahiko Ito , Masami Naito , Hiroaki Fujibayashi , Ayumu Adachi , Koichi Nishikawa
发明人： Kunihiko Suzuki , Hideki Ito , Naohisa Ikeya , Hidekazu Tsuchida , Isaho Kamata , Masahiko Ito , Masami Naito , Hiroaki Fujibayashi , Ayumu Adachi , Koichi Nishikawa
IPC分类号： C30B25/10
CPC分类号： C30B25/10
摘要： A film-forming apparatus and method comprising a film-forming chamber for supplying a reaction gas into, a cylindrical shaped liner provided between an inner wall of the film-forming chamber and a space for performing a film-forming process, a main-heater for heating a substrate placed inside the liner, from the bottom side, a sub-heater cluster provided between the liner and the inner wall, for heating the substrate from the top side, wherein the main-heater and the sub-heater cluster are resistive heaters, wherein the sub-heater cluster has a first sub-heater provided at the closest position to the substrate, and a second sub-heater provided above the first sub-heater, wherein the first sub-heater heats the substrate in combination with the main-heater, the second sub-heater heats the liner at a lower output than the first sub-heater, wherein each temperature of the main-heater, the first sub-heater, and the second sub-heater is individually controlled.

3. 发明授权

US09273412B2 Film-forming apparatus and film-forming method 有权
公开(公告)号：US09273412B2
公开(公告)日：2016-03-01
申请号：US13527198
申请日：2012-06-19
申请人： Kunihiko Suzuki , Hideki Ito , Naohisa Ikeya , Hidekazu Tsuchida , Isaho Kamata , Masahiko Ito , Masami Naito , Hiroaki Fujibayashi , Ayumu Adachi , Koichi Nishikawa
发明人： Kunihiko Suzuki , Hideki Ito , Naohisa Ikeya , Hidekazu Tsuchida , Isaho Kamata , Masahiko Ito , Masami Naito , Hiroaki Fujibayashi , Ayumu Adachi , Koichi Nishikawa
IPC分类号： C30B25/10
摘要： A film-forming apparatus and method comprising a film-forming chamber for supplying a reaction gas into, a cylindrical shaped liner provided between an inner wall of the film-forming chamber and a space for performing a film-forming process, a main-heater for heating a substrate placed inside the liner, from the bottom side, a sub-heater cluster provided between the liner and the inner wall, for heating the substrate from the top side, wherein the main-heater and the sub-heater cluster are resistive heaters, wherein the sub-heater cluster has a first sub-heater provided at the closest position to the substrate, and a second sub-heater provided above the first sub-heater, wherein the first sub-heater heats the substrate in combination with the main-heater, the second sub-heater heats the liner at a lower output than the first sub-heater, wherein each temperature of the main-heater, the first sub-heater, and the second sub-heater is individually controlled.

4. 发明授权

US08815711B2 Manufacturing apparatus and method for semiconductor device and cleaning method of manufacturing apparatus for semiconductor 有权
标题翻译：半导体装置的制造装置和方法以及半导体制造装置的清洗方法
公开(公告)号：US08815711B2
公开(公告)日：2014-08-26
申请号：US13160209
申请日：2011-06-14
申请人： Kunihiko Suzuki , Hideki Ito , Hidekazu Tsuchida , Isaho Kamata , Masahiko Ito
发明人： Kunihiko Suzuki , Hideki Ito , Hidekazu Tsuchida , Isaho Kamata , Masahiko Ito
IPC分类号： H01L21/20 , H01L21/36 , H01L21/31 , H01L21/469 , B08B17/02 , H01L21/67 , C23C16/44 , H01L21/205
CPC分类号： B08B17/02 , C23C16/4405 , C23C16/4412 , H01L21/67109
摘要： A manufacturing apparatus for a semiconductor device, including: a reaction chamber configured to perform film formation on a wafer; a process gas supplying mechanism provided in an upper part of the reaction chamber and configured to introduce process gas to an interior of the reaction chamber; a gas discharging mechanism provided in a lower part of the reaction chamber and configured to discharge gas from the reaction chamber; a supporting member configured to hold the wafer; a cleaning gas supplying mechanism provided in an outer periphery of the supporting member and configured to emit cleaning gas in an outer periphery direction below an upper end of the supporting member; a heater configured to heat the wafer; and a rotary driving mechanism configured to rotate the wafer.
摘要翻译：一种半导体器件的制造装置，包括：反应室，被配置为在晶片上进行成膜; 工艺气体供给机构，设置在所述反应室的上部，并且被配置为将处理气体引入所述反应室的内部; 气体排出机构，设置在所述反应室的下部，并且构成为从所述反应室排出气体; 构造成保持晶片的支撑构件; 清洁气体供给机构，其设置在所述支撑部件的外周，并且构造成在所述支撑部件的上端的外周方向上排出清洗气体; 被配置为加热晶片的加热器; 以及旋转驱动机构，其构造成使晶片旋转。

5. 发明授权

US08455269B2 Method for recovering an on-state forward voltage and, shrinking stacking faults in bipolar semiconductor devices, and the bipolar semiconductor devices 失效
标题翻译：用于恢复双极半导体器件中的导通状态正向电压和收缩堆垛层错的方法以及双极型半导体器件
公开(公告)号：US08455269B2
公开(公告)日：2013-06-04
申请号：US12376199
申请日：2006-08-04
申请人： Toshiyuki Miyanagi , Hidekazu Tsuchida , Isaho Kamata , Yoshitaka Sugawara , Koji Nakayama , Ryosuke Ishii
发明人： Toshiyuki Miyanagi , Hidekazu Tsuchida , Isaho Kamata , Yoshitaka Sugawara , Koji Nakayama , Ryosuke Ishii
IPC分类号： H01L21/00
CPC分类号： H01L29/045 , H01L23/345 , H01L29/0619 , H01L29/1608 , H01L29/861 , H01L2924/0002 , H01L2924/00
摘要： In a bipolar semiconductor device such that electrons and holes are recombined in a silicon carbide epitaxial film grown from the surface of a silicon carbide single crystal substrate at the time of on-state forward bias operation; an on-state forward voltage increased in a silicon carbide bipolar semiconductor device is recovered by shrinking the stacking fault area enlarged by on-state forward bias operation. In a method of this invention, the bipolar semiconductor device in which the stacking fault area enlarged and the on-state forward voltage has been increased by on-state forward bias operation, is heated at a temperature of higher than 350° C.
摘要翻译：在双极型半导体器件中，在通态正向偏压工作时，从碳化硅单晶衬底的表面生长的碳化硅外延膜中电子和空穴复合; 在碳化硅双极半导体器件中增加的导通状态正向电压通过收缩通过接通状态正向偏置操作而扩大的堆垛层错的区域来恢复。在本发明的方法中，通过接通状态的正向偏压操作来增加堆垛层错扩大区域和导通状态正向电压的双极性半导体器件在高于350℃的温度下被加热。

6. 发明授权

US08293623B2 Epitaxial SiC single crystal substrate and method of manufacture of epitaxial SiC single crystal substrate 有权
标题翻译：外延SiC单晶衬底及外延SiC单晶衬底的制造方法
公开(公告)号：US08293623B2
公开(公告)日：2012-10-23
申请号：US12677255
申请日：2008-09-12
申请人： Kenji Momose , Michiya Odawara , Keiichi Matsuzawa , Hajime Okumura , Kazutoshi Kojima , Yuuki Ishida , Hidekazu Tsuchida , Isaho Kamata
发明人： Kenji Momose , Michiya Odawara , Keiichi Matsuzawa , Hajime Okumura , Kazutoshi Kojima , Yuuki Ishida , Hidekazu Tsuchida , Isaho Kamata
IPC分类号： H01L21/20 , H01L21/36
CPC分类号： C23C16/46 , C23C16/325 , C30B25/02 , C30B29/36 , H01L21/02378 , H01L21/02433 , H01L21/02529 , H01L21/02576 , H01L21/0262
摘要： An epitaxial SiC single crystal substrate including a SiC single crystal wafer whose main surface is a c-plane or a surface that inclines a c-plane with an angle of inclination that is more than 0 degree but less than 10 degrees, and SiC epitaxial film that is formed on the main surface of the SiC single crystal wafer, wherein the dislocation array density of threading edge dislocation arrays that are formed in the SiC epitaxial film is 10 arrays/cm2 or less.
摘要翻译：外延SiC单晶衬底，其包括主表面为c面的SiC单晶晶片或倾斜角度大于0度但小于10度的c面倾斜的表面;以及SiC外延膜其形成在SiC单晶晶片的主表面上，其中形成在SiC外延膜中的穿线边缘位错阵列的位错阵列密度为10阵列/ cm 2以下。

7. 发明申请

US20100258816A1 Silicon carbide semiconductor device and manufacturing method therefor 失效
公开(公告)号：US20100258816A1
公开(公告)日：2010-10-14
申请号：US12801679
申请日：2010-06-21
申请人： Joji Nakayama , Yoshitaka Sugawara , Katsunori Asano , Hidekazu Tsuchida , Isaho Kamata , Toshiyuki Miyanagi , Tomonori Nakamura
发明人： Joji Nakayama , Yoshitaka Sugawara , Katsunori Asano , Hidekazu Tsuchida , Isaho Kamata , Toshiyuki Miyanagi , Tomonori Nakamura
IPC分类号： H01L29/24
CPC分类号： H01L29/868 , H01L29/045 , H01L29/0619 , H01L29/1608 , H01L29/66068 , H01L29/73 , H01L29/7397
摘要： With a view to preventing increases in forward voltage due to a change with the lapse of time of a bipolar semiconductor device using a silicon carbide semiconductor, a buffer layer, a drift layer and other p-type and n-type semiconductor layers are formed on a growth surface, which is given by a surface of a crystal of a silicon carbide semiconductor having an off-angle θ of 8 degrees from a (000-1) carbon surface of the crystal, at a film growth rate having a film-thickness increasing rate per hour h of 10 μm/h, which is three times or more higher than conventional counterparts. The flow rate of silane and propane material gases and dopant gases is largely increased to enhance the film growth rate.

8. 发明申请

US20090195296A1 Method for Recovering an On-State Forward Voltage and, Shrinking Stacking Faults in Bipolar Semiconductor Devices, and the Bipolar Semiconductor Devices 失效
标题翻译：用于恢复双极半导体器件中的导通状态正向电压和收缩堆叠故障的方法以及双极半导体器件
公开(公告)号：US20090195296A1
公开(公告)日：2009-08-06
申请号：US12376199
申请日：2006-08-04
申请人： Toshiyuki Miyanagi , Hidekazu Tsuchida , Isaho Kamata , Yoshitaka Sugawara , Koji Nakayama , Ryosuke Ishii
发明人： Toshiyuki Miyanagi , Hidekazu Tsuchida , Isaho Kamata , Yoshitaka Sugawara , Koji Nakayama , Ryosuke Ishii
IPC分类号： G11C5/14 , H01L23/00 , H01L29/70 , H01L21/322
CPC分类号： H01L29/045 , H01L23/345 , H01L29/0619 , H01L29/1608 , H01L29/861 , H01L2924/0002 , H01L2924/00
摘要： In a bipolar semiconductor device such that electrons and holes are recombined in a silicon carbide epitaxial film grown from the surface of a silicon carbide single crystal substrate at the time of on-state forward bias operation; an on-state forward voltage increased in a silicon carbide bipolar semiconductor device is recovered by shrinking the stacking fault area enlarged by on-state forward bias operation. In a method of this invention, the bipolar semiconductor device in which the stacking fault area enlarged and the on-state forward voltage has been increased by on-state forward bias operation, is heated at a temperature of higher than 350° C.
摘要翻译：在双极型半导体器件中，在通态正向偏压工作时，从碳化硅单晶衬底的表面生长的碳化硅外延膜中电子和空穴复合; 在碳化硅双极半导体器件中增加的导通状态正向电压通过收缩通过接通状态正向偏置操作而扩大的堆垛层错的区域来恢复。在本发明的方法中，通过接通状态的正向偏压操作来增加堆垛层错扩大区域和导通状态正向电压的双极性半导体器件在高于350℃的温度下被加热。

9. 发明申请

US20090045413A1 Silicon Carbide Bipolar Semiconductor Device 失效
标题翻译：碳化硅双极半导体器件
公开(公告)号：US20090045413A1
公开(公告)日：2009-02-19
申请号：US12097019
申请日：2006-12-13
申请人： Ryosuke Ishii , Koji Nakayama , Yoshitaka Sugawara , Toshiyuki Miyanagi , Hidekazu Tsuchida , Isaho Kamata , Tomonori Nakamura
发明人： Ryosuke Ishii , Koji Nakayama , Yoshitaka Sugawara , Toshiyuki Miyanagi , Hidekazu Tsuchida , Isaho Kamata , Tomonori Nakamura
IPC分类号： H01L29/24
CPC分类号： H01L29/1604 , H01L21/0465 , H01L21/047 , H01L29/0615 , H01L29/0619 , H01L29/0661 , H01L29/1608 , H01L29/6606 , H01L29/66068 , H01L29/8613
摘要： In a SiC bipolar semiconductor device with a mesa structure having a SiC drift layer of a first conductive type and a SiC carrier injection layer of a second conductive type that are SiC epitaxial layers grown from a surface of a SiC single crystal substrate, the formation of stacking faults and the expansion of the area thereof are prevented and thereby the increase in forward voltage is prevented. Further, a characteristic of withstand voltage in a reverse biasing is improved. An forward-operation degradation preventing layer is formed on a mesa wall or on a mesa wall and a mesa periphery to separate spatially the surface of the mesa wall from a pn-junction interface. In one embodiment, the forward-operation degradation preventing layer is composed of a silicon carbide low resistance layer of a second conductive type that is equipotential during the application of a reverse voltage. In another embodiment, the forward-operation degradation preventing layer is composed of a silicon carbide conductive layer of a second conductive type, and a metal layer that is equipotential during the application of a reverse voltage is formed on a surface of the silicon carbide conductive layer. In still another embodiment, the forward-operation degradation preventing layer is composed of a high resistance amorphous layer.
摘要翻译：在具有由SiC单晶衬底的表面生长的SiC外延层的具有第一导电类型的SiC漂移层和第二导电类型的SiC载流子注入层的台阶结构的SiC双极型半导体器件中，形成防止堆垛层错及其面积的膨胀，从而防止正向电压的增加。此外，提高了反向偏置中的耐受电压的特性。在台面壁或台面壁和台面周边上形成正向操作降解防止层，以在空间上分离台面壁的表面与pn结界面。在一个实施例中，正向操作降解防止层由在施加反向电压期间具有等电位的第二导电类型的碳化硅低电阻层构成。在另一个实施方案中，正向操作降解防止层由第二导电类型的碳化硅导电层构成，并且在施加反向电压期间具有等电位的金属层形成在碳化硅导电层的表面上。在另一个实施方案中，正向操作降解防止层由高电阻非晶层组成。

10. 发明申请

US20100261333A1 Silicon carbide semiconductor device and manufacturing method therefor 失效
公开(公告)号：US20100261333A1
公开(公告)日：2010-10-14
申请号：US12801680
申请日：2010-06-21
申请人： Koji Nakayama , Yoshitaka Sugawara , Katsunori Asano , Hidekazu Tsuchida , Isaho Kamata , Toshiyuki Miyanagi , Tomonori Nakamura
发明人： Koji Nakayama , Yoshitaka Sugawara , Katsunori Asano , Hidekazu Tsuchida , Isaho Kamata , Toshiyuki Miyanagi , Tomonori Nakamura
IPC分类号： H01L21/04 , H01L21/304
CPC分类号： H01L29/868 , H01L29/045 , H01L29/0619 , H01L29/1608 , H01L29/66068 , H01L29/73 , H01L29/7397
摘要： With a view to preventing increases in forward voltage due to a change with the lapse of time of a bipolar semiconductor device using a silicon carbide semiconductor, a buffer layer, a drift layer and other p-type and n-type semiconductor layers are formed on a growth surface, which is given by a surface of a crystal of a silicon carbide semiconductor having an off-angle θ of 8 degrees from a (000-1) carbon surface of the crystal, at a film growth rate having a film-thickness increasing rate per hour h of 10 μm/h, which is three times or more higher than conventional counterparts. The flow rate of silane and propane material gases and dopant gases is largely increased to enhance the film growth rate.

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