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1. 发明授权

US08154026B2 Silicon carbide bipolar semiconductor device 失效
标题翻译：碳化硅双极半导体器件
公开(公告)号：US08154026B2
公开(公告)日：2012-04-10
申请号：US12097019
申请日：2006-12-13
申请人： Ryosuke Ishii , Koji Nakayama , Yoshitaka Sugawara , Toshiyuki Miyanagi , Hidekazu Tsuchida , Isaho Kamata , Tomonori Nakamura
发明人： Ryosuke Ishii , Koji Nakayama , Yoshitaka Sugawara , Toshiyuki Miyanagi , Hidekazu Tsuchida , Isaho Kamata , Tomonori Nakamura
IPC分类号： H01L29/15
CPC分类号： H01L29/1604 , H01L21/0465 , H01L21/047 , H01L29/0615 , H01L29/0619 , H01L29/0661 , H01L29/1608 , H01L29/6606 , H01L29/66068 , H01L29/8613
摘要： In a SiC bipolar semiconductor device with a mesa structure having a SiC drift layer of a first conductive type and a SiC carrier injection layer of a second conductive type that are SiC epitaxial layers grown from a surface of a SiC single crystal substrate, the formation of stacking faults and the expansion of the area thereof are prevented and thereby the increase in forward voltage is prevented. Further, a characteristic of withstand voltage in a reverse biasing is improved. An forward-operation degradation preventing layer is formed on a mesa wall or on a mesa wall and a mesa periphery to separate spatially the surface of the mesa wall from a pn-junction interface. In one embodiment, the forward-operation degradation preventing layer is composed of a silicon carbide low resistance layer of a second conductive type that is equipotential during the application of a reverse voltage. In another embodiment, the forward-operation degradation preventing layer is composed of a silicon carbide conductive layer of a second conductive type, and a metal layer that is equipotential during the application of a reverse voltage is formed on a surface of the silicon carbide conductive layer. In still another embodiment, the forward-operation degradation preventing layer is composed of a high resistance amorphous layer.
摘要翻译：在具有由SiC单晶衬底的表面生长的SiC外延层的具有第一导电类型的SiC漂移层和第二导电类型的SiC载流子注入层的台阶结构的SiC双极型半导体器件中，形成防止堆垛层错及其面积的膨胀，从而防止正向电压的增加。此外，提高了反向偏置中的耐受电压的特性。在台面壁或台面壁和台面周边上形成正向操作降解防止层，以在空间上分离台面壁的表面与pn结界面。在一个实施例中，正向操作降解防止层由在施加反向电压期间具有等电位的第二导电类型的碳化硅低电阻层构成。在另一个实施方案中，正向操作降解防止层由第二导电类型的碳化硅导电层构成，并且在施加反向电压期间具有等电位的金属层形成在碳化硅导电层的表面上。在另一个实施方案中，正向操作降解防止层由高电阻非晶层组成。

2. 发明申请

US20090045413A1 Silicon Carbide Bipolar Semiconductor Device 失效
标题翻译：碳化硅双极半导体器件
公开(公告)号：US20090045413A1
公开(公告)日：2009-02-19
申请号：US12097019
申请日：2006-12-13
申请人： Ryosuke Ishii , Koji Nakayama , Yoshitaka Sugawara , Toshiyuki Miyanagi , Hidekazu Tsuchida , Isaho Kamata , Tomonori Nakamura
发明人： Ryosuke Ishii , Koji Nakayama , Yoshitaka Sugawara , Toshiyuki Miyanagi , Hidekazu Tsuchida , Isaho Kamata , Tomonori Nakamura
IPC分类号： H01L29/24
CPC分类号： H01L29/1604 , H01L21/0465 , H01L21/047 , H01L29/0615 , H01L29/0619 , H01L29/0661 , H01L29/1608 , H01L29/6606 , H01L29/66068 , H01L29/8613
摘要： In a SiC bipolar semiconductor device with a mesa structure having a SiC drift layer of a first conductive type and a SiC carrier injection layer of a second conductive type that are SiC epitaxial layers grown from a surface of a SiC single crystal substrate, the formation of stacking faults and the expansion of the area thereof are prevented and thereby the increase in forward voltage is prevented. Further, a characteristic of withstand voltage in a reverse biasing is improved. An forward-operation degradation preventing layer is formed on a mesa wall or on a mesa wall and a mesa periphery to separate spatially the surface of the mesa wall from a pn-junction interface. In one embodiment, the forward-operation degradation preventing layer is composed of a silicon carbide low resistance layer of a second conductive type that is equipotential during the application of a reverse voltage. In another embodiment, the forward-operation degradation preventing layer is composed of a silicon carbide conductive layer of a second conductive type, and a metal layer that is equipotential during the application of a reverse voltage is formed on a surface of the silicon carbide conductive layer. In still another embodiment, the forward-operation degradation preventing layer is composed of a high resistance amorphous layer.
摘要翻译：在具有由SiC单晶衬底的表面生长的SiC外延层的具有第一导电类型的SiC漂移层和第二导电类型的SiC载流子注入层的台阶结构的SiC双极型半导体器件中，形成防止堆垛层错及其面积的膨胀，从而防止正向电压的增加。此外，提高了反向偏置中的耐受电压的特性。在台面壁或台面壁和台面周边上形成正向操作降解防止层，以在空间上分离台面壁的表面与pn结界面。在一个实施例中，正向操作降解防止层由在施加反向电压期间具有等电位的第二导电类型的碳化硅低电阻层构成。在另一个实施方案中，正向操作降解防止层由第二导电类型的碳化硅导电层构成，并且在施加反向电压期间具有等电位的金属层形成在碳化硅导电层的表面上。在另一个实施方案中，正向操作降解防止层由高电阻非晶层组成。

3. 发明授权

US08455269B2 Method for recovering an on-state forward voltage and, shrinking stacking faults in bipolar semiconductor devices, and the bipolar semiconductor devices 失效
标题翻译：用于恢复双极半导体器件中的导通状态正向电压和收缩堆垛层错的方法以及双极型半导体器件
公开(公告)号：US08455269B2
公开(公告)日：2013-06-04
申请号：US12376199
申请日：2006-08-04
申请人： Toshiyuki Miyanagi , Hidekazu Tsuchida , Isaho Kamata , Yoshitaka Sugawara , Koji Nakayama , Ryosuke Ishii
发明人： Toshiyuki Miyanagi , Hidekazu Tsuchida , Isaho Kamata , Yoshitaka Sugawara , Koji Nakayama , Ryosuke Ishii
IPC分类号： H01L21/00
CPC分类号： H01L29/045 , H01L23/345 , H01L29/0619 , H01L29/1608 , H01L29/861 , H01L2924/0002 , H01L2924/00
摘要： In a bipolar semiconductor device such that electrons and holes are recombined in a silicon carbide epitaxial film grown from the surface of a silicon carbide single crystal substrate at the time of on-state forward bias operation; an on-state forward voltage increased in a silicon carbide bipolar semiconductor device is recovered by shrinking the stacking fault area enlarged by on-state forward bias operation. In a method of this invention, the bipolar semiconductor device in which the stacking fault area enlarged and the on-state forward voltage has been increased by on-state forward bias operation, is heated at a temperature of higher than 350° C.
摘要翻译：在双极型半导体器件中，在通态正向偏压工作时，从碳化硅单晶衬底的表面生长的碳化硅外延膜中电子和空穴复合; 在碳化硅双极半导体器件中增加的导通状态正向电压通过收缩通过接通状态正向偏置操作而扩大的堆垛层错的区域来恢复。在本发明的方法中，通过接通状态的正向偏压操作来增加堆垛层错扩大区域和导通状态正向电压的双极性半导体器件在高于350℃的温度下被加热。

4. 发明授权

US08367510B2 Process for producing silicon carbide semiconductor device 失效
标题翻译：碳化硅半导体器件的制造方法
公开(公告)号：US08367510B2
公开(公告)日：2013-02-05
申请号：US12067028
申请日：2006-09-01
申请人： Toshiyuki Miyanagi , Hidekazu Tsuchida , Isaho Kamata , Masahiro Nagano , Yoshitaka Sugawara , Koji Nakayama , Ryosuke Ishii
发明人： Toshiyuki Miyanagi , Hidekazu Tsuchida , Isaho Kamata , Masahiro Nagano , Yoshitaka Sugawara , Koji Nakayama , Ryosuke Ishii
IPC分类号： H01L21/331
CPC分类号： H01L29/66068 , H01L21/02378 , H01L21/02433 , H01L21/02529 , H01L21/02576 , H01L21/02579 , H01L21/0262 , H01L21/0485 , H01L29/1608 , H01L29/861
摘要： In a bipolar silicon carbide semiconductor device in which an electron and a hole recombine with each other during current passage within a silicon carbide epitaxial film grown from a surface of a silicon carbide single crystal substrate, an object described herein is the reduction of defects which are the nuclei of a stacking fault which is expanded by current passage, thereby suppressing the increase of the forward voltage of the bipolar silicon carbide semiconductor device. In a method for producing a bipolar silicon carbide semiconductor device, the device is subjected to a thermal treatment at a temperature of 300° C. or higher in the final step of production. Preferably, the above-mentioned thermal treatment is carried out after the formation of electrodes and then the resulting bipolar silicon carbide semiconductor device is mounted in a package.
摘要翻译：在从碳化硅单晶衬底的表面生长的碳化硅外延膜内的电流通过期间电子和空穴彼此复合的双极性碳化硅半导体器件中，本文所述的目的是减少通过电流通过而扩展的堆垛层错的核，由此抑制双极性碳化硅半导体器件的正向电压的增加。在制造双极性碳化硅半导体器件的方法中，在最后的制造工序中，在300℃以上的温度下进行热处理。优选地，上述热处理在电极形成之后进行，然后将所得到的双极性碳化硅半导体器件安装在封装中。

5. 发明申请

US20090317983A1 Process for Producing Silicon Carbide Semiconductor Device 失效
标题翻译：生产碳化硅半导体器件的工艺
公开(公告)号：US20090317983A1
公开(公告)日：2009-12-24
申请号：US12067028
申请日：2006-09-01
申请人： Toshiyuki Miyanagi , Hidekazu Tsuchida , Isaho Kamata , Masahiro Nagano , Yoshitaka Sugawara , Koji Nakayama , Ryosuke Ishii
发明人： Toshiyuki Miyanagi , Hidekazu Tsuchida , Isaho Kamata , Masahiro Nagano , Yoshitaka Sugawara , Koji Nakayama , Ryosuke Ishii
IPC分类号： H01L21/26
CPC分类号： H01L29/66068 , H01L21/02378 , H01L21/02433 , H01L21/02529 , H01L21/02576 , H01L21/02579 , H01L21/0262 , H01L21/0485 , H01L29/1608 , H01L29/861
摘要： In a bipolar silicon carbide semiconductor device in which an electron and a hole recombine with each other during current passage within a silicon carbide epitaxial film grown from a surface of a silicon carbide single crystal substrate, an object described herein is the reduction of defects which are the nuclei of a stacking fault which is expanded by current passage, thereby suppressing the increase of the forward voltage of the bipolar silicon carbide semiconductor device. In a method for producing a bipolar silicon carbide semiconductor device, the device is subjected to a thermal treatment at a temperature of 300° C. or higher in the final step of production. Preferably, the above-mentioned thermal treatment is carried out after the formation of electrodes and then the resulting bipolar silicon carbide semiconductor device is mounted in a package.
摘要翻译：在从碳化硅单晶衬底的表面生长的碳化硅外延膜内的电流通过期间电子和空穴彼此复合的双极性碳化硅半导体器件中，本文所述的目的是减少通过电流通过而扩展的堆垛层错的核，由此抑制双极性碳化硅半导体器件的正向电压的增加。在制造双极性碳化硅半导体器件的方法中，在最后的制造工序中，在300℃以上的温度下进行热处理。优选地，上述热处理在电极形成之后进行，然后将所得到的双极性碳化硅半导体器件安装在封装中。

6. 发明申请

US20090195296A1 Method for Recovering an On-State Forward Voltage and, Shrinking Stacking Faults in Bipolar Semiconductor Devices, and the Bipolar Semiconductor Devices 失效
标题翻译：用于恢复双极半导体器件中的导通状态正向电压和收缩堆叠故障的方法以及双极半导体器件
公开(公告)号：US20090195296A1
公开(公告)日：2009-08-06
申请号：US12376199
申请日：2006-08-04
申请人： Toshiyuki Miyanagi , Hidekazu Tsuchida , Isaho Kamata , Yoshitaka Sugawara , Koji Nakayama , Ryosuke Ishii
发明人： Toshiyuki Miyanagi , Hidekazu Tsuchida , Isaho Kamata , Yoshitaka Sugawara , Koji Nakayama , Ryosuke Ishii
IPC分类号： G11C5/14 , H01L23/00 , H01L29/70 , H01L21/322
CPC分类号： H01L29/045 , H01L23/345 , H01L29/0619 , H01L29/1608 , H01L29/861 , H01L2924/0002 , H01L2924/00
摘要： In a bipolar semiconductor device such that electrons and holes are recombined in a silicon carbide epitaxial film grown from the surface of a silicon carbide single crystal substrate at the time of on-state forward bias operation; an on-state forward voltage increased in a silicon carbide bipolar semiconductor device is recovered by shrinking the stacking fault area enlarged by on-state forward bias operation. In a method of this invention, the bipolar semiconductor device in which the stacking fault area enlarged and the on-state forward voltage has been increased by on-state forward bias operation, is heated at a temperature of higher than 350° C.
摘要翻译：在双极型半导体器件中，在通态正向偏压工作时，从碳化硅单晶衬底的表面生长的碳化硅外延膜中电子和空穴复合; 在碳化硅双极半导体器件中增加的导通状态正向电压通过收缩通过接通状态正向偏置操作而扩大的堆垛层错的区域来恢复。在本发明的方法中，通过接通状态的正向偏压操作来增加堆垛层错扩大区域和导通状态正向电压的双极性半导体器件在高于350℃的温度下被加热。

7. 发明授权

US07960738B2 Silicon carbide semiconductor device and manufacturing method therefor 失效
公开(公告)号：US07960738B2
公开(公告)日：2011-06-14
申请号：US12801681
申请日：2010-06-21
申请人： Koji Nakayama , Yoshitaka Sugawara , Katsunori Asano , Hidekazu Tsuchida , Isaho Kamata , Toshiyuki Miyanagi , Tomonori Nakamura
发明人： Koji Nakayama , Yoshitaka Sugawara , Katsunori Asano , Hidekazu Tsuchida , Isaho Kamata , Toshiyuki Miyanagi , Tomonori Nakamura
IPC分类号： H01L29/15 , H01L31/0312
CPC分类号： H01L29/868 , H01L29/045 , H01L29/0619 , H01L29/1608 , H01L29/66068 , H01L29/73 , H01L29/7397
摘要： With a view to preventing increases in forward voltage due to a change with the lapse of time of a bipolar semiconductor device using a silicon carbide semiconductor, a buffer layer, a drift layer and other p-type and n-type semiconductor layers are formed on a growth surface, which is given by a surface of a crystal of a silicon carbide semiconductor having an off-angle θ of 8 degrees from a (000-1) carbon surface of the crystal, at a film growth rate having a film-thickness increasing rate per hour h of 10 μm/h, which is three times or more higher than conventional counterparts. The flow rate of silane and propane material gases and dopant gases is largely increased to enhance the film growth rate.

8. 发明申请

US20100258817A1 Silicon carbide semiconductor device and manufacturing method therefor 失效
公开(公告)号：US20100258817A1
公开(公告)日：2010-10-14
申请号：US12801681
申请日：2010-06-21
申请人： Koji Nakayama , Yoshitaka Sugawara , Katsunori Asano , Hidekazu Tsuchida , Isaho Kamata , Toshiyuki Miyanagi , Tomonori Nakamura
发明人： Koji Nakayama , Yoshitaka Sugawara , Katsunori Asano , Hidekazu Tsuchida , Isaho Kamata , Toshiyuki Miyanagi , Tomonori Nakamura
IPC分类号： H01L29/24
CPC分类号： H01L29/868 , H01L29/045 , H01L29/0619 , H01L29/1608 , H01L29/66068 , H01L29/73 , H01L29/7397
摘要： With a view to preventing increases in forward voltage due to a change with the lapse of time of a bipolar semiconductor device using a silicon carbide semiconductor, a buffer layer, a drift layer and other p-type and n-type semiconductor layers are formed on a growth surface, which is given by a surface of a crystal of a silicon carbide semiconductor having an off-angle θ of 8 degrees from a (000-1) carbon surface of the crystal, at a film growth rate having a film-thickness increasing rate per hour h of 10 μm/h, which is three times or more higher than conventional counterparts. The flow rate of silane and propane material gases and dopant gases is largely increased to enhance the film growth rate.

9. 发明授权

US07960737B2 Silicon carbide semiconductor device and manufacturing method therefor 失效
公开(公告)号：US07960737B2
公开(公告)日：2011-06-14
申请号：US12801679
申请日：2010-06-21
申请人： Koji Nakayama , Yoshitaka Sugawara , Katsunori Asano , Hidekazu Tsuchida , Isaho Kamata , Toshiyuki Miyanagi , Tomonori Nakamura
发明人： Koji Nakayama , Yoshitaka Sugawara , Katsunori Asano , Hidekazu Tsuchida , Isaho Kamata , Toshiyuki Miyanagi , Tomonori Nakamura
IPC分类号： H01L29/15 , H01L31/0312
CPC分类号： H01L29/868 , H01L29/045 , H01L29/0619 , H01L29/1608 , H01L29/66068 , H01L29/73 , H01L29/7397
摘要： With a view to preventing increases in forward voltage due to a change with the lapse of time of a bipolar semiconductor device using a silicon carbide semiconductor, a buffer layer, a drift layer and other p-type and n-type semiconductor layers are formed on a growth surface, which is given by a surface of a crystal of a silicon carbide semiconductor having an off-angle θ of 8 degrees from a (000-1) carbon surface of the crystal, at a film growth rate having a film-thickness increasing rate per hour h of 10 μm/h, which is three times or more higher than conventional counterparts. The flow rate of silane and propane material gases and dopant gases is largely increased to enhance the film growth rate.

10. 发明授权

US07960257B2 Silicon carbide semiconductor device and manufacturing method therefor 失效
标题翻译：碳化硅半导体器件及其制造方法
公开(公告)号：US07960257B2
公开(公告)日：2011-06-14
申请号：US12801680
申请日：2010-06-21
申请人： Koji Nakayama , Yoshitaka Sugawara , Katsunori Asano , Hidekazu Tsuchida , Isaho Kamata , Toshiyuki Miyanagi , Tomonori Nakamura
发明人： Koji Nakayama , Yoshitaka Sugawara , Katsunori Asano , Hidekazu Tsuchida , Isaho Kamata , Toshiyuki Miyanagi , Tomonori Nakamura
IPC分类号： H01L21/20 , H01L21/36
CPC分类号： H01L29/868 , H01L29/045 , H01L29/0619 , H01L29/1608 , H01L29/66068 , H01L29/73 , H01L29/7397
摘要： With a view to preventing increases in forward voltage due to a change with the lapse of time of a bipolar semiconductor device using a silicon carbide semiconductor, a buffer layer, a drift layer and other p-type and n-type semiconductor layers are formed on a growth surface, which is given by a surface of a crystal of a silicon carbide semiconductor having an off-angle θ of 8 degrees from a (000-1) carbon surface of the crystal, at a film growth rate having a film-thickness increasing rate per hour h of 10 μm/h, which is three times or more higher than conventional counterparts. The flow rate of silane and propane material gases and dopant gases is largely increased to enhance the film growth rate.
摘要翻译：为了防止由于使用碳化硅半导体的双极性半导体器件随时间的变化引起的正向电压的增加，缓冲层，漂移层和其他p型和n型半导体层形成在生长表面，其由具有偏角角度的硅碳化物半导体的晶体的表面给出; （000-1）碳表面8度，以每小时薄膜增加率为10μm/小时的膜生长速率，比常规对应物高3倍以上。硅烷和丙烷材料气体和掺杂气体的流速大大增加，以提高膜生长速率。

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