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    • 1. 发明授权
    • Mask pattern correction method
    • 掩模图案校正方法和系统
    • US6060368A
    • 2000-05-09
    • US206364
    • 1998-12-07
    • Koji HashimotoHisako AoyamaSoichi InoueKazuko YamamotoSachiko Kobayashi
    • Koji HashimotoHisako AoyamaSoichi InoueKazuko YamamotoSachiko Kobayashi
    • G03F1/36G03F1/72G03F7/20H01L21/027H01L21/76
    • G03F7/70441G03F1/36
    • This invention is provided to eliminate the optical proximity effect which will occur because of different rates of dimensional change between before and after etching when a plurality of gate materials are etched in a single device. After a to-be-corrected region is extracted, an n.sup.+ -type polysilicon gate layer is extracted. Then, the distance is calculated from the n.sup.+ -type polysilicon gate layer to a pattern adjacent thereto which can be a p.sup.+ -type polysilicon gate layer, thereby correcting the size of the n.sup.+ -type polysilicon gate layer with reference to a correction table for the pattern adjacent to the n.sup.+ -type polysilicon gate layer. After that, a p.sup.+ -type polysilicon gate layer is extracted. Then, the distance is calculated from the p.sup.+ -type polysilicon gate layer to a pattern adjacent thereto which can be an n.sup.+ -type polysilicon gate layer, thereby correcting the size of the p.sup.+ -type polysilicon gate layer with reference to a correction table for the pattern adjacent to the p.sup.+ -type polysilicon gate layer.
    • 提供本发明以消除当在单个器件中蚀刻多个栅极材料时在蚀刻之前和之后不同的尺寸变化率而将发生的光学邻近效应。 在提取待校正区域之后,提取n +型多晶硅栅极层。 然后,从n +型多晶硅栅极层到可以是p +型多晶硅栅极层的与其相邻的图案计算距离,从而参照n +型多晶硅栅极层的校正表来校正n +型多晶硅栅极层的尺寸 图案与n +型多晶硅栅极层相邻。 之后,提取p +型多晶硅栅极层。 然后,从p +型多晶硅栅极层到与其相邻的图案,其可以是n +型多晶硅栅极层,从而根据用于的p +型多晶硅栅极层的校正表来校正p +型多晶硅栅极层的尺寸, 图案与p +型多晶硅栅极层相邻。