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1. 发明授权

US07067411B2 Method to prevent metal oxide formation during polycide reoxidation 失效
标题翻译：防止多西环素再氧化过程中金属氧化物形成的方法
公开(公告)号：US07067411B2
公开(公告)日：2006-06-27
申请号：US10789890
申请日：2004-02-27
申请人： Klaus Florian Schuegraf , Scott Jeffrey DeBoer , Randhir P. S. Thakur
发明人： Klaus Florian Schuegraf , Scott Jeffrey DeBoer , Randhir P. S. Thakur
IPC分类号： H01L21/4763
CPC分类号： H01L29/6656 , H01L21/28247 , H01L21/31683 , H01L21/32 , Y10S257/90
摘要： A selective spacer to prevent metal oxide formation during polycide reoxidation of a feature such as an electrode and a method for forming the selective spacer are disclosed. A material such as a thin silicon nitride or an amorphous silicon film is selectively deposited on the electrode by limiting deposition time to a period less than an incubation time for the material on silicon dioxide near the electrode. The spacer is deposited only on the electrode and not on surrounding silicon dioxide. The spacer serves as a barrier for the electrode during subsequent oxidation to prevent metal oxide formation while allowing oxidation to take place over the silicon dioxide.
摘要翻译：公开了一种用于防止诸如电极的特征（例如电极）的聚合物再氧化期间的金属氧化物形成的选择性间隔物和用于形成选择性间隔物的方法。将诸如薄氮化硅或非晶硅膜的材料通过将沉积时间限制在电极附近的二氧化硅上的材料的温育时间以下来选择性地沉积在电极上。间隔物仅沉积在电极上而不是沉积在周围的二氧化硅上。间隔物在随后的氧化期间用作电极的屏障，以防止金属氧化物形成，同时允许氧化发生在二氧化硅上。

2. 发明授权

US07009264B1 Selective spacer to prevent metal oxide formation during polycide reoxidation 失效
标题翻译：选择性间隔物，以防止在多偶氮化物再氧化过程中形成金属氧化物
公开(公告)号：US07009264B1
公开(公告)日：2006-03-07
申请号：US08902809
申请日：1997-07-30
申请人： Klaus Florian Schuegraf , Scott Jeffrey DeBoer , Randhir P. S. Thakur
发明人： Klaus Florian Schuegraf , Scott Jeffrey DeBoer , Randhir P. S. Thakur
IPC分类号： H01L29/76
CPC分类号： H01L29/6656 , H01L21/28247 , H01L21/31683 , H01L21/32 , Y10S257/90
摘要： A selective spacer to prevent metal oxide formation during polycide reoxidation of a feature such as an electrode and a method for forming the selective spacer are disclosed. A material such as a thin silicon nitride or an amorphous silicon film is selectively deposited on the electrode by limiting deposition time to a period less than an incubation time for the material on silicon dioxide near the electrode. The spacer is deposited only on the electrode and not on surrounding silicon dioxide. The spacer serves as a barrier for the electrode during subsequent oxidation to prevent metal oxide formation while allowing oxidation to take place over the silicon dioxide.
摘要翻译：公开了一种用于防止诸如电极的特征（例如电极）的聚合物再氧化期间的金属氧化物形成的选择性间隔物和用于形成选择性间隔物的方法。将诸如薄氮化硅或非晶硅膜的材料通过将沉积时间限制在电极附近的二氧化硅上的材料的温育时间以下来选择性地沉积在电极上。间隔物仅沉积在电极上而不是沉积在周围的二氧化硅上。间隔物在随后的氧化期间用作电极的屏障，以防止金属氧化物形成，同时允许氧化发生在二氧化硅上。

3. 发明授权

US06528436B1 Method of forming silicon nitride layer directly on HSG polysilicon 失效
标题翻译：在HSG多晶硅上直接形成氮化硅层的方法
公开(公告)号：US06528436B1
公开(公告)日：2003-03-04
申请号：US09506177
申请日：2000-02-17
申请人： Scott Jeffrey DeBoer , Klaus Florian Schuegraf , Randhir P. S. Thakur , Robert K. Carstensen
发明人： Scott Jeffrey DeBoer , Klaus Florian Schuegraf , Randhir P. S. Thakur , Robert K. Carstensen
IPC分类号： H01L2131
CPC分类号： H01L27/10852 , H01L21/3185 , H01L21/3211 , H01L27/10817 , H01L27/10829 , H01L27/1087 , H01L28/84 , H01L29/66181
摘要： Silicon nitride layers, having thicknesses of 100 angstroms or less, are formed using chemical vapor deposition (CVD). Higher pressure and lower temperature deposition regimes are used to provide more uniform step coverage on complex topographies, such as hemispherical grain polysilicon. In one embodiment, a hot wall batch CVD processing apparatus utilizes a processing chamber pressure of at least as high as approximately 500 mTorr to deposit such films. In a second embodiment, a single wafer cold wall CVD processing apparatus utilizes a processing chamber pressure of approximately 1 to 600 Torr to deposit such films. The temperature range used to process such films is approximately 400 to 700 degrees Celsius. A mixture of ammonia (NH3) and a silane gas, such as dichlorosilane (DCS), are reacted in any type of CVD apparatus to produce the films.
摘要翻译：使用化学气相沉积（CVD）形成厚度为100埃或更小的氮化硅层。使用较高压力和较低温度的沉积方式为复杂形貌（例如半球形晶粒多晶硅）提供更均匀的阶梯覆盖。在一个实施例中，热壁分批CVD处理装置利用至少高达约500mTorr的处理室压力来沉积这些膜。在第二实施例中，单晶片冷壁CVD处理装置利用约1至600托的处理室压力来沉积这些膜。用于处理这种膜的温度范围约为400至700摄氏度。将氨（NH 3）和硅烷气体如二氯硅烷（DCS）的混合物在任何类型的CVD装置中反应以制备膜。

4. 发明授权

US06486020B1 High pressure reoxidation/anneal of high dielectric constant materials 有权
标题翻译：高介电常数材料的高压再氧化/退火
公开(公告)号：US06486020B1
公开(公告)日：2002-11-26
申请号：US09651377
申请日：2000-08-29
申请人： Randhir P. S. Thakur , Scott Jeffrey DeBoer
发明人： Randhir P. S. Thakur , Scott Jeffrey DeBoer
IPC分类号： H01L218242
CPC分类号： H01L28/60 , H01L21/32105 , H01L21/3211 , H01L27/1085 , H01L28/84
摘要： A high dielectric constant (DC) capacitive dielectric film is fabricated in a capacitor structure using relatively high pressure surface treatments. After forming the DC capacitive dielectric film on a supporting bottom plate electrode structure, a surface treatment comprising oxidation, at a pressure of at least approximately one atmosphere and temperatures of approximately at least 200 degrees Celsius densities/conditions the HDC capacitive dielectric film. When using a polysilicon, crystalline silicon, hemispherical grain polysilicon, germanium, or silicon-germanium bottom plate electrode, a relatively high pressure surface treatment, comprising rapid thermal nitridation or oxidation, is used after forming the bottom plate electrode, forming a diffusion barrier layer in a controlled manner.
摘要翻译：使用相对较高压力的表面处理，在电容器结构中制造高介电常数（DC）电容电介质膜。在支撑底板电极结构上形成DC电容电介质膜之后，在至少约一个气压的压力和大约至少200摄氏度的温度的温度下，包括氧化的表面处理/使HDC电容性电介质膜变形。当使用多晶硅，晶体硅，半球形晶粒多晶硅，锗或硅锗底板电极时，在形成底板电极之后使用包括快速热氮化或氧化的相对高压表面处理，形成扩散阻挡层以受控的方式。

5. 发明授权

US06282080B1 Semiconductor circuit components and capacitors 有权
标题翻译：半导体电路元件和电容器
公开(公告)号：US06282080B1
公开(公告)日：2001-08-28
申请号：US09229518
申请日：1999-01-13
申请人： Scott Jeffrey DeBoer , F. Daniel Gealy , Randhir P. S. Thakur
发明人： Scott Jeffrey DeBoer , F. Daniel Gealy , Randhir P. S. Thakur
IPC分类号： H01G406
CPC分类号： H01L28/40 , H01G4/10 , H01L21/28568 , H01L21/3145 , H01L21/31604 , H01L28/56
摘要： The invention pertains to semiconductor circuit components and capacitors. In another aspect, the invention includes a capacitor including: a) a first capacitor plate; b) a first tantalum-comprising layer over the first capacitor plate; c) a second tantalum-comprising layer over the first tantalum-comprising layer, the second tantalum-comprising layer having nitrogen; and d) a second capacitor plate over the second tantalum-comprising layer. In another aspect, the invention includes a component having: a) a first tantalum-comprising layer; and b) a second tantalum-comprising layer over the first tantalum-comprising layer, the second tantalum-comprising layer having nitrogen.
摘要翻译：本发明涉及半导体电路部件和电容器。在另一方面，本发明包括一种电容器，包括：a）第一电容器板; b）在第一电容器板上的第一钽包层; c）在所述第一含钽层上的第二含钽层，所述第二含钽层具有氮; 以及d）在所述第二含钽层上的第二电容器板。在另一方面，本发明包括具有以下成分的组分：a）第一含钽层; 以及b）在所述第一含钽层上的第二含钽层，所述第二含钽层具有氮。

6. 发明授权

US06326321B1 Methods of forming a layer of silicon nitride in semiconductor fabrication processes 失效
标题翻译：在半导体制造工艺中形成氮化硅层的方法
公开(公告)号：US06326321B1
公开(公告)日：2001-12-04
申请号：US09604849
申请日：2000-06-27
申请人： Scott Jeffrey DeBoer , John T. Moore , Mark Fischer , Randhir P. S. Thakur
发明人： Scott Jeffrey DeBoer , John T. Moore , Mark Fischer , Randhir P. S. Thakur
IPC分类号： H01L2131
CPC分类号： H01L21/28123 , H01L21/0276 , H01L21/31144 , H01L21/3185
摘要： In one aspect, the invention includes a semiconductor fabrication process, comprising: a) providing a substrate; b) forming a layer of silicon nitride over the substrate, the layer having a thickness; and c) enriching a portion of the thickness of the silicon nitride layer with silicon, the portion comprising less than or equal to about 95% of the thickness of the layer of silicon nitride. In another aspect, the invention includes a semiconductor fabrication process, comprising: a) providing a substrate; b) forming a layer of silicon nitride over the substrate, the layer having a thickness; and c) increasing a refractive index of a first portion of the thickness of the silicon nitride layer relative to a refractive index of a second portion of the silicon nitride layer, the first portion comprising less than or equal to about 95% of the thickness of the silicon nitride layer. In yet another aspect, the invention includes semiconductor wafer assembly, comprising: a) a semiconductor wafer substrate; and b) a layer of silicon nitride over the substrate, the layer comprising a thickness and two portions elevationally displaced relative to one another, a first of the two portions having less resistance than a second of the two portions, the first portion comprising less than or equal to about 95% of the thickness of the silicon nitride layer.
摘要翻译：一方面，本发明包括半导体制造工艺，其包括：a）提供衬底; b）在衬底上形成氮化硅层，该层具有厚度; 以及c）用硅富集氮化硅层的一部分厚度，该部分包含小于或等于氮化硅层厚度的约95％。在另一方面，本发明包括半导体制造工艺，其包括：a）提供衬底; b）在衬底上形成氮化硅层，该层具有厚度; 以及c）相对于所述氮化硅层的第二部分的折射率增加所述氮化硅层的厚度的第一部分的折射率，所述第一部分包括小于或等于所述氮化硅层的厚度的约95％氮化硅层。在另一方面，本发明包括半导体晶片组件，包括：a）半导体晶片衬底; 以及b）在所述衬底上的一层氮化硅，所述层包括相对于彼此高度位移的厚度和两个部分，所述两个部分中的第一部分具有比所述两个部分中的第二部分更小的电阻，所述第一部分包括小于或等于氮化硅层厚度的约95％。

7. 发明授权

US06773981B1 Methods of forming capacitors 失效
标题翻译：形成电容器的方法
公开(公告)号：US06773981B1
公开(公告)日：2004-08-10
申请号：US09630850
申请日：2000-08-02
申请人： Husam N. Al-Shareef , Scott Jeffrey DeBoer , F. Daniel Gealy , Randhir P. S. Thakur
发明人： Husam N. Al-Shareef , Scott Jeffrey DeBoer , F. Daniel Gealy , Randhir P. S. Thakur
IPC分类号： H01L218242
CPC分类号： H01L28/40 , H01L21/31604 , H01L27/10852
摘要： Capacitors and methods of forming capacitors are disclosed. In one implementation, a capacitor comprises a capacitor dielectric layer comprising Ta2O5 formed over a first capacitor electrode. A second capacitor electrode is formed over the Ta2O5 capacitor dielectric layer. Preferably, at least a portion of the second capacitor electrode is formed over and in contact with the Ta2O5 in an oxygen containing environment at a temperature of at least about 175° C. Chemical vapor deposition is one example forming method. The preferred second capacitor electrode comprises a conductive metal oxide. A more preferred second capacitor electrode comprises a conductive silicon comprising layer, over a conductive titanium comprising layer, over a conductive metal oxide layer. A preferred first capacitor electrode comprises a conductively doped Si—Ge alloy. Preferably, a Si3N4 layer is formed over the first capacitor electrode. DRAM cells and methods of forming DRAM cells are disclosed.
摘要翻译：公开了形成电容器的电容器和方法。在一个实施方式中，电容器包括在第一电容器电极上形成的包括Ta 2 O 5的电容器介电层。在Ta 2 O 5电容器电介质层上形成第二电容器电极。优选地，第二电容器电极的至少一部分在含氧环境中在至少约175℃的温度下形成在Ta 2 O 5上方并与Ta 2 O 5接触。化学气相沉积是一种示例性形成方法。优选的第二电容器电极包括导电金属氧化物。更优选的第二电容器电极包括在导电金属氧化物层上方的导电硅包含层，在导电的钛包覆层之上。优选的第一电容器电极包括导电掺杂的Si-Ge合金。优选地，在第一电容器电极上形成Si 3 N 4层。公开DRAM单元和形成DRAM单元的方法。

8. 发明授权

US06677661B1 Semiconductive wafer assemblies 失效
标题翻译：半导体晶片组件
公开(公告)号：US06677661B1
公开(公告)日：2004-01-13
申请号：US09429220
申请日：1999-10-28
申请人： Scott Jeffrey DeBoer , John T. Moore , Mark Fischer , Randhir P. S. Thakur
发明人： Scott Jeffrey DeBoer , John T. Moore , Mark Fischer , Randhir P. S. Thakur
IPC分类号： H01L2358
CPC分类号： H01L21/28123 , H01L21/0276 , H01L21/31144 , H01L21/3185
摘要： In one aspect, the invention includes a semiconductor fabrication process, comprising: a) providing a substrate; b) forming a layer of silicon nitride over the substrate, the layer having a thickness; and c) enriching a portion of the thickness of the silicon nitride layer with silicon, the portion comprising less than or equal to about 95% of the thickness of the layer of silicon nitride. In another aspect, the invention includes a semiconductor fabrication process, comprising: a) providing a substrate; b) forming a layer of silicon nitride over the substrate, the layer having a thickness; and c) increasing a refractive index of a first portion of the thickness of the silicon nitride layer relative to a refractive index of a second portion of the silicon nitride layer, the first portion comprising less than or equal to about 95% of the thickness of the silicon nitride layer. In yet another aspect, the invention includes semiconductor wafer assembly, comprising: a) a semiconductor wafer substrate; and b) a layer of silicon nitride over the substrate, the layer comprising a thickness and two portions elevationally displaced relative to one another, a first of the two portions having less resistance than a second of the two portions, the first portion comprising less than or equal to about 95% of the thickness of the silicon nitride layer.
摘要翻译：一方面，本发明包括半导体制造工艺，其包括：a）提供衬底; b）在衬底上形成氮化硅层，该层具有厚度; 以及c）用硅富集氮化硅层的一部分厚度，该部分包含小于或等于氮化硅层厚度的约95％。在另一方面，本发明包括半导体制造工艺，其包括：a）提供衬底; b）在衬底上形成氮化硅层，该层具有厚度; 以及c）相对于所述氮化硅层的第二部分的折射率增加所述氮化硅层的厚度的第一部分的折射率，所述第一部分包括小于或等于所述氮化硅层的厚度的约95％氮化硅层。在另一方面，本发明包括半导体晶片组件，包括：a）半导体晶片衬底; 以及b）在所述衬底上的一层氮化硅，所述层包括相对于彼此高度位移的厚度和两个部分，所述两个部分中的第一部分具有比所述两个部分中的第二部分更小的电阻，所述第一部分包括小于或等于氮化硅层厚度的约95％。

9. 发明授权

US06670288B1 Methods of forming a layer of silicon nitride in a semiconductor fabrication process 失效
标题翻译：在半导体制造工艺中形成氮化硅层的方法
公开(公告)号：US06670288B1
公开(公告)日：2003-12-30
申请号：US09604850
申请日：2000-06-27
申请人： Scott Jeffrey DeBoer , John T. Moore , Mark Fischer , Randhir P. S. Thakur
发明人： Scott Jeffrey DeBoer , John T. Moore , Mark Fischer , Randhir P. S. Thakur
IPC分类号： H01L2131
CPC分类号： H01L21/28123 , H01L21/0276 , H01L21/31144 , H01L21/3185
摘要： In one aspect, the invention includes a semiconductor fabrication process, comprising: a) providing a substrate; b) forming a layer of silicon nitride over the substrate, the layer having a thickness; and c) enriching a portion of the thickness of the silicon nitride layer with silicon, the portion comprising less than or equal to about 95% of the thickness of the layer of silicon nitride. In another aspect, the invention includes a semiconductor fabrication process, comprising: a) providing a substrate; b) forming a layer of silicon nitride over the substrate, the layer having a thickness; and c) increasing a refractive index of a first portion of the thickness of the silicon nitride layer relative to a refractive index of a second portion of the silicon nitride layer, the first portion comprising less than or equal to about 95% of the thickness of the silicon nitride layer. In yet another aspect, the invention includes semiconductor wafer assembly, comprising: a) a semiconductor wafer substrate; and b) a layer of silicon nitride over the substrate, the layer comprising a thickness and two portions elevationally displaced relative to one another, a first of the two portions having less resistance than a second of the two portions, the first portion comprising less than or equal to about 95% of the thickness of the silicon nitride layer.
摘要翻译：一方面，本发明包括半导体制造工艺，其包括：a）提供衬底; b）在衬底上形成氮化硅层，该层具有厚度; 以及c）用硅富集氮化硅层的一部分厚度，该部分包含小于或等于氮化硅层厚度的约95％。在另一方面，本发明包括半导体制造工艺，其包括：a）提供衬底; b）在衬底上形成氮化硅层，该层具有厚度; 以及c）相对于所述氮化硅层的第二部分的折射率增加所述氮化硅层的厚度的第一部分的折射率，所述第一部分包括小于或等于所述氮化硅层的厚度的约95％氮化硅层。在另一方面，本发明包括半导体晶片组件，包括：a）半导体晶片衬底; 以及b）在所述衬底上的一层氮化硅，所述层包括相对于彼此高度位移的厚度和两个部分，所述两个部分中的第一部分具有比所述两个部分中的第二部分更小的电阻，所述第一部分包括小于或等于氮化硅层厚度的约95％。

10. 发明授权

US06458645B2 Capacitor having tantalum oxynitride film and method for making same 失效
标题翻译：具有氮氧化钽膜的电容器及其制造方法
公开(公告)号：US06458645B2
公开(公告)日：2002-10-01
申请号：US09031526
申请日：1998-02-26
申请人： Scott Jeffrey DeBoer , Husam N. Al-Shareef , Randhir P. S. Thakur , Dan Gealy
发明人： Scott Jeffrey DeBoer , Husam N. Al-Shareef , Randhir P. S. Thakur , Dan Gealy
IPC分类号： H01L218242
CPC分类号： H01L21/02326 , G11C17/16 , H01L21/02183 , H01L21/02271 , H01L21/02337 , H01L21/0234 , H01L21/31604 , H01L21/31637 , H01L23/5252 , H01L27/10852 , H01L27/10861 , H01L27/112 , H01L27/11206 , H01L28/40 , H01L28/65 , H01L28/84 , H01L2924/0002 , H01L2924/00
摘要： A capacitor has a tantalum oxynitride film. One method for making the film comprises forming a bottom plate electrode and then forming a tantalum oxide film on the bottom plate electrode. Nitrogen is introduced to form a tantalum oxynitride film. A top plate electrode is formed on the tantalum oxynitride film.
摘要翻译：电容器具有氮氧化钽膜。制造薄膜的一种方法包括形成底板电极，然后在底板电极上形成氧化钽膜。引入氮气以形成氮氧化钽膜。在氮氧化钽膜上形成顶板电极。

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