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1. 发明授权

US07986560B2 Flash memory devices that utilize age-based verify voltages to increase data reliability and methods of operating same 有权
标题翻译：使用基于年龄的验证电压来提高数据可靠性的闪存器件和操作方法
公开(公告)号：US07986560B2
公开(公告)日：2011-07-26
申请号：US12558717
申请日：2009-09-14
申请人： Ki-Tae Park , Yong-Seok Kim , Ki-Nam Kim , Yeong-Taek Lee
发明人： Ki-Tae Park , Yong-Seok Kim , Ki-Nam Kim , Yeong-Taek Lee
IPC分类号： G11C11/34
CPC分类号： G11C16/344 , G11C16/3454
摘要： Disclosed is a method of verifying a programmed condition of a flash memory device, being comprised of: determining a level of an additional verifying voltage in response to the number of programming/erasing cycles of memory cells; conducting a verifying operation to programmed memory cells with an initial verifying voltage lower than the additional verifying voltage; and selectively conducting an additional verifying operation with the additional verifying voltage to the program-verified memory cells in response to the number of programming/erasing cycles.
摘要翻译：公开了一种验证闪速存储器件的编程状态的方法，其包括：响应于存储器单元的编程/擦除循环的数量确定额外的验证电压的电平; 对初始验证电压低于附加验证电压的程序存储单元执行验证操作; 以及响应于所述编程/擦除周期的数量，选择性地对所述经过程序验证的存储器单元执行附加验证电压的附加验证操作。

2. 发明授权

US07692970B2 Flash memory devices that utilize age-based verify voltages to increase data reliability and methods of operating same 有权
标题翻译：使用基于年龄的验证电压来提高数据可靠性的闪存器件和操作方法
公开(公告)号：US07692970B2
公开(公告)日：2010-04-06
申请号：US11943887
申请日：2007-11-21
申请人： Ki-Tae Park , Yong-Seok Kim , Ki-Nam Kim , Yeong-Taek Lee
发明人： Ki-Tae Park , Yong-Seok Kim , Ki-Nam Kim , Yeong-Taek Lee
IPC分类号： G11C11/34
CPC分类号： G11C16/344 , G11C16/3454
摘要： Disclosed is a method of verifying a programmed condition of a flash memory device, being comprised of: determining a level of an additional verifying voltage in response to the number of programming/erasing cycles of memory cells; conducting a verifying operation to programmed memory cells with an initial verifying voltage lower than the additional verifying voltage; and selectively conducting an additional verifying operation with the additional verifying voltage to the program-verified memory cells in response to the number of programming/erasing cycles.
摘要翻译：公开了一种验证闪速存储器件的编程状态的方法，其包括：响应于存储器单元的编程/擦除循环的数量确定额外的验证电压的电平; 对初始验证电压低于附加验证电压的程序存储单元执行验证操作; 以及响应于所述编程/擦除周期的数量，选择性地对所述经过程序验证的存储器单元执行附加验证电压的附加验证操作。

3. 发明申请

US20100002523A1 Flash Memory Devices that Utilize Age-Based Verify Voltages to Increase Data Reliability and Methods of Operating Same 有权
标题翻译：使用基于年龄的验证电压以提高数据可靠性的闪存设备和操作方法相同
公开(公告)号：US20100002523A1
公开(公告)日：2010-01-07
申请号：US12558717
申请日：2009-09-14
申请人： Ki-Tae Park , Yong-Seok Kim , Ki-Nam Kim , Yeong-Taek Lee
发明人： Ki-Tae Park , Yong-Seok Kim , Ki-Nam Kim , Yeong-Taek Lee
IPC分类号： G11C16/06 , G11C16/04
CPC分类号： G11C16/344 , G11C16/3454
摘要： Disclosed is a method of verifying a programmed condition of a flash memory device, being comprised of: determining a level of an additional verifying voltage in response to the number of programming/erasing cycles of memory cells; conducting a verifying operation to programmed memory cells with an initial verifying voltage lower than the additional verifying voltage; and selectively conducting an additional verifying operation with the additional verifying voltage to the program-verified memory cells in response to the number of programming/erasing cycles.
摘要翻译：公开了一种验证闪速存储器件的编程状态的方法，其包括：响应于存储器单元的编程/擦除循环的数量确定额外的验证电压的电平; 对初始验证电压低于附加验证电压的程序存储单元执行验证操作; 以及响应于所述编程/擦除周期的数量，选择性地对所述经过程序验证的存储器单元执行附加验证电压的附加验证操作。

4. 发明申请

US20080117688A1 Flash Memory Devices that Utilize Age-Based Verify Voltages to Increase Data Reliability and Methods of Operating Same 有权
标题翻译：使用基于年龄的验证电压以提高数据可靠性的闪存设备和操作方法相同
公开(公告)号：US20080117688A1
公开(公告)日：2008-05-22
申请号：US11943887
申请日：2007-11-21
申请人： Ki-Tae Park , Yong-Seok Kim , Ki-Nam Kim , Yeong-Taek Lee
发明人： Ki-Tae Park , Yong-Seok Kim , Ki-Nam Kim , Yeong-Taek Lee
IPC分类号： G11C11/34
CPC分类号： G11C16/344 , G11C16/3454
摘要： Disclosed is a method of verifying a programmed condition of a flash memory device, being comprised of: determining a level of an additional verifying voltage in response to the number of programming/erasing cycles of memory cells; conducting a verifying operation to programmed memory cells with an initial verifying voltage lower than the additional verifying voltage; and selectively conducting an additional verifying operation with the additional verifying voltage to the program-verified memory cells in response to the number of programming/erasing cycles.
摘要翻译：公开了一种验证闪速存储器件的编程状态的方法，其包括：响应于存储器单元的编程/擦除循环的数量确定额外的验证电压的电平; 对初始验证电压低于附加验证电压的程序存储单元执行验证操作; 以及响应于所述编程/擦除周期的数量，选择性地对所述经过程序验证的存储器单元执行附加验证电压的附加验证操作。

5. 发明授权

US07672166B2 Method of programming in a non-volatile memory device and non-volatile memory device for performing the same 有权
标题翻译：在非易失性存储器件和用于执行该非易失性存储器件的非易失性存储器件中进行编程的方法
公开(公告)号：US07672166B2
公开(公告)日：2010-03-02
申请号：US11955891
申请日：2007-12-13
申请人： Ki-Tae Park , Yeong-Taek Lee , Ki-Nam Kim , Doo-Gon Kim
发明人： Ki-Tae Park , Yeong-Taek Lee , Ki-Nam Kim , Doo-Gon Kim
IPC分类号： G11C16/06
CPC分类号： G11C16/3418 , G11C16/24 , G11C16/3427
摘要： Provided are methods for programming in a non-volatile memory device, using incremental step pulses as a program voltage that is applied to a selected wordline. Methods may include applying a precharge voltage to an even bitline and an odd bitline such that the even bitline and the odd bitline are alternately charged with the precharge voltage and a boosted voltage that is higher than the precharge voltage. Methods may further include applying a bitline voltage corresponding to program data to a selected bitline of the even bitline and the odd bitline.
摘要翻译：提供了用于在非易失性存储器件中进行编程的方法，其使用增量步长脉冲作为施加到选定字线的编程电压。方法可以包括将预充电电压施加到偶数位线和奇数位线，使得偶数位线和奇数位线以预充电电压和高于预充电电压的升压电压交替地充电。方法还可以包括将对应于程序数据的位线电压应用于偶位线和奇数位线的选定位线。

6. 发明授权

US07675783B2 Nonvolatile memory device and driving method thereof 有权
标题翻译：非易失性存储器件及其驱动方法
公开(公告)号：US07675783B2
公开(公告)日：2010-03-09
申请号：US12035732
申请日：2008-02-22
申请人： Ki-Tae Park , Ki-Nam Kim , Yeong-Taek Lee
发明人： Ki-Tae Park , Ki-Nam Kim , Yeong-Taek Lee
IPC分类号： G11C16/04
CPC分类号： G11C11/5621 , G11C16/10 , G11C16/30 , G11C16/3454
摘要： Provided are a nonvolatile memory device and a driving method thereof. In the method of driving a nonvolatile memory device, a structural shape and position of a memory cell to be driven is determined, and then the memory cell is driven with an optimized operating condition according to a distribution of the memory cell using a determination result.
摘要翻译：提供一种非易失性存储装置及其驱动方法。在驱动非易失性存储器件的方法中，确定要驱动的存储单元的结构形状和位置，然后使用确定结果根据存储单元的分布以优化的操作条件驱动存储单元。

7. 发明授权

US07551480B2 Multi-bit flash memory device and memory cell array 有权
标题翻译：多位闪存设备和存储单元阵列
公开(公告)号：US07551480B2
公开(公告)日：2009-06-23
申请号：US11637791
申请日：2006-12-13
申请人： Ki-Tae Park , Ki-Nam Kim , Yeong-Taek Lee
发明人： Ki-Tae Park , Ki-Nam Kim , Yeong-Taek Lee
IPC分类号： G11C11/34
CPC分类号： G11C16/0408 , G11C11/5621 , G11C16/0483 , G11C16/10 , G11C2211/5641 , G11C2211/5642
摘要： A flash memory device comprises a plurality of memory blocks. A selected memory block among the plurality of memory blocks includes 2n pages of data. The selected memory block includes different types of memory cells capable of storing different numbers of bits.
摘要翻译：闪存器件包括多个存储器块。多个存储块中选择的存储块包括2n页的数据。所选存储块包括能够存储不同位数的不同类型的存储单元。

8. 发明申请

US20080094914A1 METHODS OF RESTORING DATA IN FLASH MEMORY DEVICES AND RELATED FLASH MEMORY DEVICE MEMORY SYSTEMS 有权
标题翻译：在闪速存储器件中恢复数据的方法和相关的闪存存储器件存储器系统
公开(公告)号：US20080094914A1
公开(公告)日：2008-04-24
申请号：US11616411
申请日：2006-12-27
申请人： Ki-Tae Park , Ki-Nam Kim , Yeong-Taek Lee
发明人： Ki-Tae Park , Ki-Nam Kim , Yeong-Taek Lee
IPC分类号： G11C16/04
CPC分类号： G11C16/349 , G11C16/3495
摘要： Methods for setting a read voltage in a memory system which comprises a flash memory device and a memory controller for controlling the flash memory device, comprise sequentially varying a distribution read voltage to read page data from the flash memory device; constituting a distribution table having a data bit number and a distribution read voltage, the data bit number indicating an erase state among the page data respectively read from the flash memory device and the distribution read voltage corresponding to the read page data; detecting distribution read voltages corresponding to data bit numbers each indicating maximum points of possible cell states of a memory cell, based on the distribution table; and defining new read voltages based on the detected distribution read voltages.
摘要翻译：包括闪速存储器装置和用于控制闪速存储器件的存储器控制器的存储器系统中设置读取电压的方法包括顺序地改变分配读取电压以从闪速存储器装置读取页面数据; 构成具有数据位数和分布读电压的分布表，分别表示从闪存器件分别读取的页数据中的擦除状态的数据位数和与读页数据相对应的分布读电压; 基于分布表，检测对应于每个表示存储器单元的可能单元状态的最大点的数据位数的分布读取电压; 以及基于检测到的分布读取电压来定义新的读取电压。

9. 发明申请

US20090207666A1 Methods of Restoring Data in Flash Memory Devices and Related Flash Memory Device Memory Systems 审中-公开
标题翻译：恢复闪存设备和相关闪存设备内存系统中数据的方法
公开(公告)号：US20090207666A1
公开(公告)日：2009-08-20
申请号：US12428062
申请日：2009-04-22
申请人： Ki-Tae Park , Ki-Nam Kim , Yeong-Taek Lee
发明人： Ki-Tae Park , Ki-Nam Kim , Yeong-Taek Lee
IPC分类号： G11C16/06
CPC分类号： G11C16/349 , G11C16/3495
摘要： Methods for setting a read voltage in a memory system which comprises a flash memory device and a memory controller for controlling the flash memory device, comprise sequentially varying a distribution read voltage to read page data from the flash memory device; constituting a distribution table having a data bit number and a distribution read voltage, the data bit number indicating an erase state among the page data respectively read from the flash memory device and the distribution read voltage corresponding to the read page data; detecting distribution read voltages corresponding to data bit numbers each indicating maximum points of possible cell states of a memory cell, based on the distribution table; and defining new read voltages based on the detected distribution read voltages.
摘要翻译：包括闪速存储器装置和用于控制闪速存储器件的存储器控制器的存储器系统中设置读取电压的方法包括顺序地改变分配读取电压以从闪速存储器装置读取页面数据; 构成具有数据位数和分布读电压的分布表，分别表示从闪存器件分别读取的页数据中的擦除状态的数据位数和与读页数据相对应的分布读电压; 基于分布表，检测对应于每个表示存储器单元的可能单元状态的最大点的数据位数的分布读取电压; 以及基于检测到的分布读取电压来定义新的读取电压。

10. 发明授权

US07518909B2 Non-volatile memory device adapted to reduce coupling effect between storage elements and related methods 有权
标题翻译：适用于减少存储元件之间的耦合效应和相关方法的非易失性存储器件
公开(公告)号：US07518909B2
公开(公告)日：2009-04-14
申请号：US11606908
申请日：2006-12-01
申请人： Ki-Tae Park , Ki-Nam Kim , Yeong-Taek Lee
发明人： Ki-Tae Park , Ki-Nam Kim , Yeong-Taek Lee
IPC分类号： G11C16/04
CPC分类号： G11C16/0483 , G11C11/5628 , G11C16/12 , G11C16/3427 , G11C2211/5621 , G11C2211/5642
摘要： A non-volatile semiconductor memory device comprises first and second sub-memory arrays and a strapping line disposed between the first and second sub-memory arrays. A programming operation of the first sub-memory array is performed by simultaneously applying a programming voltage to odd and even bit lines connected to memory cells within the first sub-memory array.
摘要翻译：非挥发性半导体存储器件包括第一和第二子存储器阵列和布置在第一和第二子存储器阵列之间的捆扎线。通过同时向连接到第一子存储器阵列内的存储单元的奇偶位线施加编程电压来执行第一子存储器阵列的编程操作。

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