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1. 发明申请

US20080151633A1 Method of Programming in a Non-Volatile Memory Device and Non-Volatile Memory Device for Performing the Same 有权
标题翻译：在非易失性存储器件中编程的方法和用于执行其的非易失性存储器件
公开(公告)号：US20080151633A1
公开(公告)日：2008-06-26
申请号：US11955891
申请日：2007-12-13
申请人： Ki-Tae Park , Yeong-Taek Lee , Ki-Nam Kim , Doo-Gon Kim
发明人： Ki-Tae Park , Yeong-Taek Lee , Ki-Nam Kim , Doo-Gon Kim
IPC分类号： G11C16/06
CPC分类号： G11C16/3418 , G11C16/24 , G11C16/3427
摘要： Provided are methods for programming in a non-volatile memory device, using incremental step pulses as a program voltage that is applied to a selected wordline. Methods may include applying a precharge voltage to an even bitline and an odd bitline such that the even bitline and the odd bitline are alternately charged with the precharge voltage and a boosted voltage that is higher than the precharge voltage. Methods may further include applying a bitline voltage corresponding to program data to a selected bitline of the even bitline and the odd bitline.
摘要翻译：提供了用于在非易失性存储器件中进行编程的方法，其使用增量步长脉冲作为施加到选定字线的编程电压。方法可以包括将预充电电压施加到偶数位线和奇数位线，使得偶数位线和奇数位线以预充电电压和高于预充电电压的升压电压交替地充电。方法还可以包括将对应于程序数据的位线电压应用于偶位线和奇数位线的选定位线。

2. 发明授权

US07672166B2 Method of programming in a non-volatile memory device and non-volatile memory device for performing the same 有权
标题翻译：在非易失性存储器件和用于执行该非易失性存储器件的非易失性存储器件中进行编程的方法
公开(公告)号：US07672166B2
公开(公告)日：2010-03-02
申请号：US11955891
申请日：2007-12-13
申请人： Ki-Tae Park , Yeong-Taek Lee , Ki-Nam Kim , Doo-Gon Kim
发明人： Ki-Tae Park , Yeong-Taek Lee , Ki-Nam Kim , Doo-Gon Kim
IPC分类号： G11C16/06
CPC分类号： G11C16/3418 , G11C16/24 , G11C16/3427
摘要： Provided are methods for programming in a non-volatile memory device, using incremental step pulses as a program voltage that is applied to a selected wordline. Methods may include applying a precharge voltage to an even bitline and an odd bitline such that the even bitline and the odd bitline are alternately charged with the precharge voltage and a boosted voltage that is higher than the precharge voltage. Methods may further include applying a bitline voltage corresponding to program data to a selected bitline of the even bitline and the odd bitline.
摘要翻译：提供了用于在非易失性存储器件中进行编程的方法，其使用增量步长脉冲作为施加到选定字线的编程电压。方法可以包括将预充电电压施加到偶数位线和奇数位线，使得偶数位线和奇数位线以预充电电压和高于预充电电压的升压电压交替地充电。方法还可以包括将对应于程序数据的位线电压应用于偶位线和奇数位线的选定位线。

3. 发明授权

US07778085B2 Method of erasing in non-volatile memory device 有权
标题翻译：在非易失性存储器件中擦除的方法
公开(公告)号：US07778085B2
公开(公告)日：2010-08-17
申请号：US12136968
申请日：2008-06-11
申请人： Doo-Gon Kim , Ki-Tae Park , Yeong-Taek Lee
发明人： Doo-Gon Kim , Ki-Tae Park , Yeong-Taek Lee
IPC分类号： G11C16/06
CPC分类号： G11C16/14
摘要： An erasing method of post-programming in a nonvolatile memory device. The method includes post-programming dummy memory cells; verifying whether threshold voltages of the dummy memory cells are greater than or equal to a first voltage; post-programming normal memory cells; and verifying whether threshold voltages of the normal memory cells are greater than or equal to a second voltage. The first voltage is different from the second voltage.
摘要翻译：一种在非易失性存储器件中进行后编程的擦除方法。该方法包括后编程虚拟存储器单元; 验证所述伪存储单元的阈值电压是否大于或等于第一电压; 后编程正常记忆单元; 以及验证所述正常存储单元的阈值电压是否大于或等于第二电压。第一电压与第二电压不同。

4. 发明授权

US08315105B2 Method of erasing in non-volatile memory device 有权
标题翻译：在非易失性存储器件中擦除的方法
公开(公告)号：US08315105B2
公开(公告)日：2012-11-20
申请号：US13153285
申请日：2011-06-03
申请人： Doo-Gon Kim , Ki-Tae Park , Yeong-Taek Lee
发明人： Doo-Gon Kim , Ki-Tae Park , Yeong-Taek Lee
IPC分类号： G11C16/06
CPC分类号： G11C16/14
摘要： An erasing method of post-programming in a nonvolatile memory device. The method includes post-programming dummy memory cells; verifying whether threshold voltages of the dummy memory cells are greater than or equal to a first voltage; post-programming normal memory cells; and verifying whether threshold voltages of the normal memory cells are greater than or equal to a second voltage. The first voltage is different from the second voltage.
摘要翻译：一种在非易失性存储器件中进行后编程的擦除方法。该方法包括后编程虚拟存储器单元; 验证所述伪存储单元的阈值电压是否大于或等于第一电压; 后编程正常记忆单元; 以及验证所述正常存储单元的阈值电压是否大于或等于第二电压。第一电压与第二电压不同。

5. 发明授权

US07773427B2 Non-volatile memory device and method of operating 有权
标题翻译：非易失性存储器件及其操作方法
公开(公告)号：US07773427B2
公开(公告)日：2010-08-10
申请号：US12141737
申请日：2008-06-18
申请人： Ki-Tae Park , Doo-Gon Kim , Yeong-Taek Lee
发明人： Ki-Tae Park , Doo-Gon Kim , Yeong-Taek Lee
IPC分类号： G11C11/34
CPC分类号： G11C16/3418
摘要： A non volatile memory device and method of operating including providing a verification voltage to a gate of a selected memory cell within multiple memory cells and providing a first pass voltage to a gate of a non-selected memory cell within the memory cells during a program verification operation; and providing a read voltage to the gate of the selected memory cell and providing a second pass voltage to the gate of the non-selected memory cell during a read operation. The second pass voltage is greater than the first pass voltage.
摘要翻译：一种非易失性存储器件和操作方法，包括向多个存储器单元内的所选存储单元的栅极提供验证电压，并且在程序验证期间向存储器单元内的未选择存储单元的栅极提供第一通过电压操作; 以及向所选择的存储单元的栅极提供读取电压，并且在读取操作期间向未选择的存储单元的栅极提供第二通过电压。第二通过电压大于第一通过电压。

6. 发明申请

US20110235432A1 METHOD OF ERASING IN NON-VOLATILE MEMORY DEVICE 有权
标题翻译：非易失性存储器件中的擦除方法
公开(公告)号：US20110235432A1
公开(公告)日：2011-09-29
申请号：US13153285
申请日：2011-06-03
申请人： Doo-Gon Kim , Ki-Tae Park , Yeong-Taek Lee
发明人： Doo-Gon Kim , Ki-Tae Park , Yeong-Taek Lee
IPC分类号： G11C16/28
CPC分类号： G11C16/14
摘要： An erasing method of post-programming in a nonvolatile memory device. The method includes post-programming dummy memory cells; verifying whether threshold voltages of the dummy memory cells are greater than or equal to a first voltage; post-programming normal memory cells; and verifying whether threshold voltages of the normal memory cells are greater than or equal to a second voltage. The first voltage is different from the second voltage.
摘要翻译：一种在非易失性存储器件中进行后编程的擦除方法。该方法包括后编程虚拟存储器单元; 验证所述伪存储单元的阈值电压是否大于或等于第一电压; 后编程正常记忆单元; 以及验证所述正常存储单元的阈值电压是否大于或等于第二电压。第一电压与第二电压不同。

7. 发明授权

US07957199B2 Method of erasing in non-volatile memory device 有权
标题翻译：在非易失性存储器件中擦除的方法
公开(公告)号：US07957199B2
公开(公告)日：2011-06-07
申请号：US12833098
申请日：2010-07-09
申请人： Doo-Gon Kim , Ki-Tae Park , Yeong-Taek Lee
发明人： Doo-Gon Kim , Ki-Tae Park , Yeong-Taek Lee
IPC分类号： G11C16/06
CPC分类号： G11C16/14
摘要： An erasing method in a nonvolatile memory device is disclosed. The method includes post-programming dummy memory cells; verifying whether threshold voltages of the dummy memory cells are greater than or equal to a first voltage; post-programming normal memory cells; and verifying whether threshold voltages of the normal memory cells are greater than or equal to a second voltage. The first voltage is different from the second voltage, and the post-programming of the dummy memory cells comprises: applying a program voltage to a plurality of dummy word lines coupled to the dummy memory cells to post-program the dummy memory cells; and applying a pass voltage to a plurality of normal word lines coupled to the normal memory cells so that the normal memory cells are not post-programmed.
摘要翻译：公开了一种非易失性存储器件中的擦除方法。该方法包括后编程虚拟存储器单元; 验证所述伪存储单元的阈值电压是否大于或等于第一电压; 后编程正常记忆单元; 以及验证所述正常存储单元的阈值电压是否大于或等于第二电压。第一电压与第二电压不同，并且虚拟存储单元的后编程包括：将程序电压施加到耦合到虚拟存储器单元的多个虚拟字线，以对虚拟存储器单元进行后编程; 以及对耦合到所述正常存储器单元的多个正常字线施加通过电压，使得所述正常存储器单元未被编程。

8. 发明授权

US08031544B2 Semiconductor memory device with three-dimensional array and repair method thereof 有权
标题翻译：具有三维阵列的半导体存储器件及其修复方法
公开(公告)号：US08031544B2
公开(公告)日：2011-10-04
申请号：US12336827
申请日：2008-12-17
申请人： Doo-Gon Kim , Ki-Tae Park
发明人： Doo-Gon Kim , Ki-Tae Park
IPC分类号： G11C29/00
CPC分类号： G11C29/808
摘要： A nonvolatile memory device includes a three-dimensional (3D) cell array, a column selection circuit and a fuse block. The 3D cell array includes multiple cell arrays located in corresponding stacked substrate layers, the cell arrays sharing a bit line. The column selection circuit selects a memory unit included in the 3D cell array. The fuse block controls the column selection circuit to repair defective columns with one of multiple redundant bit lines located in the 3D cell array.
摘要翻译：非易失性存储器件包括三维（3D）单元阵列，列选择电路和熔丝块。 3D单元阵列包括位于对应的堆叠衬底层中的多个单元阵列，单元阵列共享位线。列选择电路选择包括在3D单元阵列中的存储单元。熔丝块控制列选择电路，以修复位于3D单元阵列中的多个冗余位线之一的有缺陷的列。

9. 发明授权

US07649775B2 Flash memory device applying erase voltage 有权
标题翻译：闪存器件施加擦除电压
公开(公告)号：US07649775B2
公开(公告)日：2010-01-19
申请号：US11970634
申请日：2008-01-08
申请人： Doo-Gon Kim , Ki-Tae Park
发明人： Doo-Gon Kim , Ki-Tae Park
IPC分类号： G11C16/00
CPC分类号： G11C16/3418
摘要： A flash memory device includes; a plurality of layers, each one including memory cells arranged in a matrix of rows and columns, a layer decoder configured to select one of the plurality of layers to thereby define a selected layer and an unselected layer, a voltage generator configured to generate an erase voltage at a level higher than ground voltage, and an internal voltage, and a row select circuit configured to apply the erase voltage to the selected layer, and apply at least one of the erase voltage and the internal voltage to the unselected layer during an erase operation.
摘要翻译：闪存装置包括：多个层，每个层包括排列成行和列的矩阵的存储单元;层解码器，被配置为选择所述多个层中的一个，从而限定所选择的层和未选择层;电压发生器，被配置为产生擦除电压高于接地电压，内部电压以及行选择电路，配置为向所选层施加擦除电压，并且在擦除期间将擦除电压和内部电压中的至少一个施加到未选择层操作。

10. 发明授权

US08208335B2 Semiconductor memory device and system including the same 有权
标题翻译：半导体存储器件及其系统
公开(公告)号：US08208335B2
公开(公告)日：2012-06-26
申请号：US12821515
申请日：2010-06-23
申请人： Dong-Hyuk Lee , Jung-Bae Lee , Doo-Gon Kim , Cheol Kim
发明人： Dong-Hyuk Lee , Jung-Bae Lee , Doo-Gon Kim , Cheol Kim
IPC分类号： G11C7/00
CPC分类号： G11C29/50 , G11C11/401 , G11C11/406 , G11C11/40618 , G11C11/40622 , G11C29/24 , G11C29/50016 , G11C2211/4061
摘要： A semiconductor memory device includes a cell array unit having a plurality of banks each having a plurality of blocks, and a refresh controller configured to set at least one of the blocks as a test block, perform a refresh operation on the blocks except for the test block in a self-refresh operation period, determine a refresh period of the test block, and then set another one of the blocks as the test block.
摘要翻译：半导体存储器件包括具有多个块的单元阵列单元，每个单元具有多个块，以及刷新控制器，被配置为将至少一个块设置为测试块，对除了测试之外的块执行刷新操作在自刷新操作期间块，确定测试块的刷新周期，然后将另一个块设置为测试块。

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