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    • 9. 发明授权
    • Post vertical interconnects formed with silicide etch stop and method of making
    • 后置垂直互连形成硅化物蚀刻停止和制造方法
    • US07307012B2
    • 2007-12-11
    • US10611246
    • 2003-06-30
    • James M. Cleeves
    • James M. Cleeves
    • H01L21/4763H01L21/461H01L21/302
    • H01L27/11568H01L21/76885H01L27/105H01L27/115H01L27/11578
    • A method to form a vertical interconnect advantageous for high-density semiconductor devices. A conductive etch stop layer, preferably of cobalt silicide, is formed. The etch stop layer may be in the form of patterned lines or wires. A layer of contact material is formed on and in contact with the etch stop layer. The layer of contact material is patterned to form posts. Dielectric is deposited over and between the posts, then the dielectric planarized to expose the tops of the posts. The posts can serve as vertical interconnects which electrically connect a next conductive layer formed on and in contact with the vertical interconnects with the underlying etch stop layer. The patterned dimension of vertical interconnects formed according to the present invention can be substantially the same as the minimum feature size, even at very small minimum feature size.
    • 一种形成有利于高密度半导体器件的垂直互连的方法。 形成优选硅化钴的导电蚀刻停止层。 蚀刻停止层可以是图案化线或线的形式。 接触材料层形成在蚀刻停止层上并与蚀刻停止层接触。 图案化接触材料层以形成柱。 电介质沉积在柱之间和之间,然后将电介质平坦化以暴露柱的顶部。 柱可以用作垂直互连,其将形成在垂直互连上的下一个导电层与下面的蚀刻停止层电连接。 根据本发明形成的垂直互连的图案尺寸可以与最小特征尺寸基本相同,即使在非常小的最小特征尺寸。