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1. 发明授权

US08407447B2 Dynamically reallocating computing components between partitions 有权
标题翻译：在分区之间动态重新分配计算组件
公开(公告)号：US08407447B2
公开(公告)日：2013-03-26
申请号：US12639335
申请日：2009-12-16
申请人： Kenneth C. Duisenberg , Loren M. Koehler , Ivan Farkas , Stephen B. Lyle , Rajeev Grover
发明人： Kenneth C. Duisenberg , Loren M. Koehler , Ivan Farkas , Stephen B. Lyle , Rajeev Grover
IPC分类号： G06F12/02
CPC分类号： G06F9/5077
摘要： Systems, methods and computing components are provided for dynamically reallocating a plurality of computing components among one or more logical partitions. A first computing component that is allocated to a first partition may have a management processor. A second computing component may be allocated to a second partition. The management processor of the first computing component may be configured to reallocate the first computing component to a third partition without affecting the second computing component.
摘要翻译：提供了系统，方法和计算组件，用于在一个或多个逻辑分区之间动态地重新分配多个计算组件。分配给第一分区的第一计算组件可以具有管理处理器。可以将第二计算组件分配给第二分区。第一计算组件的管理处理器可以被配置为将第一计算组件重新分配到第三分区而不影响第二计算组件。

2. 发明授权

US08239539B2 Management processors cooperating to control partition resources 有权
标题翻译：合作管理处理器来控制分区资源
公开(公告)号：US08239539B2
公开(公告)日：2012-08-07
申请号：US12639360
申请日：2009-12-16
申请人： Kenneth C. Duisenberg , Stephen B. Lyle , Rajeev Grover , Loren M. Koehler , Ivan Farkas
发明人： Kenneth C. Duisenberg , Stephen B. Lyle , Rajeev Grover , Loren M. Koehler , Ivan Farkas
IPC分类号： G06F13/00
CPC分类号： G06F15/7835 , G06F9/5077
摘要： Systems, methods and computing components are provided for allocating a plurality of computing components among one or more logical partitions. Each of the plurality of computing components may have a management processor that is configured to assume a role among management processors of a partition. Each management processor may then cooperate with other management processors of the partition to control resources of the partition.
摘要翻译：系统，方法和计算组件被提供用于在一个或多个逻辑分区之间分配多个计算组件。多个计算组件中的每一个可以具有被配置为在分区的管理处理器中承担角色的管理处理器。然后，每个管理处理器可以与分区的其他管理处理器协作来控制分区的资源。

3. 发明授权

US08924597B2 Domain management processor 有权
标题翻译：域管理处理器
公开(公告)号：US08924597B2
公开(公告)日：2014-12-30
申请号：US12997138
申请日：2008-06-20
申请人： Kenneth C. Duisenberg , Loren M. Koehler , Tamra I. Perez
发明人： Kenneth C. Duisenberg , Loren M. Koehler , Tamra I. Perez
IPC分类号： G06F3/00 , G06F13/00 , G06F13/36 , G06F3/06
CPC分类号： G06F3/0632 , G06F3/0607 , G06F3/067 , G06F15/177
摘要： Various embodiments of a method [800] of distributing configuration information within a predefined set of conjoined blades of a blade partition are described. In one embodiment, a configuration rule at a database for a predefined set of conjoined blades of a blade partition is accessed, wherein conjoined blades within the blade partition are coupled with management processors [805]. A portion of the configuration rule is compared with a hardware configuration of the blade partition [810]. The portion of the configuration information is an identification of the conjoined blades [810]. When the portion of the configuration rule correlates with the hardware configuration, the configuration rule is provided to the management processors of the blade partition [815].
摘要翻译：描述了在刀片分区的预定义的一组联合刀片内分配配置信息的方法[800]的各种实施例。在一个实施例中，访问用于刀片分区的预定义的一组联合刀片的数据库中的配置规则，其中刀片分区内的联合刀片与管理处理器[805]耦合。将配置规则的一部分与刀片分区的硬件配置进行比较[810]。配置信息的一部分是联合刀片的标识[810]。当配置规则的部分与硬件配置相关时，配置规则被提供给刀片分区的管理处理器[815]。

4. 发明申请

US20110093572A1 LOW LEVEL INITIALIZER 审中-公开
标题翻译：低电平初始化
公开(公告)号：US20110093572A1
公开(公告)日：2011-04-21
申请号：US12999942
申请日：2008-06-20
申请人： Loren M. Koehler , Kenneth C. Duisenberg , Dhruv Choksey
发明人： Loren M. Koehler , Kenneth C. Duisenberg , Dhruv Choksey
IPC分类号： G06F15/177
CPC分类号： G06F3/0632 , G06F3/0607 , G06F3/067 , G06F9/5061
摘要： Various embodiments of a method of configuring a predefined set of electrically isolated blades to function as a single blade are described. In one embodiment, a configuration rule is accessed, wherein a portion of the configuration rule assigns roles to management processors coupled with the predefined set of conjoined blades of a blade partition. Assistant management processors are directed to configure blade manageability modules to support the assigned roles. The blade manageability modules are coupled with the management processors. In one embodiment, the assistant management processors are directed to configure resources to be shared across the blade partition according to the configuration rule. After determining that the conjoined blades are configured according to the configuration rule, the conjoined blades are initialized. Thus, the conjoined blades are coordinated to function as a single blade.
摘要翻译：描述了将预定义的一组电隔离叶片配置为用作单个叶片的方法的各种实施例。在一个实施例中，访问配置规则，其中配置规则的一部分将角色分配给与刀片分区的预定义的一组联合刀片相结合的管理处理器。助理管理处理器旨在配置刀片管理模块以支持分配的角色。刀片可管理性模块与管理处理器相结合。在一个实施例中，辅助管理处理器被配置为根据配置规则来配置跨刀片分区共享的资源。在确定根据配置规则配置联合刀片后，初始化联合刀片。因此，结合的叶片被协调以用作单个叶片。

5. 发明申请

US20110113160A1 DOMAIN MANAGEMENT PROCESSOR 有权
标题翻译：域管理处理器
公开(公告)号：US20110113160A1
公开(公告)日：2011-05-12
申请号：US12997138
申请日：2008-06-20
申请人： Kenneth C. Duisenberg , Loren M. Koehler , Tamra I. Perez
发明人： Kenneth C. Duisenberg , Loren M. Koehler , Tamra I. Perez
IPC分类号： G06F3/00
CPC分类号： G06F3/0632 , G06F3/0607 , G06F3/067 , G06F15/177
摘要： Various embodiments of a method [800] of distributing configuration information within a predefined set of conjoined blades of a blade partition are described. In one embodiment, a configuration rule at a database for a predefined set of conjoined blades of a blade partition is accessed, wherein conjoined blades within the blade partition are coupled with management processors [805]. A portion of the configuration rule is compared with a hardware configuration of the blade partition [810]. The portion of the configuration information is an identification of the conjoined blades [810]. When the portion of the configuration rule correlates with the hardware configuration, the configuration rule is provided to the management processors of the blade partition [815].
摘要翻译：描述了在刀片分区的预定义的一组联合刀片内分配配置信息的方法[800]的各种实施例。在一个实施例中，访问用于刀片分区的预定义的一组联合刀片的数据库中的配置规则，其中刀片分区内的联合刀片与管理处理器[805]耦合。将配置规则的一部分与刀片分区的硬件配置进行比较[810]。配置信息的一部分是联合刀片的标识[810]。当配置规则的部分与硬件配置相关时，配置规则被提供给刀片分区的管理处理器[815]。

6. 发明授权

US07333498B2 Method and apparatus for separating data packets in a memory buffer 失效
标题翻译：用于分离存储器缓冲器中的数据分组的方法和装置
公开(公告)号：US07333498B2
公开(公告)日：2008-02-19
申请号：US10147004
申请日：2002-05-15
申请人： Kenneth C. Duisenberg , Rajeev Grover
发明人： Kenneth C. Duisenberg , Rajeev Grover
IPC分类号： H04L12/54
CPC分类号： H04L49/901 , H04L49/90 , H04L49/9042 , H04L69/22
摘要： Method and apparatus of separating packets. Specifically, a method of separating data packets in a memory buffer is disclosed. The method locates a memory buffer containing a pre-selected address at a buffer header of the memory buffer. A first data packet containing the buffer header is separated from a remaining part of the memory buffer. The first data packet is associated with a first packet length. The method then searches the remaining part of the memory buffer to locate a plurality of packet headers associated with a plurality of concatenated data packets. Each of the plurality of packet headers contains the pre-selected address. The method then separates the plurality of concatenated data packets, that is associated with a plurality of concatenated packet lengths, for processing.
摘要翻译：分离数据包的方法和装置。具体地，公开了一种在存储器缓冲器中分离数据分组的方法。该方法在内存缓冲区的缓冲区头部找到一个包含预选地址的内存缓冲区。包含缓冲器头部的第一数据包与存储器缓冲器的剩余部分分离。第一数据分组与第一分组长度相关联。该方法然后搜索存储器缓冲器的剩余部分以定位与多个级联数据分组相关联的多个分组报头。多个分组报头中的每一个包含预先选择的地址。然后，该方法分离与多个级联的分组长度相关联的多个级联数据分组，以进行处理。

7. 发明申请

US20110179314A1 METHOD AND SYSTEM OF ERROR LOGGING 有权
标题翻译：错误记录方法与系统
公开(公告)号：US20110179314A1
公开(公告)日：2011-07-21
申请号：US12691512
申请日：2010-01-21
申请人： Nehal K. PATEL , Andrew C. Walton , Kenneth C. Duisenberg
发明人： Nehal K. PATEL , Andrew C. Walton , Kenneth C. Duisenberg
IPC分类号： G06F11/07
CPC分类号： G06F11/0766 , G06F11/0721 , G06F11/0793
摘要： Method and system of error logging. At least some of the illustrative embodiments are methods including detecting assertion of an error pin by a processor system, (comprising at least a main processor and a chipset, the assertion of the error pin an indication to reboot the processor system) the detecting by a reset circuit, notifying a management processor (distinct from the main processor) that the error pin is asserted (the notifying by the reset circuit), writing to a plurality of registers in the chipset (the writing by the management processor), de-asserting a reset pin of the main processor, and then executing by the main processor an error-handling code to generate an error log.
摘要翻译：错误记录的方法和系统说明性实施例中的至少一些是包括检测处理器系统的错误引脚的断言（包括至少主处理器和芯片组，断言错误引脚的重新引导处理器系统的指示）的方法，复位电路，通知管理处理器（与主处理器不同），错误引脚被断言（由复位电路通知），写入芯片组中的多个寄存器（管理处理器的写入），取消断言主处理器的复位引脚，然后由主处理器执行错误处理代码以生成错误日志。

8. 发明申请

US20090037761A1 Clock Source Control for Modular Computer System 有权
标题翻译：模块化计算机系统的时钟源控制
公开(公告)号：US20090037761A1
公开(公告)日：2009-02-05
申请号：US11832237
申请日：2007-08-01
申请人： Kenneth C. Duisenberg , Joshua Kennon Crechriou , Michael J. Allen , Kenneth N. Konesky
发明人： Kenneth C. Duisenberg , Joshua Kennon Crechriou , Michael J. Allen , Kenneth N. Konesky
IPC分类号： G06F1/04
CPC分类号： G06F1/10
摘要： A computer system provides for connecting consecutively positioned modules to operate collectively as server. Each module calculates a modulo difference between its position and that of a module serving as a clock source; each module selects a clock input as a function of the result of that calculation.
摘要翻译：计算机系统提供连续连续定位的模块以作为服务器共同运行。每个模块计算其位置和作为时钟源的模块的位数之间的模数差; 每个模块根据该计算的结果选择时钟输入。

9. 发明授权

US07281056B1 Assigning a device to a network 有权
标题翻译：将设备分配给网络
公开(公告)号：US07281056B1
公开(公告)日：2007-10-09
申请号：US10163290
申请日：2002-06-04
申请人： John Nolan , Kenneth C. Duisenberg
发明人： John Nolan , Kenneth C. Duisenberg
IPC分类号： G06F15/16
CPC分类号： H04L41/0806 , H04L41/0893 , H04L69/24
摘要： Techniques are provided for assigning a device to a desired network. In one embodiment, the device is connected via a network switch to the network. A value of a configurable parameter corresponds to a data speed that would be used to transfer the data between the device and the network. To assign the device to the network, the value of the parameter corresponding to a desired speed is set in the network circuitry of the device. The network switch, interfaces with the device, detects the speed, and, based on this speed, assigns the device to a corresponding network. Additionally, the switch can assign the data duplex based on a value of a configurable duplex parameter set in the network circuitry.
摘要翻译：提供了将设备分配给所需网络的技术。在一个实施例中，设备经由网络交换机连接到网络。可配置参数的值对应于将用于在设备和网络之间传输数据的数据速度。要将设备分配给网络，在设备的网络电路中设置与所需速度对应的参数值。网络交换机与设备的接口检测速度，并根据此速度将设备分配给相应的网络。此外，交换机可以基于网络电路中设置的可配置双工参数的值来分配数据双工。

10. 发明授权

US08122291B2 Method and system of error logging 有权
标题翻译：错误记录的方法和系统
公开(公告)号：US08122291B2
公开(公告)日：2012-02-21
申请号：US12691512
申请日：2010-01-21
申请人： Nehal K. Patel , Andrew C. Walton , Kenneth C. Duisenberg
发明人： Nehal K. Patel , Andrew C. Walton , Kenneth C. Duisenberg
IPC分类号： G06F11/00
CPC分类号： G06F11/0766 , G06F11/0721 , G06F11/0793
摘要： Method and system of error logging. At least some of the illustrative embodiments are methods including detecting assertion of an error pin by a processor system, (comprising at least a main processor and a chipset, the assertion of the error pin an indication to reboot the processor system) the detecting by a reset circuit, notifying a management processor (distinct from the main processor) that the error pin is asserted (the notifying by the reset circuit), writing to a plurality of registers in the chipset (the writing by the management processor), de-asserting a reset pin of the main processor, and then executing by the main processor an error-handling code to generate an error log.
摘要翻译：错误记录的方法和系统说明性实施例中的至少一些是包括检测处理器系统的错误引脚的断言（包括至少主处理器和芯片组，断言错误引脚的重新引导处理器系统的指示）的方法，复位电路，通知管理处理器（与主处理器不同），错误引脚被断言（由复位电路通知），写入芯片组中的多个寄存器（管理处理器的写入），取消断言主处理器的复位引脚，然后由主处理器执行错误处理代码以生成错误日志。

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