专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20100130004A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20100130004A1
公开(公告)日：2010-05-27
申请号：US12642143
申请日：2009-12-18
申请人： Kenichi Watanabe , Masanobu Ikeda , Takahiro Kimura
发明人： Kenichi Watanabe , Masanobu Ikeda , Takahiro Kimura
IPC分类号： H01L21/768 , G06F17/50
CPC分类号： H01L24/05 , H01L23/53238 , H01L23/53295 , H01L24/03 , H01L24/45 , H01L2224/0401 , H01L2224/04042 , H01L2224/05093 , H01L2224/05096 , H01L2224/05546 , H01L2224/05647 , H01L2224/45124 , H01L2224/48747 , H01L2924/01013 , H01L2924/01014 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/04953 , H01L2924/05042 , H01L2924/13091 , H01L2924/30105 , H01L2924/00014 , H01L2924/00
摘要： In a pad forming region electrically connecting an element forming region to the outside, in which a low dielectric constant insulating film is formed in association with in the element forming region, a Cu film serving as a via formed in the low dielectric constant insulating film in the pad forming region is disposed in higher density than that of a Cu film serving as a via in the element forming region. Hereby, when an internal stress occurs, the stress is prevented from disproportionately concentrating on the via, and deterioration of a function of a wiring caused thereby can be avoided.
摘要翻译：在与元件形成区域相关联地形成有低介电常数绝缘膜的元件形成区域与外部电连接的焊盘形成区域中，形成在低介电常数绝缘膜中的通孔的Cu膜焊盘形成区域以比元件形成区域中的通孔用的Cu膜的密度高的方式设置。因此，当发生内部应力时，防止应力不成比例地集中在通孔上，并且可以避免由此引起的布线的功能的劣化。

2. 发明授权

US08034703B2 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08034703B2
公开(公告)日：2011-10-11
申请号：US12642143
申请日：2009-12-18
申请人： Kenichi Watanabe , Masanobu Ikeda , Takahiro Kimura
发明人： Kenichi Watanabe , Masanobu Ikeda , Takahiro Kimura
IPC分类号： H01L21/44
CPC分类号： H01L24/05 , H01L23/53238 , H01L23/53295 , H01L24/03 , H01L24/45 , H01L2224/0401 , H01L2224/04042 , H01L2224/05093 , H01L2224/05096 , H01L2224/05546 , H01L2224/05647 , H01L2224/45124 , H01L2224/48747 , H01L2924/01013 , H01L2924/01014 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/04953 , H01L2924/05042 , H01L2924/13091 , H01L2924/30105 , H01L2924/00014 , H01L2924/00
摘要： In a pad forming region electrically connecting an element forming region to the outside, in which a low dielectric constant insulating film is formed in association with in the element forming region, a Cu film serving as a via formed in the low dielectric constant insulating film in the pad forming region is disposed in higher density than that of a Cu film serving as a via in the element forming region. Hereby, when an internal stress occurs, the stress is prevented from disproportionately concentrating on the via, and deterioration of a function of a wiring caused thereby can be avoided.
摘要翻译：在与元件形成区域相关联地形成有低介电常数绝缘膜的元件形成区域与外部电连接的焊盘形成区域中，形成在低介电常数绝缘膜中的通孔的Cu膜焊盘形成区域以比元件形成区域中的通孔用的Cu膜的密度高的方式设置。因此，当发生内部应力时，防止应力不成比例地集中在通孔上，并且可以避免由此引起的布线的功能的劣化。

3. 发明授权

US07692315B2 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07692315B2
公开(公告)日：2010-04-06
申请号：US11055652
申请日：2005-02-11
申请人： Kenichi Watanabe , Masanobu Ikeda , Takahiro Kimura
发明人： Kenichi Watanabe , Masanobu Ikeda , Takahiro Kimura
IPC分类号： H01L23/52 , H01L23/48 , H01L29/40
CPC分类号： H01L24/05 , H01L23/53238 , H01L23/53295 , H01L24/03 , H01L24/45 , H01L2224/0401 , H01L2224/04042 , H01L2224/05093 , H01L2224/05096 , H01L2224/05546 , H01L2224/05647 , H01L2224/45124 , H01L2224/48747 , H01L2924/01013 , H01L2924/01014 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/04953 , H01L2924/05042 , H01L2924/13091 , H01L2924/30105 , H01L2924/00014 , H01L2924/00
摘要： In a pad forming region electrically connecting an element forming region to the outside, in which a low dielectric constant insulating film is formed in association with in the element forming region, a Cu film serving as a via formed in the low dielectric constant insulating film in the pad forming region is disposed in higher density than that of a Cu film serving as a via in the element forming region. Hereby, when an internal stress occurs, the stress is prevented from disproportionately concentrating on the via, and deterioration of a function of a wiring caused thereby can be avoided.
摘要翻译：在与元件形成区域相关联地形成有低介电常数绝缘膜的元件形成区域与外部电连接的焊盘形成区域中，形成在低介电常数绝缘膜中的通孔的Cu膜焊盘形成区域以比元件形成区域中的通孔用的Cu膜的密度高的方式设置。因此，当发生内部应力时，防止应力不成比例地集中在通孔上，并且可以避免由此引起的布线的功能的劣化。

4. 发明申请

US20050146041A1 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20050146041A1
公开(公告)日：2005-07-07
申请号：US11055652
申请日：2005-02-11
申请人： Kenichi Watanabe , Masanobu Ikeda , Takahiro Kimura
发明人： Kenichi Watanabe , Masanobu Ikeda , Takahiro Kimura
IPC分类号： H01L23/485 , H01L23/532 , H01L31/119
CPC分类号： H01L24/05 , H01L23/53238 , H01L23/53295 , H01L24/03 , H01L24/45 , H01L2224/0401 , H01L2224/04042 , H01L2224/05093 , H01L2224/05096 , H01L2224/05546 , H01L2224/05647 , H01L2224/45124 , H01L2224/48747 , H01L2924/01013 , H01L2924/01014 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/04953 , H01L2924/05042 , H01L2924/13091 , H01L2924/30105 , H01L2924/00014 , H01L2924/00
摘要： In a pad forming region electrically connecting an element forming region to the outside, in which a low dielectric constant insulating film is formed in association with in the element forming region, a Cu film serving as a via formed in the low dielectric constant insulating film in the pad forming region is disposed in higher density than that of a Cu film serving as a via in the element forming region. Hereby, when an internal stress occurs, the stress is prevented from disproportionately concentrating on the via, and deterioration of a function of a wiring caused thereby can be avoided.
摘要翻译：在与元件形成区域相关联地形成有低介电常数绝缘膜的元件形成区域与外部电连接的焊盘形成区域中，形成在低介电常数绝缘膜中的通孔的Cu膜焊盘形成区域以比元件形成区域中的通孔用的Cu膜的密度高的方式设置。因此，当发生内部应力时，防止应力不成比例地集中在通孔上，并且可以避免由此引起的布线的功能的劣化。

5. 发明授权

US08089162B2 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08089162B2
公开(公告)日：2012-01-03
申请号：US12538410
申请日：2009-08-10
申请人： Kenichi Watanabe , Masanobu Ikeda , Takahiro Kimura
发明人： Kenichi Watanabe , Masanobu Ikeda , Takahiro Kimura
IPC分类号： H01L23/52 , H01L23/48 , H01L29/40
CPC分类号： H01L24/05 , H01L23/53238 , H01L23/53295 , H01L24/03 , H01L24/45 , H01L2224/0401 , H01L2224/04042 , H01L2224/05093 , H01L2224/05096 , H01L2224/05546 , H01L2224/05647 , H01L2224/45124 , H01L2224/48747 , H01L2924/01013 , H01L2924/01014 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/04953 , H01L2924/05042 , H01L2924/13091 , H01L2924/30105 , H01L2924/00014 , H01L2924/00
摘要： In a pad forming region electrically connecting an element forming region to the outside, in which a low dielectric constant insulating film is formed in association with in the element forming region, a Cu film serving as a via formed in the low dielectric constant insulating film in the pad forming region is disposed in higher density than that of a Cu film serving as a via in the element forming region. Hereby, when an internal stress occurs, the stress is prevented from disproportionately concentrating on the via, and deterioration of a function of a wiring caused thereby can be avoided.
摘要翻译：在与元件形成区域相关联地形成有低介电常数绝缘膜的元件形成区域与外部电连接的焊盘形成区域中，形成在低介电常数绝缘膜中的通孔的Cu膜焊盘形成区域以比元件形成区域中的通孔用的Cu膜的密度高的方式设置。因此，当发生内部应力时，防止应力不成比例地集中在通孔上，并且可以避免由此引起的布线的功能的劣化。

6. 发明授权

US07041586B2 Semiconductor device having a multilayer interconnection structure 有权
公开(公告)号：US07041586B2
公开(公告)日：2006-05-09
申请号：US10105190
申请日：2002-03-26
申请人： Hiroshi Kudo , Masanobu Ikeda , Kenichi Watanabe , Yoshiyuki Ohkura
发明人： Hiroshi Kudo , Masanobu Ikeda , Kenichi Watanabe , Yoshiyuki Ohkura
IPC分类号： H01L21/44
CPC分类号： H01L23/5329 , H01L21/76802 , H01L21/76819 , H01L21/7682 , H01L21/76829 , H01L21/76834 , H01L21/76835 , H01L21/76837 , H01L21/7684 , H01L21/76882 , H01L23/5222 , H01L23/53228 , H01L2924/0002 , H01L2924/12044 , H01L2924/00
摘要： A semiconductor device includes a multilayer interconnection structure including an organic interlayer insulation film in which a conductor pattern is formed by a damascene process, wherein the organic interlayer insulation film carries thereon an organic spin-on-glass film.

7. 发明授权

US06417116B2 Semiconductor device having a multilayer interconnection structure 有权
公开(公告)号：US06417116B2
公开(公告)日：2002-07-09
申请号：US09274976
申请日：1999-03-23
申请人： Hiroshi Kudo , Masanobu Ikeda , Kenichi Watanabe , Yoshiyuki Ohkura
发明人： Hiroshi Kudo , Masanobu Ikeda , Kenichi Watanabe , Yoshiyuki Ohkura
IPC分类号： H01L2130
CPC分类号： H01L23/5329 , H01L21/76802 , H01L21/76819 , H01L21/7682 , H01L21/76829 , H01L21/76834 , H01L21/76835 , H01L21/76837 , H01L21/7684 , H01L21/76882 , H01L23/5222 , H01L23/53228 , H01L2924/0002 , H01L2924/12044 , H01L2924/00
摘要： A semiconductor device includes a multilayer interconnection structure including an organic interlayer insulation film in which a conductor pattern is formed by a damascene process, wherein the organic interlayer insulation film carries thereon an organic spin-on-glass film.

8. 发明授权

US09081447B2 Display device with touch detection function, touch detection device, and electronic unit 有权
标题翻译：具有触摸检测功能的显示设备，触摸检测设备和电子单元
公开(公告)号：US09081447B2
公开(公告)日：2015-07-14
申请号：US13211393
申请日：2011-08-17
申请人： Koji Ishizaki , Masanobu Ikeda , Yasuyuki Matsui
发明人： Koji Ishizaki , Masanobu Ikeda , Yasuyuki Matsui
IPC分类号： G06F3/041 , G06F3/045 , G06F3/044 , G02F1/1333
CPC分类号： G06F3/0412 , G02F1/13338 , G06F3/0416 , G06F3/044
摘要： A display device with a touch detection function includes a plurality of touch detection electrodes arranged in parallel to extend in one direction, formed with a predetermined electrode pattern including an electrode portion and aperture portions, and each outputting a detection signal based on a change of an electrostatic capacitance in response to an external proximity object, a plurality of display elements formed in a layer different from a layer provided with the touch detection electrodes, and arranged by a predetermined number in a width direction in a region corresponding to the touch detection electrode, and a plurality of dummy electrodes arranged in an inter-detection-electrode region of the plurality of touch detection electrodes. The aperture portions are provided to allow an arrangement area ratio of the touch detection electrode to be almost equal to an arrangement area ratio of the dummy electrodes in the inter-detection-electrode region.
摘要翻译：具有触摸检测功能的显示装置包括：多个平行布置的触摸检测电极，其在一个方向上延伸，形成有包括电极部分和开口部分的预定电极图案，并且每个输出检测信号基于响应于外部接近物体的静电电容，形成在与设置有触摸检测电极的层不同的层中的多个显示元件，并且在对应于触摸检测电极的区域中以宽度方向布置预定数量，以及布置在多个触摸检测电极的检测间电极区域中的多个虚拟电极。孔径部分被设置成允许触摸检测电极的布置面积比几乎等于检测间电极区域中的虚设电极的布置面积比。

9. 发明授权

US07999259B2 Display device having a photodiode whose p region has an edge width different than that of the n region 有权
标题翻译：显示装置具有p区域的边缘宽度不同于n区域的边缘宽度的光电二极管
公开(公告)号：US07999259B2
公开(公告)日：2011-08-16
申请号：US12331262
申请日：2008-12-09
申请人： Masanobu Ikeda , Ryoichi Ito , Daisuke Takama , Kenta Seki , Natsuki Otani
发明人： Masanobu Ikeda , Ryoichi Ito , Daisuke Takama , Kenta Seki , Natsuki Otani
IPC分类号： H01L31/14
CPC分类号： G02F1/1362 , G02F2001/13312 , G06F3/0412 , H01L27/12
摘要： A display includes: a substrate having a pixel region and a sensor region in which photo-sensor parts are formed; an illuminating section operative to illuminate the substrate from one surface side of the substrate; a thin film photodiode disposed in the sensor region, having at least a P-type semiconductor region and an N-type semiconductor region, and operative to receive light incident from the other surface side of the substrate; and a metallic film formed on the one surface side of the substrate so as to face the thin film photodiode through an insulator film, operative to restrain light generated from the illuminating section from being directly incident on the thin film photodiode from the one surface side, and fixed to a predetermined potential, wherein in the thin film photodiode, the width of the P-type semiconductor region and the width of the N-type semiconductor region are different from each other.
摘要翻译：显示器包括：具有像素区域的基板和形成光电传感器部件的传感器区域; 照明部，用于从所述基板的一个表面侧照射所述基板; 设置在所述传感器区域中的薄膜光电二极管，至少具有P型半导体区域和N型半导体区域，并且可操作以接收从所述衬底的另一表面侧入射的光; 以及金属膜，其形成在基板的一个表面侧上，以便通过绝缘膜面对薄膜光电二极管，其功能是抑制从照明部分产生的光从一个表面侧直接入射到薄膜光电二极管上，并固定在预定电位上，其中在薄膜光电二极管中，P型半导体区域的宽度和N型半导体区域的宽度彼此不同。

10. 发明授权

US07915648B2 Light-receiving element and display device 有权
标题翻译：光接收元件和显示装置
公开(公告)号：US07915648B2
公开(公告)日：2011-03-29
申请号：US12331159
申请日：2008-12-09
申请人： Natsuki Otani , Tsutomu Tanaka , Masafumi Kunii , Masanobu Ikeda , Ryoichi Ito
发明人： Natsuki Otani , Tsutomu Tanaka , Masafumi Kunii , Masanobu Ikeda , Ryoichi Ito
IPC分类号： H01L27/148
CPC分类号： H01L31/153 , G02F2201/58 , H01L27/14632 , H01L31/112
摘要： A light-receiving element includes: a first-conductivity-type semiconductor region configured to be formed over an element formation surface; a second-conductivity-type semiconductor region configured to be formed over the element formation surface; an intermediate semiconductor region configured to be formed over the element formation surface between the first-conductivity-type semiconductor region and the second-conductivity-type semiconductor region, and have an impurity concentration lower than impurity concentrations of the first-conductivity-type semiconductor region and the second-conductivity-type semiconductor region. The light-receiving element further includes: a first electrode configured to be electrically connected to the first-conductivity-type semiconductor region; a second electrode configured to be electrically connected to the second-conductivity-type semiconductor region; and a control electrode configured to be formed in an opposed area that exists on the element formation surface.
摘要翻译：光接收元件包括：第一导电型半导体区域，被配置为形成在元件形成表面上; 构造成形成在所述元件形成表面上的第二导电型半导体区域; 中间半导体区域，被配置为形成在第一导电型半导体区域和第二导电型半导体区域之间的元件形成表面之上，并且具有低于第一导电类型半导体区域的杂质浓度的杂质浓度和第二导电型半导体区域。光接收元件还包括：第一电极，被配置为电连接到第一导电型半导体区域; 第二电极，其被配置为电连接到所述第二导电型半导体区域; 以及控制电极，其被配置为形成在存在于所述元件形成表面上的相对区域中。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式