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1. 发明授权

US5847571A Membrane probing of circuits 失效
标题翻译：电路膜探测
公开(公告)号：US5847571A
公开(公告)日：1998-12-08
申请号：US675416
申请日：1996-07-03
申请人： Ken Kuang-Fu Liu , Byoung-Youl Min , Kunio Sano , Takashi Sato
发明人： Ken Kuang-Fu Liu , Byoung-Youl Min , Kunio Sano , Takashi Sato
IPC分类号： G01R1/073 , H01L21/66
CPC分类号： G01R1/0735
摘要： First and second bumps electrically connected at first and second positions along a conductive run borne by a flexible substrate are respectively oriented for contact with a pad of a die under test and a pad of a tester. A probe frame is bonded to the substrate between connector frames bonded at opposite ends of the substrate. Alternatively, a pair of bumps exposed on the same surface of a flexible substrate are electrically connected at different positions along a conductive run. One of the bumps is oriented for contact with a pad of a die under test, and the other is in contact with a pad on a surface of a printed circuit board directed away from the die. The pad of the printed circuit board is provided for electrical connection to a tester.
摘要翻译：沿着沿着由柔性基板传导的导体的第一和第二位置电连接的第一和第二凸起分别被定向成与被测试模具的焊盘和测试仪的焊盘接触。探针架结合在衬底的相对两端的连接器框架之间的基片上。或者，暴露在柔性基板的相同表面上的一对凸块在导电性行程的不同位置电连接。凸块中的一个被定向成与待测试的模具的焊盘接触，另一个与印刷电路板的远离模具的表面上的焊盘接触。印刷电路板的焊盘被提供用于电连接到测试仪。

2. 发明授权

US6084419A Method and apparatus for inspecting semiconductor integrated circuits, and contactor incorporated in the apparatus 失效
标题翻译：用于检查半导体集成电路的方法和装置以及包含在该装置中的接触器
公开(公告)号：US6084419A
公开(公告)日：2000-07-04
申请号：US28091
申请日：1998-02-23
申请人： Takashi Sato , Kunio Sano
发明人： Takashi Sato , Kunio Sano
IPC分类号： G01R31/28 , G01R31/02 , G01R1/04 , G01R31/302
CPC分类号： G01R31/2886
摘要： A wafer inspecting apparatus inspects the electric characteristics of IC chips of a wafer W. The inspection is carried out by simultaneously examining the inspecting electrodes of all IC chips in a contact manner in the state where the wafer W is held on the main chuck. The wafer inspecting apparatus is provided with a contactor, and this contactor is made up of a first contactor, a second contactor and a driving mechanism. The first contactor has a large number of contact projections on the lower surface thereof and a large number of contact electrodes on the entire upper surface thereof. The contact projections are brought into simultaneous contact with the inspecting electrodes. The contact electrodes are electrically connected to the contact projections, respectively. The second contactor has a number of contact elements, such as pogo-pins, which are brought into contact with the contact electrodes of the first contactor. The second contactor is movable, and the driving mechanism moves this second contactor in the X- and Y-directions in such a manner that the contact elements and the contact electrodes are sequentially brought into contact with each other. The contactor may include a third contactor as well. The third contactor is arranged between the first contactor and the wafer W.
摘要翻译：晶片检查装置检查晶片W的IC芯片的电特性。通过在将晶片W保持在主卡盘上的状态下以接触方式同时检查所有IC芯片的检查电极来进行检查。晶片检查装置设有接触器，该接触器由第一接触器，第二接触器和驱动机构构成。第一接触器在其下表面上具有大量接触突起，并且在其整个上表面上具有大量的接触电极。接触突起与检查电极同时接触。接触电极分别与接触突起电连接。第二接触器具有与第一接触器的接触电极接触的多个接触元件，例如弹簧销。第二接触器是可移动的，并且驱动机构使得第二接触器在X方向和Y方向上移动，使得接触元件和接触电极相互接触。接触器也可以包括第三接触器。第三接触器布置在第一接触器和晶片W之间。

3. 发明授权

US5665610A Semiconductor device checking method 失效
标题翻译：半导体器件检查方法
公开(公告)号：US5665610A
公开(公告)日：1997-09-09
申请号：US650486
申请日：1996-05-17
申请人： Yoshiro Nakata , Shinichi Oki , Koichi Nagao , Kenzo Hatada , Shigeoki Mori , Takashi Sato , Kunio Sano
发明人： Yoshiro Nakata , Shinichi Oki , Koichi Nagao , Kenzo Hatada , Shigeoki Mori , Takashi Sato , Kunio Sano
IPC分类号： G01R31/28 , H01L21/66
CPC分类号： G01R31/2884 , G01R31/2831
摘要： A plated layer made of a metal which is hard to oxidize is formed on the surface of a check electrode of a semiconductor chip which is formed on a semiconductor wafer. A bump of a contactor is caused to come in contact with the check electrode on which the plated layer is formed in the direction perpendicular to the semiconductor chip. Then, a voltage is applied to the bump of the contactor to make a check such as burn-in on the semiconductor chip in a lump.
摘要翻译：在形成在半导体晶片上的半导体芯片的检查电极的表面上形成由难以氧化的金属制成的镀层。使接触器的凸起与垂直于半导体芯片的方向上形成有镀层的检查电极接触。然后，向接触器的凸起施加电压，以一次性地对半导体芯片进行诸如老化的检查。

4. 发明授权

US5999268A Apparatus for aligning a semiconductor wafer with an inspection contactor 失效
标题翻译：用于使半导体晶片与检查接触器对准的装置
公开(公告)号：US5999268A
公开(公告)日：1999-12-07
申请号：US950832
申请日：1997-10-15
申请人： Toshihiro Yonezawa , Kunio Sano , Takashi Sato
发明人： Toshihiro Yonezawa , Kunio Sano , Takashi Sato
IPC分类号： G01R31/28 , G01B11/00 , G01R31/02
CPC分类号： G01R31/2887
摘要： An aligning apparatus includes a first image pickup camera for picking up an image of an inspection contactor, a moving body located so as to be movable in X-, Y-, Z- and .theta.-directions and having the first image pickup camera fixed thereon, a wafer bearer capable of being located on the moving body and supporting a semiconductor wafer, a control circuit for controlling movements of the moving body moved in the individual directions, and a second image pickup camera for picking up an image of the semiconductor wafer on the bearer moving under the control of the control circuit. Positions for the first and second image pickup cameras to pick up the images are stored, the first image pickup camera picks up an image of the contact, the position of the contact is stored, the second image pickup camera picks up an image of an electrode of a chip corresponding to the contact, the position of the electrode is stored, and then the contact and the electrode are aligned with each other in accordance with the respective positions of the contact and the electrode.
摘要翻译：对准装置包括用于拾取检查接触器的图像的第一图像拾取相机，位于X，Y，Z和Y方向上可移动并且第一图像拾取相机固定在其上的移动体，能够位于移动体上并支撑半导体晶片的晶片载体，用于控制沿各个方向移动的移动体的运动的控制电路和用于拾取半导体晶片的图像的第二图像拾取相机承载在控制电路的控制下移动。存储用于拾取图像的第一和第二图像拾取相机的位置，第一图像拾取相机拾取接触的图像，存储接触的位置，第二图像拾取相机拾取电极的图像与电极对应的芯片，存储电极的位置，然后根据触点和电极的相应位置使触点和电极彼此对准。

5. 发明申请

US20090215247A1 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件的制造方法
公开(公告)号：US20090215247A1
公开(公告)日：2009-08-27
申请号：US12434637
申请日：2009-05-02
申请人： Takashi Sato , Junichi Takano , Takashi Sato , Tokuo Naitou
发明人： Takashi Sato , Junichi Takano , Takashi Sato , Tokuo Naitou
IPC分类号： H01L21/304
CPC分类号： H01L21/67092 , H01L21/78 , H01L2224/06181 , H01L2224/32245 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2924/181 , H01L2924/00012 , H01L2924/00
摘要： Illumination devices (7a) and (7b) which irradiate light having a wavelength of 1.1 μm or less are arranged on a front surface and a rear surface of a cover (8) of a dicing device (1). After a wafer is placed on a dicing stage (3), when the wafer is diced by a blade (4a) attached to a spindle (5), light is irradiated on an entire surface of an upper surface (element forming surface) of the wafer by the illumination devices (7a) and (7b). At this time, an illuminance of light on the wafer is set at 70 lux or more and 2000 lux or less. By this means, during a dicing operation, an area to be a light-shielded area by the spindle (5) or the like is not present on the wafer.
摘要翻译：在扫描装置（1）的盖（8）的前表面和后表面上布置照射波长为1.1μm以下的光的照明装置（7a）和（7b）。在将晶片放置在切割台（3）上之后，当通过安装在主轴（5）上的刀片（4a）切割晶片时，将光照射在上表面（元件形成表面）的整个表面上晶片通过照明装置（7a）和（7b）。此时，晶片上的光的照度设定为70勒克司以上且2000lux以下。通过这种方式，在切割操作期间，晶片上不存在由主轴（5）等构成遮光区域的区域。

6. 发明授权

US07998793B2 Light illumination during wafer dicing to prevent aluminum corrosion 有权
标题翻译：晶圆切割时的光照，防止铝腐蚀
公开(公告)号：US07998793B2
公开(公告)日：2011-08-16
申请号：US12434637
申请日：2009-05-02
申请人： Takashi Sato , Junichi Takano , Takashi Sato , Tokuo Naitou
发明人： Takashi Sato , Junichi Takano , Takashi Sato , Tokuo Naitou
IPC分类号： H01L21/00
CPC分类号： H01L21/67092 , H01L21/78 , H01L2224/06181 , H01L2224/32245 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2924/181 , H01L2924/00012 , H01L2924/00
摘要： Illumination devices (7a) and (7b) which irradiate light having a wavelength of 1.1 μm or less are arranged on a front surface and a rear surface of a cover (8) of a dicing device (1). After a wafer is placed on a dicing stage (3), when the wafer is diced by a blade (4a) attached to a spindle (5), light is irradiated on an entire surface of an upper surface (element forming surface) of the wafer by the illumination devices (7a) and (7b). At this time, an illuminance of light on the wafer is set at 70 lux or more and 2000 lux or less. By this means, during a dicing operation, an area to be a light-shielded area by the spindle (5) or the like is not present on the wafer.
摘要翻译：在切割装置（1）的盖（8）的前表面和后表面上布置照射波长为1.1μm以下的光的照明装置（7a）和（7b）。在将晶片放置在切割台（3）上之后，当通过安装在主轴（5）上的刀片（4a）切割晶片时，将光照射在上表面（元件形成表面）的整个表面上晶片通过照明装置（7a）和（7b）。此时，晶片上的光的照度设定为70勒克司以上且2000lux以下。通过这种方式，在切割操作期间，晶片上不存在由主轴（5）等构成遮光区域的区域。

7. 发明申请

US20080138962A1 Manufacturing Method of Semiconductor Device 审中-公开
标题翻译：半导体器件的制造方法
公开(公告)号：US20080138962A1
公开(公告)日：2008-06-12
申请号：US11632993
申请日：2004-07-22
申请人： Takashi Sato , Junichi Takano , Takashi Sato , Tokuo Naitou
发明人： Takashi Sato , Junichi Takano , Takashi Sato , Tokuo Naitou
IPC分类号： H01L21/304
CPC分类号： H01L21/67092 , H01L21/78 , H01L2224/06181 , H01L2224/32245 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2924/181 , H01L2924/00012 , H01L2924/00
摘要： Illumination devices (7a) and (7b) which irradiate light having a wavelength of 1.1 μm or less are arranged on a front surface and a rear surface of a cover (8) of a dicing device (1). After a wafer is placed on a dicing stage (3), when the wafer is diced by a blade (4a) attached to a spindle (5), light is irradiated on an entire surface of an upper surface (element forming surface) of the wafer by the illumination devices (7a) and (7b). At this time, an illuminance of light on the wafer is set at 70 lux or more and 2000 lux or less. By this means, during a dicing operation, an area to be a light-shielded area by the spindle (5) or the like is not present on the wafer.
摘要翻译：在切割装置（1）的盖（8）的前表面和后表面上布置照射具有1.1μm或更小的波长的光的照明装置（7a）和（7b）。在将晶片放置在切割台（3）上之后，当通过安装在主轴（5）上的刀片（4a）切割晶片时，将光照射在上表面（元件形成表面）的整个表面上通过照明装置（7a）和（7b）的晶片。此时，晶片上的光的照度设定为70勒克司以上且2000lux以下。通过这种方式，在切割操作期间，晶片上不存在由主轴（5）等构成遮光区域的区域。

8. 发明授权

US10026968B2 Method for producing fuel cell electrode catalyst 有权
公开(公告)号：US10026968B2
公开(公告)日：2018-07-17
申请号：US14000569
申请日：2012-01-04
申请人： Masaki Horikita , Kunchan Lee , Yasuaki Wakizaka , Takashi Sato
发明人： Masaki Horikita , Kunchan Lee , Yasuaki Wakizaka , Takashi Sato
IPC分类号： H01M4/88 , H01M4/90 , H01M8/1018
CPC分类号： H01M4/8882 , H01M4/8825 , H01M4/9008 , H01M4/9016 , H01M4/9083 , H01M2008/1095
摘要： A method for producing a fuel cell electrode catalyst, including a step (I) of bringing an aqueous solution of a transition metal compound (1) into contact with ammonia and/or ammonia water to generate a precipitate (A) containing an atom of the transition metal, a step (II) of mixing at least the precipitate (A), an organic compound (B), and a liquid medium (C) to obtain a catalyst precursor liquid, and a step (IV) of subjecting the solid in the catalyst precursor liquid to heat treatment at a temperature of 500 to 1200° C. to obtain an electrode catalyst; a portion or the entirety of the transition metal compound (1) being a compound containing a transition metal element of group 4 or group 5 of the periodic table; and the organic compound (B) being at least one selected from sugars and the like.

9. 发明授权

US09818495B2 Containment vessel and nuclear power plant 有权
公开(公告)号：US09818495B2
公开(公告)日：2017-11-14
申请号：US13988966
申请日：2011-09-14
申请人： Takashi Sato
发明人： Takashi Sato
IPC分类号： G21C13/10 , G21C13/00 , G21C9/004 , G21C9/008 , G21C9/06 , G21C15/18 , G21F9/02
CPC分类号： G21C13/00 , G21C9/004 , G21C9/008 , G21C9/06 , G21C13/10 , G21C15/18 , G21F9/02 , Y02E30/40
摘要： A containment vessel has an inner shell covering a reactor pressure vessel and an outer shell forming an outer well which is a gas-tight space covering the horizontal outer periphery of the inner shell. The inner shell has a first cylindrical side wall surrounding the horizontal periphery of the reactor pressure vessel, a containment vessel head which covers the upper part of the reactor pressure vessel, and a first top slab connecting in a gas-tight manner the periphery of the containment vessel head and the upper end of the first cylindrical side wall. The outer shell has a second cylindrical side wall surrounding the outer periphery of the first cylindrical side wall, and also has a second to slab connecting in a gas-tight manner the vicinity of the upper end of the second cylindrical side wall and the first cylindrical side wall.

10. 发明授权

US09653994B2 Power supply circuit and apparatus including the circuit 有权
公开(公告)号：US09653994B2
公开(公告)日：2017-05-16
申请号：US13215035
申请日：2011-08-22
申请人： Katsumi Taguchi , Takashi Sato
发明人： Katsumi Taguchi , Takashi Sato
IPC分类号： G01R31/00 , H02M3/158 , H02M1/36
CPC分类号： H02M3/158 , H02M1/36
摘要： A power supply device supplying power to a device via a power line is provided, where the power supply device includes a first voltage generation unit configured to generate and supply a first direct voltage to the power line, a second voltage generation unit configured to generate and supply a second direct voltage lower than the first direct voltage to the power line, a measurement unit configured to measure a voltage of the power line, a control unit configured to control supply of the first direct voltage with the first voltage generation unit after starting supply of the second direct voltage with the second voltage generation unit, and a determination unit configured to determine a state of the power supply device based on the measured voltage and a first threshold value after starting the supply of the second direct voltage.

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