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    • 9. 发明申请
    • BIAS CIRCUIT AND CONTROL METHOD FOR BIAS CIRCUIT
    • 偏置电路的偏置电路和控制方法
    • US20100207692A1
    • 2010-08-19
    • US12770841
    • 2010-04-30
    • Tomoyuki AraiMasahiro Kudo
    • Tomoyuki AraiMasahiro Kudo
    • H03F3/16
    • H03F1/223H03F1/301H03F2200/108H03F2200/18H03F2200/456
    • A bias circuit for applying a bias voltage to a nonlinear amplification circuit, including a constant-current source; and a first, second, third, and fourth transistors, wherein a current mirror circuit is configured by the first transistor and the second transistor, and the bias voltage is outputted from the drain of the second transistor, gate lengths and gate widths of the first and second transistor are the same, gate lengths of the first to fourth transistor are the same, and gate lengths and gate widths of the first, second, third, and fourth transistor are configured so that k4−0.5−k3−0.5 is approximately 1, where k3 stands for a ratio of a gate width of the third transistor to the gate width of the first transistor and k4 stands for a ratio of a gate width of the fourth transistor to the gate width of the first transistor.
    • 一种用于向包括恒流源的非线性放大电路施加偏置电压的偏置电路; 以及第一晶体管,第二晶体管,第三晶体管和第四晶体管,其中电流镜电路由第一晶体管和第二晶体管构成,偏置电压从第二晶体管的漏极输出,第一晶体管的栅极长度和栅极宽度 和第二晶体管相同,第一至第四晶体管的栅极长度相同,并且第一,第二,第三和第四晶体管的栅极长度和栅极宽度被配置为使得k4-0.5-k3-0.5大约为1 其中k3表示第三晶体管的栅极宽度与第一晶体管的栅极宽度的比值,k4表示第四晶体管的栅极宽度与第一晶体管的栅极宽度的比值。
    • 10. 发明授权
    • Orthogonal signal output circuit
    • 正交信号输出电路
    • US07667523B2
    • 2010-02-23
    • US12404446
    • 2009-03-16
    • Kazuaki OishiNobuhiko KobayashiMasahiro Kudo
    • Kazuaki OishiNobuhiko KobayashiMasahiro Kudo
    • G06F7/12
    • G06G7/14H03D3/009H03D7/14H03D2200/0082
    • An orthogonal signal output circuit having an error correction function for correcting an orthogonal error, including: first and second differential circuits; and first to fourth variable resistors, wherein the first variable resistor is connected to a positive output of the first differential circuit and a positive output of the second differential circuit; the second variable resistor is connected to the positive output of the first differential circuit and a negative output of the second differential circuit; the third variable resistor is connected to a negative output of the first differential circuit and the positive output of the second differential circuit; and the fourth variable resistor is connected to the negative output of the first differential circuit and the negative output of the second differential circuit.
    • 一种具有用于校正正交误差的纠错功能的正交信号输出电路,包括:第一和第二差分电路; 和第一至第四可变电阻器,其中第一可变电阻器连接到第一差分电路的正输出端和第二差分电路的正输出端; 第二可变电阻器连接到第一差分电路的正输出端和第二差分电路的负输出端; 第三可变电阻器连接到第一差分电路的负输出端和第二差分电路的正输出端; 并且第四可变电阻器连接到第一差分电路的负输出端和第二差分电路的负输出端。