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    • 1. 发明授权
    • Composite storage circuit and semiconductor device having the same
    • 复合存储电路及具有相同的半导体器件
    • US07385845B2
    • 2008-06-10
    • US10503442
    • 2003-02-07
    • Katsutoshi MoriyamaHironobu MoriHisanobu Tsukazaki
    • Katsutoshi MoriyamaHironobu MoriHisanobu Tsukazaki
    • G11C16/04
    • G11C11/005G11C14/00
    • The object of the present invention is to provide a composite storage circuit capable of executing a writing operation and reading operation at high speed, and as the result of that, a semiconductor apparatus capable of realizing an instant-on function and an instant-off function is provided. The composite storage circuit is constituted of a volatile storage circuit and a non-volatile storage circuit connected in parallel, and the same information as storage information in the volatile storage circuit is stored in the non-volatile storage circuit. Moreover, as a power supply to the volatile storage circuit decreases, storage information in the volatile storage circuit is written in the non-volatile storage circuit. Further, after a power failure or a decreased power supply, storage information from the non-volatile storage circuit is returned to the volatile storage circuit upon restarting power feeding. Further, a semiconductor apparatus is constituted by having the composite storage circuit described above.
    • 本发明的目的是提供一种能够高速执行写入操作和读取操作的复合存储电路,其结果是能够实现瞬时启动功能和瞬时功能的半导体装置 被提供。 复合存储电路由并联连接的易失性存储电路和非易失性存储电路构成,并且与易失性存储电路中的存储信息相同的信息存储在非易失性存储电路中。 此外,随着向易失性存储电路的电源减少,易失性存储电路中的存储信息被写入非易失性存储电路中。 此外,在电源故障或电力供应减少之后,在重新启动供电时,来自非易失性存储电路的存储信息返回到易失性存储电路。 此外,通过具有上述复合存储电路构成半导体装置。
    • 2. 发明授权
    • Power saving data storage circuit, data writing method in the same, and data storage device
    • 省电数据存储电路,数据写入方法和数据存储装置
    • US07376801B2
    • 2008-05-20
    • US10505431
    • 2003-03-17
    • Katsutoshi MoriyamaHironobu MoriHisanobu Tsukazaki
    • Katsutoshi MoriyamaHironobu MoriHisanobu Tsukazaki
    • G06F12/00
    • G11C7/02G11C7/1006G11C7/1078G11C7/22G11C2207/2263
    • It is an object to provide, in a data storage circuit for storing data, a power saving data storage circuit and a data writing method in the data storage circuit, and, further, to provide a data storage device. Thus, in the present invention, reading out existing data stored in a storage element M is performed prior to performing writing of new data to the storage element M to compare the existing data and the new data. The data storage circuit is configured so that in a case where the existing data and the new data are identical with each other, writing to the storage element M is not performed, and, in a case where the existing data and the new data are not identical with each other, writing of the new data to the storage element M is performed. The data storage circuit is formed on a semiconductor substrate to have a data storage device.
    • 本发明的目的是在数据存储电路中的用于存储数据的数据存储电路中提供省电数据存储电路和数据写入方法,并且提供数据存储装置。 因此,在本发明中,在存储元件M执行写入新数据之前,先读出存储在存储元件M中的现有数据,对现有数据和新数据进行比较。 数据存储电路被配置为使得在现有数据和新数据彼此相同的情况下,不执行对存储元件M的写入,并且在现有数据和新数据不是的情况下 彼此相同,执行将新数据写入存储元件M。 数据存储电路形成在半导体衬底上以具有数据存储装置。
    • 4. 发明申请
    • Composite storage circuit and semiconductor device having the same
    • 复合存储电路及具有相同的半导体器件
    • US20050077543A1
    • 2005-04-14
    • US10503442
    • 2003-02-07
    • Katsutoshi MoriyamaHironoeu MoriHisanobu Tsukazaki
    • Katsutoshi MoriyamaHironoeu MoriHisanobu Tsukazaki
    • G11C11/41G11C11/00G11C14/00H01L29/739
    • G11C11/005G11C14/00
    • The object of the present invention is to provide a composite storage circuit capable of executing a writing operation and reading operation at high speed, and as the result of that, a semiconductor apparatus capable of realizing an instant-on function and an instant-off function is provided. The composite storage circuit is constituted of a volatile storage circuit and a non-volatile storage circuit connected in parallel, and the same information as storage information in the volatile storage circuit is stored in the non-volatile storage circuit. Moreover, as a power supply to the volatile storage circuit decreases, storage information in the volatile storage circuit is written in the non-volatile storage circuit. Further, after a power failure or a decreased power supply, storage information from the non-volatile storage circuit is returned to the volatile storage circuit upon restarting power feeding. Further, a semiconductor apparatus is constituted by having the composite storage circuit described above.
    • 本发明的目的是提供一种能够高速执行写入操作和读取操作的复合存储电路,其结果是能够实现瞬时启动功能和瞬时功能的半导体装置 被提供。 复合存储电路由并联连接的易失性存储电路和非易失性存储电路构成,并且与易失性存储电路中的存储信息相同的信息存储在非易失性存储电路中。 此外,随着向易失性存储电路的电源减少,易失性存储电路中的存储信息被写入非易失性存储电路中。 此外,在电源故障或电力供应减少之后,在重新启动供电时,来自非易失性存储电路的存储信息返回到易失性存储电路。 此外,通过具有上述复合存储电路构成半导体装置。
    • 5. 发明授权
    • Video signal processing circuit
    • 视频信号处理电路
    • US5041904A
    • 1991-08-20
    • US327594
    • 1989-03-23
    • Shigemitsu HiguchiHisanobu TsukazakiMotohiro Sasaki
    • Shigemitsu HiguchiHisanobu TsukazakiMotohiro Sasaki
    • H04N9/77H04N9/78
    • H04N9/78Y10S348/91
    • In a digital video signal processing circuit where digital composite video signals are inputted and processed in separation into a luminance signal and a chrominance signal, the digital video signal processing circuit is provided with a device for separating a first frequency component including a luminance signal in a relatively low region from the digital composite video signals, a device for separating a second frequency component including a luminance signal in the vicinity of a color subcarrier and a chrominance signal, a line comb-shaped filter for separating the second frequency component into the luminance signal in the vicinity of the color subcarrier and the chroninance signal, an adding device for adding the first frequency component and the luminance signal in the vicinity of the color subcarrier, a phase inversion device for inverting the phase of the chrominance signal, and an adding device for adding the chrominance signal in phase inversion to the first frequency component or the luminance signal in the vicinity of the color subcarrier, so that the picture quality of the reproduction image can be improved.
    • 在将数字复合视频信号分离输入并分离成亮度信号和色度信号的数字视频信号处理电路中,数字视频信号处理电路设置有用于分离包含亮度信号中的亮度信号的第一频率分量的装置 来自数字复合视频信号的相对低的区域,用于分离包括彩色副载波附近的亮度信号的第二频率分量和色度信号的装置,用于将第二频率分量分离成亮度信号的线梳状滤波器 在彩色副载波附近和高频信号附近,添加装置,用于将彩色副载波附近的第一频率分量和亮度信号相加,用于反相色度信号的相位的相位反转装置和加法装置 用于将相位反相中的色度信号添加到第一频率分量 或彩色副载波附近的亮度信号,从而可以提高再现图像的图像质量。
    • 6. 发明授权
    • Word line voltage supply circuit
    • 字线电源电路
    • US6078531A
    • 2000-06-20
    • US232696
    • 1999-01-19
    • Yoshifumi MiyazimaPatrick ChuangHisanobu Tsukazaki
    • Yoshifumi MiyazimaPatrick ChuangHisanobu Tsukazaki
    • G11C11/413G11C5/14G11C8/08G11C11/417G11C7/00
    • G11C5/145G11C11/417G11C8/08
    • An address transition detector (ATD) detects a change of address and generates a pulse signal Sc. A control circuit generates a pulse signal Sd and outputs it to a booster circuit in response to a timing of completion of the signal Sc. The booster circuit generates a boosted voltage higher in level than a power supply voltage during an active period of the signal Sd and outputs it to a decoder. The decoder holds the control gate of the output transistor connected to the word line selected in response to the address at a first voltage level, then inputs the boosted voltage to one of the source and drain electrodes so as to hold the gate at a second voltage level higher than the first voltage level by exactly the boosted voltage using capacitive coupling between the control gate and the one of the source and drain electrodes, whereby it outputs a boosted voltage to the other of the drain and source electrodes and drives the word line connected to the other of the drain and source electrodes. Since a boosted voltage higher than the power supply voltage is supplied to the selected word line, the write operation can be carried out reliably and deterioration of the data holding characteristic of the memory cell due to the reduction of the power supply voltage can be prevented.
    • 地址转换检测器(ATD)检测地址变化并产生脉冲信号Sc。 控制电路产生脉冲信号Sd,并响应于信号Sc的完成定时将其输出到升压电路。 升压电路在信号Sd的有效周期内产生比电源电压高的电压,并将其输出到解码器。 解码器保持连接到响应于第一电压电平的地址所选择的字线的输出晶体管的控制栅极,然后将升压电压输入到源极和漏极之一,以将栅极保持在第二电压 电平高于第一电压电平,利用控制栅极与源极和漏极之间的电容耦合的升压电压,从而将升压电压输出到漏极和源极中的另一个并驱动连接的字线 到另一个漏极和源极。 由于将高于电源电压的升压电压提供给所选择的字线,所以可以可靠地进行写入操作,并且可以防止由于电源电压的降低导致的存储单元的数据保持特性的劣化。