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1. 发明申请

US20090160054A1 NITRIDE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：氮化物半导体器件及其制造方法
公开(公告)号：US20090160054A1
公开(公告)日：2009-06-25
申请号：US12269914
申请日：2008-11-13
申请人： Katsuomi Shiozawa , Kyozo Kanamoto , Toshiyuki Oishi , Yoichiro Tarui , Yasunori Tokuda
发明人： Katsuomi Shiozawa , Kyozo Kanamoto , Toshiyuki Oishi , Yoichiro Tarui , Yasunori Tokuda
IPC分类号： H01L21/283 , H01L29/45
CPC分类号： H01S5/0425 , B82Y20/00 , H01S5/32341 , H01S5/34333
摘要： A nitride semiconductor device is provided which reduces the contact resistance at the interface between a P-type electrode and a nitride semiconductor layer. A nitride semiconductor device includes a P-type nitride semiconductor layer and a P-type electrode formed on the P-type nitride semiconductor layer. The P-type electrode is formed by successive laminations of a metal layer of a metal having a work function of 5.1 eV or more, a Pd layer of palladium, and a Ta layer of tantalum on the P-type nitride semiconductor layer.
摘要翻译：提供一种降低P型电极和氮化物半导体层之间的界面处的接触电阻的氮化物半导体器件。氮化物半导体器件包括P型氮化物半导体层和形成在P型氮化物半导体层上的P型电极。 P型电极通过在P型氮化物半导体层上连续层叠功函数为5.1eV以上的金属的金属层，钯的Pd层和Ta的钽层而形成。

2. 发明申请

US20090140389A1 NITRIDE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：氮化物半导体器件及其制造方法
公开(公告)号：US20090140389A1
公开(公告)日：2009-06-04
申请号：US12268509
申请日：2008-11-11
申请人： Katsuomi Shiozawa , Kyozo Kanamoto , Toshiyuki Oishi , Hiroshi Kurokawa , Kenichi Ohtsuka , Yoichiro Tarui , Yasunori Tokuda
发明人： Katsuomi Shiozawa , Kyozo Kanamoto , Toshiyuki Oishi , Hiroshi Kurokawa , Kenichi Ohtsuka , Yoichiro Tarui , Yasunori Tokuda
IPC分类号： H01L29/20 , H01L21/20
CPC分类号： H01L33/40 , H01L33/32 , H01L2924/0002 , H01S5/0425 , H01S5/22 , H01S5/32341 , H01L2924/00
摘要： A nitride semiconductor device with a p electrode having no resistance between itself and other electrodes, and a method of manufacturing the same are provided. A p electrode is formed of a first Pd film, a Ta film, and a second Pd film, which is an antioxidant film for preventing oxidation of the Ta film, and on a p-type contact layer of a nitride semiconductor. On the second Pd film, a pad electrode is formed. The second Pd film as an antioxidant film is formed on the entire upper surface of the Ta film which forms the p electrode, to prevent oxidation of the Ta film. This inhibits the resistance between the p electrode and the pad electrode, thereby preventing a failure in contact between the p electrode and the pad electrode and providing the low-resistance p electrode.
摘要翻译：提供一种具有在其自身与其他电极之间不具有电阻的p电极的氮化物半导体器件及其制造方法。 p电极由作为防止氧化Ta膜的抗氧化剂膜和氮化物半导体的p型接触层的第一Pd膜，Ta膜和第二Pd膜形成。在第二Pd膜上形成焊盘电极。作为抗氧化剂膜的第二Pd膜形成在形成p电极的Ta膜的整个上表面上，以防止Ta膜的氧化。这抑制了p电极和焊盘电极之间的电阻，从而防止p电极和焊盘电极之间的接触不良，并提供低电阻p电极。

3. 发明授权

US07678597B2 Method of manufacturing semiconductor device including gallium-nitride semiconductor structure and a palladium contact 有权
标题翻译：制造包括氮化镓半导体结构和钯接触的半导体器件的方法
公开(公告)号：US07678597B2
公开(公告)日：2010-03-16
申请号：US12323634
申请日：2008-11-26
申请人： Kenichi Ohtsuka , Yoichiro Tarui , Yosuke Suzuki , Katsuomi Shiozawa , Kyozo Kanamoto , Toshiyuki Oishi , Yasunori Tokuda , Tatsuo Omori
发明人： Kenichi Ohtsuka , Yoichiro Tarui , Yosuke Suzuki , Katsuomi Shiozawa , Kyozo Kanamoto , Toshiyuki Oishi , Yasunori Tokuda , Tatsuo Omori
IPC分类号： H01L21/00 , H01L21/28 , H01L21/3205
CPC分类号： H01S5/34333 , B82Y20/00 , H01L33/325 , H01L33/40 , H01S5/0421 , H01S5/0425 , H01S5/22 , H01S5/2214 , H01S5/3063
摘要： A method of manufacturing a semiconductor device provides a semiconductor device with a gallium-nitride-based semiconductor structure that allows long-term stable operation without degradation in device performance. After formation of an insulation film on a surface other than on a ridge surface, an oxygen-containing gas such as O2, O3, NO, N2O, or NO2 is supplied to oxidize a p-type GaN contact layer from the surface and to thereby form an oxide film on the surface of the p-type GaN contact layer. Then, a p-type electrode that establishes contact with the p-type GaN contact layer is formed by evaporation or sputtering on the oxide film and on the insulation film. Heat treatment is subsequently performed at temperatures between 400 and 700° C. in an atmosphere containing a nitrogen-containing gas such as N2 or NH3 or an inert gas such as Ar or He.
摘要翻译：半导体器件的制造方法为半导体器件提供了氮化镓基半导体结构，其允许长期稳定的操作而不会降低器件性能。在表面以外的表面上形成绝缘膜之后，供给诸如O 2，O 3，NO，N 2 O或NO 2的含氧气体以从表面氧化p型GaN接触层，由此在p型GaN接触层的表面上形成氧化膜。然后，通过在氧化物膜和绝缘膜上的蒸发或溅射形成与p型GaN接触层建立接触的p型电极。随后在含有含氮气体如N 2或NH 3或惰性气体例如Ar或He的气氛中，在400-700℃的温度下进行热处理。

4. 发明申请

US20090170304A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：US20090170304A1
公开(公告)日：2009-07-02
申请号：US12337878
申请日：2008-12-18
申请人： Yoichiro Tarui , Kenichi Ohtsuka , Yosuke Suzuki , Katsuomi Shiozawa , Kyozo Kanamoto , Toshiyuki Oishi , Yasunori Tokuda , Tatsuo Omori
发明人： Yoichiro Tarui , Kenichi Ohtsuka , Yosuke Suzuki , Katsuomi Shiozawa , Kyozo Kanamoto , Toshiyuki Oishi , Yasunori Tokuda , Tatsuo Omori
IPC分类号： H01L21/441
CPC分类号： H01L21/28575 , H01L29/2003 , H01L33/0095 , H01L33/32 , H01L33/40
摘要： A method of manufacturing a semiconductor device is provided, which can reduce the contact resistance of an ohmic electrode to a p-type nitride semiconductor layer and can achieve long-term stable operation. In forming, in an electrode forming step, a p-type ohmic electrode of a metal film by successive lamination of a Pd film which is a first p-type ohmic electrode and a Ta film which is a second p-type ohmic electrode on a p-type GaN contact layer, the metal film is formed to include an oxygen atom. In the presence of an oxygen atom in the metal film, then in a heat-treatment step, the p-type ohmic electrode of the metal film is heat-treated in an atmosphere that contains no oxygen atom-containing gas.
摘要翻译：提供一种制造半导体器件的方法，其可以将欧姆电极的接触电阻降低到p型氮化物半导体层，并且可以实现长期稳定的操作。在电极形成步骤中，通过在第一p型欧姆电极上连续层压作为第一p型欧姆电极的Pd膜和作为第二p型欧姆电极的Ta膜，在电极形成步骤中形成金属膜的p型欧姆电极 p型GaN接触层，金属膜形成为包含氧原子。在金属膜中存在氧原子的情况下，在热处理工序中，金属膜的p型欧姆电极在不含氧原子气体的气氛中进行热处理。

5. 发明授权

US07939943B2 Nitride semiconductor device including an electrode in ohmic contact with a P-type nitride semiconductor contact layer 有权
标题翻译：氮化物半导体器件包括与P型氮化物半导体接触层欧姆接触的电极
公开(公告)号：US07939943B2
公开(公告)日：2011-05-10
申请号：US12268509
申请日：2008-11-11
申请人： Katsuomi Shiozawa , Kyozo Kanamoto , Toshiyuki Oishi , Hiroshi Kurokawa , Kenichi Ohtsuka , Yoichiro Tarui , Yasunori Tokuda
发明人： Katsuomi Shiozawa , Kyozo Kanamoto , Toshiyuki Oishi , Hiroshi Kurokawa , Kenichi Ohtsuka , Yoichiro Tarui , Yasunori Tokuda
IPC分类号： H01L23/48 , H01L29/43
CPC分类号： H01L33/40 , H01L33/32 , H01L2924/0002 , H01S5/0425 , H01S5/22 , H01S5/32341 , H01L2924/00
摘要： A nitride semiconductor device with a p electrode having no resistance between itself and other electrodes, and a method of manufacturing the same are provided. A p electrode is formed of a first Pd film, a Ta film, and a second Pd film, which is an antioxidant film for preventing oxidation of the Ta film, and on a p-type contact layer of a nitride semiconductor. On the second Pd film, a pad electrode is formed. The second Pd film as an antioxidant film is formed on the entire upper surface of the Ta film which forms the p electrode, to prevent oxidation of the Ta film. This inhibits the resistance between the p electrode and the pad electrode, thereby preventing a failure in contact between the p electrode and the pad electrode and providing the low-resistance p electrode.
摘要翻译：提供一种具有在其自身与其他电极之间不具有电阻的p电极的氮化物半导体器件及其制造方法。 p电极由作为防止氧化Ta膜的抗氧化剂膜和氮化物半导体的p型接触层的第一Pd膜，Ta膜和第二Pd膜形成。在第二Pd膜上形成焊盘电极。作为抗氧化剂膜的第二Pd膜形成在形成p电极的Ta膜的整个上表面上，以防止Ta膜的氧化。这抑制了p电极和焊盘电极之间的电阻，从而防止p电极和焊盘电极之间的接触不良，并提供低电阻p电极。

6. 发明申请

US20090142871A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20090142871A1
公开(公告)日：2009-06-04
申请号：US12323634
申请日：2008-11-26
申请人： Kenichi Ohtsuka , Yoichiro Tarui , Yosuke Suzuki , Katsuomi Shiozawa , Kyozo Kanamoto , Toshiyuki Oishi , Yasunori Tokuda , Tatsuo Omori
发明人： Kenichi Ohtsuka , Yoichiro Tarui , Yosuke Suzuki , Katsuomi Shiozawa , Kyozo Kanamoto , Toshiyuki Oishi , Yasunori Tokuda , Tatsuo Omori
IPC分类号： H01L21/20 , H01L33/00
CPC分类号： H01S5/34333 , B82Y20/00 , H01L33/325 , H01L33/40 , H01S5/0421 , H01S5/0425 , H01S5/22 , H01S5/2214 , H01S5/3063
摘要： A method of manufacturing a semiconductor device provides a semiconductor device with a gallium-nitride-based semiconductor structure that allows long-term stable operation without degradation in device performance. After formation of an insulation film on a surface other than on a ridge surface, an oxygen-containing gas such as O2, O3, NO, N2O, or NO2 is supplied to oxidize a p-type GaN contact layer from the surface and to thereby form an oxide film on the surface of the p-type GaN contact layer. Then, a p-type electrode that establishes contact with the p-type GaN contact layer is formed by evaporation or sputtering on the oxide film and on the insulation film. Heat treatment is subsequently performed at temperatures between 400 and 700° C. in an atmosphere containing a nitrogen-containing gas such as N2 or NH3 or an inert gas such as Ar or He.
摘要翻译：半导体器件的制造方法为半导体器件提供了氮化镓基半导体结构，其允许长期稳定的操作而不会降低器件性能。在表面以外的表面上形成绝缘膜之后，供给诸如O 2，O 3，NO，N 2 O或NO 2的含氧气体以从表面氧化p型GaN接触层，由此在p型GaN接触层的表面上形成氧化膜。然后，通过在氧化物膜和绝缘膜上的蒸发或溅射形成与p型GaN接触层建立接触的p型电极。随后在含有含氮气体如N 2或NH 3或惰性气体例如Ar或He的气氛中，在400-700℃的温度下进行热处理。

7. 发明授权

US08685848B2 Manufacturing method of silicon carbide semiconductor device 有权
标题翻译：碳化硅半导体器件的制造方法
公开(公告)号：US08685848B2
公开(公告)日：2014-04-01
申请号：US13355710
申请日：2012-01-23
申请人： Yoshinori Matsuno , Yoichiro Tarui
发明人： Yoshinori Matsuno , Yoichiro Tarui
IPC分类号： H01L21/329
CPC分类号： H01L29/1608 , H01L21/0465 , H01L21/0485 , H01L29/0615 , H01L29/0619 , H01L29/6606 , H01L29/872
摘要： A silicon oxide film is formed on an epitaxial layer by dry thermal oxidation, an ohmic electrode is formed on a back surface of a SiC substrate, an ohmic junction is formed between the ohmic electrode and the back surface of the SiC substrate by annealing the SiC substrate, the silicon oxide film is removed, and a Schottky electrode is formed on the epitaxial layer. Then, a sintering treatment is performed to form a Schottky junction between the Schottky electrode and the epitaxial layer.
摘要翻译：通过干热氧化在外延层上形成氧化硅膜，在SiC衬底的背面上形成欧姆电极，在SiC衬底的欧姆电极和背面之间形成欧姆接头，退火SiC 衬底，除去氧化硅膜，在外延层上形成肖特基电极。然后，进行烧结处理以在肖特基电极和外延层之间形成肖特基结。

8. 发明授权

US08115211B2 Silicon carbide semiconductor device and manufacturing method thereof 有权
标题翻译：碳化硅半导体器件及其制造方法
公开(公告)号：US08115211B2
公开(公告)日：2012-02-14
申请号：US12621963
申请日：2009-11-19
申请人： Yoichiro Tarui
发明人： Yoichiro Tarui
IPC分类号： H01L31/0312 , H01L31/0256 , H01L29/74 , H01L29/76 , H01L29/94
CPC分类号： H01L21/0455 , H01L29/1095 , H01L29/1608 , H01L29/42372 , H01L29/66068
摘要： An objective is to provide a manufacturing method of a silicon carbide semiconductor device in which an electric field applied to a gate oxide film can be relaxed and thereby reliability can be ensured, and by the manufacturing method increase of the manufacturing cost can also be prevented as much as possible. Well regions, channel regions, and gate electrodes are formed so that, given that extending lengths, with respect to the inner sides of source regions, of each of the well regions, the channel regions, and the gate electrodes are Lwell, Lch, and Lg, respectively, a relationship of Lch
摘要翻译：目的是提供一种碳化硅半导体器件的制造方法，其中施加到栅极氧化膜的电场可以被放宽，从而可以确保可靠性，并且通过制造方法也可以防止制造成本的增加，因为尽可能的形成阱区域，沟道区域和栅电极，使得相对于源极区域的内侧的阱区域，沟道区域和栅极电极的延伸长度为Lwell，Lch和 Lg分别满足Lch

9. 发明申请

US20110195563A1 METHOD OF MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE 有权
标题翻译：制造碳化硅半导体器件的方法
公开(公告)号：US20110195563A1
公开(公告)日：2011-08-11
申请号：US12899061
申请日：2010-10-06
申请人： Koji Okuno , Yoichiro Tarui
发明人： Koji Okuno , Yoichiro Tarui
IPC分类号： H01L21/22
CPC分类号： H01L29/66068 , H01L21/0465 , H01L29/0615 , H01L29/1095 , H01L29/1608 , H01L29/6606 , H01L29/7395 , H01L29/7811 , H01L29/872
摘要： A method of manufacturing a silicon carbide semiconductor device according to the present invention includes the steps of (a) forming an implantation mask made up of a plurality of unit masks on a silicon carbide semiconductor layer, and (b) implanting predetermined ion in the silicon carbide semiconductor layer at a predetermined implantation energy by using the implantation mask. In the step (a), the implantation mask is formed such that a length from any point in the unit mask to an end of the unit mask can be equal to or less than a scattering length obtained when the predetermined ion is implanted in silicon carbide at the predetermined implantation energy and the implantation mask can have a plurality of regions different from each other in terms of a size and an arrangement interval of the unit masks.
摘要翻译：根据本发明的制造碳化硅半导体器件的方法包括以下步骤：（a）在碳化硅半导体层上形成由多个单位掩模构成的注入掩模，以及（b）在硅中注入预定的离子通过使用注入掩模在预定的注入能量下形成碳化物半导体层。在步骤（a）中，形成注入掩模，使得从单位掩模中的任何点到单位掩模的末端的长度可以等于或小于当将预定离子注入到碳化硅中时获得的散射长度在预定的注入能量和注入掩模可以具有在单位掩模的尺寸和排列间隔方面彼此不同的多个区域。

10. 发明授权

US07285465B2 Method of manufacturing a SiC vertical MOSFET 有权
标题翻译：制造SiC垂直MOSFET的方法
公开(公告)号：US07285465B2
公开(公告)日：2007-10-23
申请号：US11353992
申请日：2006-02-15
申请人： Yoichiro Tarui , Ken-ichi Ohtsuka , Masayuki Imaizumi , Hiroshi Sugimoto , Tetsuya Takami
发明人： Yoichiro Tarui , Ken-ichi Ohtsuka , Masayuki Imaizumi , Hiroshi Sugimoto , Tetsuya Takami
IPC分类号： H01L21/336
CPC分类号： H01L29/7802 , H01L21/0465 , H01L21/047 , H01L29/1095 , H01L29/1608 , H01L29/66068
摘要： A semiconductor device and its manufacturing method are provided in which the trade-off relation between channel resistance and JFET resistance, an obstacle to device miniaturization, is improved and the same mask is used to form a source region and a base region by ion implantation. In a vertical MOSFET that uses SiC, a source region and a base region are formed by ion implantation using the same tapered mask to give the base region a tapered shape. The taper angle of the tapered mask is set to 30° to 60° when the material of the tapered mask has the same range as SiC in ion implantation, and to 20° to 45° when the material of the tapered mask is SiO2.
摘要翻译：提供了一种半导体器件及其制造方法，其中改善了沟道电阻和JFET电阻之间的折衷关系，从而改善了器件的小型化，并且通过离子注入使用相同的掩模形成源极区域和基极区域。在使用SiC的垂直MOSFET中，通过使用相同的锥形掩模的离子注入形成源极区域和基极区域，以使基极区域呈锥形。当锥形掩模的材料与离子注入中的SiC具有相同的范围时，锥形掩模的锥角设定为30°至60°，当锥形掩模的材料为SiO 2 。

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