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1. 发明授权

US5650353A Method for production of SOI substrate 失效
标题翻译：生产SOI衬底的方法
公开(公告)号：US5650353A
公开(公告)日：1997-07-22
申请号：US561166
申请日：1995-11-21
申请人： Katsuo Yoshizawa , Tsutomu Sato , Kiyoshi Mitani , Masatake Katayama
发明人： Katsuo Yoshizawa , Tsutomu Sato , Kiyoshi Mitani , Masatake Katayama
IPC分类号： H01L21/02 , H01L21/20 , H01L21/304 , H01L21/762 , H01L27/12
CPC分类号： H01L21/2007 , H01L21/76251 , Y02P80/30 , Y10S148/012 , Y10S148/135
摘要： SOI (silicon-on-insulator) substrates are efficiently produced by a method which comprises superposing and bonding at least three single crystal silicon wafers through the medium of a SiO.sub.2 film formed on the surface of each of the wafers and cutting the bonded wafers along planes perpendicular to the direction of superposition thereof. The cutting can be infallibly attained with high dimensional accuracy without entailing such adverse phenomena as the vibration of the blade of a cutting tool by providing at the portions destined to be cut the grooves for guiding the blade of the cutting tool in advance of the cutting work.
摘要翻译：通过一种方法有效地制造SOI（绝缘体上硅）衬底，该方法包括通过形成在每个晶片的表面上的SiO 2膜的介质将至少三个单晶硅晶片叠加并结合，并沿着平面切割结合的晶片垂直于其叠加方向。可以以高尺寸精度实现切割，而不会产生诸如切割工具的刀片的振动的不利现象，因为在切割工具的前面提供用于引导切割工具的刀刃的凹槽的部分。

2. 发明授权

US5998281A SOI wafer and method for the preparation thereof 失效
标题翻译： SOI晶片及其制备方法
公开(公告)号：US5998281A
公开(公告)日：1999-12-07
申请号：US698457
申请日：1996-08-15
申请人： Hiroji Aga , Kiyoshi Mitani , Masatake Katayama
发明人： Hiroji Aga , Kiyoshi Mitani , Masatake Katayama
IPC分类号： H01L21/20 , H01L21/762
CPC分类号： H01L21/76251 , H01L21/2007 , Y10S148/012 , Y10S438/977
摘要： Proposed is an improvement in the process for the preparation of an SOI wafer comprising the steps of: forming an oxidized surface film on the mirror-polished surface of a first mirror-polished semiconductor silicon wafer as the base wafer; forming a doped layer with a dopant in a high concentration on the mirror-polished surface of a second mirror-polished semiconductor silicon wafer as the bond wafer; bringing the base wafer and the bond wafer into contact each with the other at the oxidized surface film and the doped layer; and subjecting the thus contacted semiconductor silicon wafers to a heat treatment to effect integral bonding thereof into a precursor of an SOI wafer. The improvement of the invention is accomplished by polishing the surface of the doped layer on the bond wafer before the base wafer and the bond wafer are joined by contacting at the oxidized surface film and the doped layer so that a great improvement can be obtained in the bonding strength between layers.
摘要翻译：提出了制备SOI晶片的方法的改进，包括以下步骤：在作为基底晶片的第一镜面抛光半导体硅晶片的镜面抛光表面上形成氧化的表面膜; 在作为接合晶片的第二镜面抛光半导体硅晶片的镜面抛光表面上形成具有高浓度掺杂剂的掺杂层; 使基底晶片和接合晶片在氧化的表面膜和掺杂层处彼此接触; 以及对这样接触的半导体硅晶片进行热处理以使其整体结合到SOI晶片的前体中。通过在基底晶片和接合晶片通过在氧化的表面膜和掺杂层之间接触而接合基底晶片和接合晶片之前，通过抛光接合晶片上的掺杂层的表面来实现本发明的改进，使得可以在层之间的粘结强度。

3. 发明授权

US5804494A Method of fabricating bonded wafer 失效
标题翻译：制造接合晶片的方法
公开(公告)号：US5804494A
公开(公告)日：1998-09-08
申请号：US694861
申请日：1996-08-09
申请人： Kiyoshi Mitani , Masatake Katayama , Kazushi Nakazawa
发明人： Kiyoshi Mitani , Masatake Katayama , Kazushi Nakazawa
IPC分类号： H01L21/02 , H01L21/20 , H01L21/304 , H01L21/306 , H01L21/324 , H01L21/762 , H01L27/12 , H01L21/30
CPC分类号： H01L21/02043 , H01L21/2007 , H01L21/76251 , Y10S148/012
摘要： A method of fabricating a bonded wafer which is capable of reducing the concentrations of impurities, and more particularly the boron concentration, at the interface of bonding in the bonded wafer, wherein first and second wafers to be bonded are finish-cleaned, then the wafers are temporarily stored in a closed box so as to isolate the wafers from clean-room air, thereafter the first and second wafers are superposed in a clean atmosphere which is held out of direct contact with clean-room air, and finally the superposed first and second wafers are bonded together by a heat-treatment.
摘要翻译：一种制造接合晶片的方法，该方法能够在键合晶片的接合界面处降低杂质浓度，特别是硼浓度，其中待结合的第一和第二晶片经过精整处理，然后晶片临时储存在封闭的箱体中，以将晶片与洁净室空气隔离，此后第一和第二晶片重叠在与洁净室空气直接接触的清洁气氛中，最后重叠在第一和第第二片通过热处理结合在一起。

4. 发明授权

US5538904A Method of estimating quantity of boron at bonding interface in bonded wafer 失效
标题翻译：估计接合晶片接合界面硼量的方法
公开(公告)号：US5538904A
公开(公告)日：1996-07-23
申请号：US310397
申请日：1994-09-22
申请人： Kiyoshi Mitani , Masatake Katayama , Kazushi Nakazawa
发明人： Kiyoshi Mitani , Masatake Katayama , Kazushi Nakazawa
IPC分类号： H01L21/66 , H01L21/02 , H01L21/762
CPC分类号： H01L21/76251 , Y10S148/012
摘要： A method of estimating the amount of boron on the surface of silicone samples in which a plurality of reference samples shallowly ion-implanted with boron in different dosages are prepared and heat-treated under the same conditions of temperature and time as are used in a bonding heat treatment to obtain the bonded wafer, thereafter, the boron profile in the direction of the depth of the bonding interface in each reference sample is measured using a SIMS and compared with an actual boron profile at the bonding interface of a bonded wafer to be estimated so as to determine one reference sample whose boron profile is equivalent to the actual boron profile of the bonded wafer to be estimated, and finally a dosage of boron in the determined reference sample is estimated by convertion to be a surface density of boron presenting at the bonding interface of the bonded wafer to be estimated at an initial stage prior to the bonding heat treatment of the bonded wafer to be estimated. Thus, the boron profile obtained by SIMS measurement can be converted into the boron surface density with the result that the boron quantity at the bonding interface of a bonded wafer can be readily estimated to be a boron surface density.
摘要翻译：一种估计硅胶样品表面上硼的量的方法，其中以与不同剂量的硼浅离子注入的多个参考样品制备并在与粘合中使用的相同的温度和时间条件下进行热处理热处理以获得接合的晶片，此后，使用SIMS测量每个参考样品中的接合界面的深度方向上的硼分布，并与待估计的键合晶片的键合界面处的实际硼分布进行比较以便确定一个参考样品，其硼分布等于要估计的键合晶片的实际硼分布，最后通过转换来估计所确定的参考样品中的硼剂量，使其为硼的表面密度接合晶片的接合界面在待估计的接合晶片的接合热处理之前的初始阶段被估计。因此，通过SIMS测量获得的硼分布可以转化为硼表面密度，结果是接合晶片的键合界面处的硼量可以容易地估计为硼表面密度。

5. 发明授权

US5478408A SOI substrate and manufacturing method therefor 失效
标题翻译： SOI衬底及其制造方法
公开(公告)号：US5478408A
公开(公告)日：1995-12-26
申请号：US408798
申请日：1995-03-23
申请人： Kiyoshi Mitani , Masatake Katayama , Kazushi Nakazawa
发明人： Kiyoshi Mitani , Masatake Katayama , Kazushi Nakazawa
IPC分类号： H01L21/762 , H01L21/02 , H01L21/20 , H01L21/322 , H01L27/12 , H01L21/265
CPC分类号： H01L21/2007 , H01L21/3225 , Y10S148/012
摘要： There is provided an SOI (Silicon On Insulator) substrate having a thick SOI layer, where crystallographic defects mainly consisting of OSFs (Oxidation Induced Stacking Fault) are practically prevented from occurrence in the SOI layer, according to the present invention.The manufacturing method for the SOI substrate according to the present invention comprises the following steps of: the silicon oxide film being formed by thermal oxidation on the surface of a first silicon wafer having a concentration of interstitial oxygen under 16 ppma (per JEIDA Standard); the first silicon wafer being superimposed on a second silicon wafer, which is a support for supporting the first silicon wafer, with the silicon oxide film sandwiched therebetween; then the superimposed wafers being heat-treated so as to obtain a bonded wafer; and further the bulk of the first silicon wafer of the bonded wafer being reduced by grinding and then polishing so as to obtain the SOI substrate with the SOI layer of more than 5 .mu.m in thickness, which is a single crystal layer, formed on the second silicon wafer.
摘要翻译：根据本发明，提供了具有厚SOI层的SOI（绝缘体上硅）衬底，其中实际上防止了在SOI层中出现主要由OSF（氧化诱发堆叠故障）组成的晶体缺陷。根据本发明的SOI衬底的制造方法包括以下步骤：在具有16ppma（根据JEIDA标准）的间隙氧浓度的第一硅晶片的表面上通过热氧化形成氧化硅膜; 所述第一硅晶片叠加在第二硅晶片上，所述第二硅晶片是用于支撑所述第一硅晶片的支撑体，其间夹置有所述氧化硅膜; 然后对叠加的晶片进行热处理以获得接合晶片; 并且通过研磨然后抛光来还原接合晶片的第一硅晶片的大部分，以获得厚度大于5μm的SOI层（其是形成在单晶层上的单晶层）的SOI衬底第二硅晶片。

6. 发明授权

US5514235A Method of making bonded wafers 失效
标题翻译：制造粘结晶片的方法
公开(公告)号：US5514235A
公开(公告)日：1996-05-07
申请号：US262113
申请日：1994-06-17
申请人： Kiyoshi Mitani , Masatake Katayama
发明人： Kiyoshi Mitani , Masatake Katayama
IPC分类号： H01L21/02 , B81C1/00 , H01L21/20 , H01L21/324 , H01L27/12 , H01L21/304
CPC分类号： H01L21/2007 , Y10S148/012 , Y10S148/135
摘要： A method is disclosed for obtaining bonded wafers of SOI type, where impurity redistribution in the bulk of the wafers is suppressed and the bonding strength between the wafers is substantially higher compared with that in the prior art. This is accomplished by forming a thermally grown oxide layer on the surface of the thinner one(bond wafer) of two monocrystalline silicon wafers having thicknesses different from each other by more than 50 .mu.m; then superposing the thinner wafer onto the other thicker wafer(base wafer); and finally conducting at least two heat treatments of the wafers at temperatures selected in the range of under 900.degree. C. for a period of time selected in the range of from 0.5 min. to 120 min.
摘要翻译：公开了一种用于获得SOI类型的接合晶片的方法，其中抑制了大部分晶片中的杂质再分布，并且晶片之间的结合强度与现有技术相比显着更高。这是通过在具有彼此不同的厚度大于50μm的两个单晶硅晶片的较薄的一个（接合晶片）的表面上形成热生长的氧化物层来实现的; 然后将较薄的晶片叠加到另一个较厚的晶片（基底晶片）上; 并且最后在900℃以下选择的温度下进行晶片的至少两次热处理一段时间，其选择范围为0.5分钟。至120分钟

7. 发明授权

US5918139A Method of manufacturing a bonding substrate 失效
标题翻译：接合基板的制造方法
公开(公告)号：US5918139A
公开(公告)日：1999-06-29
申请号：US14415
申请日：1998-01-27
申请人： Kiyoshi Mitani , Katsuo Yoshizawa
发明人： Kiyoshi Mitani , Katsuo Yoshizawa
IPC分类号： H01L21/302 , H01L21/02 , H01L21/20 , H01L21/304 , H01L27/12 , H01L21/30 , H01L21/46
CPC分类号： H01L21/2007
摘要： A method of manufacturing a bonding substrate is disclosed. An oxide film is formed on the surface of at least one of two semiconductor substrates, and the two substrates are brought into close contact with each other via the oxide film. The substrates are heat-treated in an oxidizing atmosphere in order to firmly join the substrates together. Subsequently, an unjoined portion at the periphery of a device-fabricating substrate is completely removed, and the thickness of the device-fabricating substrate is reduced to a desired thickness so as to yield a thin film. The surface of the thin film is then etched through vapor-phase etching in order to make the thickness of the thin film uniform. In the method, the oxide film on the unjoined portion of at least the support substrate is removed before the surface of the thin film is subjected to vapor-phase etching. The method prevents a groove from being formed in the surface of the unjoined portion (terrace portion) of the support substrate (base wafer) even when the surface of the thin film undergoes vapor phase etching.
摘要翻译：公开了一种制造接合衬底的方法。在两个半导体衬底中的至少一个的表面上形成氧化物膜，并且通过氧化膜使两个衬底彼此紧密接触。将基板在氧化气氛中进行热处理，以将基板牢固地接合在一起。随后，在器件制造衬底的周边处的未连接部分被完全去除，并且将器件制造衬底的厚度减小到期望的厚度以产生薄膜。然后通过气相蚀刻对薄膜的表面进行蚀刻，以使薄膜的厚度均匀。在该方法中，在对薄膜的表面进行气相蚀刻之前，去除至少支撑基板的未连接部分上的氧化膜。即使当薄膜的表面进行气相蚀刻时，该方法也防止在支撑基板（基底晶片）的未连接部分（平台部分）的表面中形成凹槽。

8. 发明授权

US07959731B2 Method for producing semiconductor wafer 有权
标题翻译：半导体晶片的制造方法
公开(公告)号：US07959731B2
公开(公告)日：2011-06-14
申请号：US11665977
申请日：2005-11-02
申请人： Isao Yokokawa , Hiroji Aga , Kiyoshi Mitani
发明人： Isao Yokokawa , Hiroji Aga , Kiyoshi Mitani
IPC分类号： C30B25/22
CPC分类号： H01L21/26506 , H01L21/02381 , H01L21/02532 , H01L21/0262 , H01L21/02664 , H01L21/76254 , Y10S117/915
摘要： A method for producing a semiconductor wafer, including epitaxially growing a Si1-XGeX layer (0
摘要翻译：一种制造半导体晶片的方法，包括在硅单晶晶片的表面上外延生长Si1-XGeX层（0

9. 发明申请

US20110045246A1 SILICON SINGLE CRYSTAL WAFER AND METHOD FOR MANUFACTURING SILICON SINGLE CRYSTAL WAFER, AND METHOD FOR EVALUATING SILICON SINGLE CRYSTAL WAFER 有权
标题翻译：硅单晶和制造硅单晶的方法和用于评估硅单晶的方法
公开(公告)号：US20110045246A1
公开(公告)日：2011-02-24
申请号：US12990038
申请日：2009-05-07
申请人： Fumio Tahara , Tsuyoshi Ohtsuki , Takatoshi Nagoya , Kiyoshi Mitani
发明人： Fumio Tahara , Tsuyoshi Ohtsuki , Takatoshi Nagoya , Kiyoshi Mitani
IPC分类号： B32B5/00 , H01L21/66 , G01Q60/24
CPC分类号： C30B29/06 , C30B33/02 , H01L21/02008 , H01L22/12 , H01L2924/0002 , Y10T428/24355 , H01L2924/00
摘要： A method for manufacturing a silicon single crystal wafer, having at least: a step of preparing a silicon single crystal ingot; a step of slicing the silicon single crystal ingot to fabricate a plurality of sliced substrates; a processing step of processing the plurality of sliced substrates into a plurality of substrates by performing at least one of lapping, etching, and polishing; a step of sampling at least one from the plurality of substrates; a step of measuring surface roughness of the substrate sampled at the sampling step by an AFM and obtaining an amplitude (an intensity) of a frequency band corresponding to a wavelength of 20 nm to 50 nm to make a judgment of acceptance; and a step of sending the substrate to the next step if a judgment result is acceptance or performing reprocessing if the judgment result is rejection.
摘要翻译：一种制造硅单晶晶片的方法，至少具有：制备硅单晶锭的步骤; 切割硅单晶锭以制造多个切片基板的步骤; 通过进行研磨，蚀刻和研磨中的至少一种来将多个切片基板加工成多个基板的处理步骤; 从所述多个基板中取样至少一个的步骤; 通过AFM测量在采样步骤中采样的基板的表面粗糙度并获得对应于20nm至50nm的波长的频带的振幅（强度）以判定接受的步骤; 以及如果判断结果为拒绝则判断结果为接受或执行再处理的步骤，将基板发送到下一步骤。

10. 发明申请

US20080305318A1 SILICON ON INSULATOR (SOI) WAFER AND PROCESS FOR PRODUCING SAME 审中-公开
标题翻译：绝缘体硅（SOI）波形及其制造方法
公开(公告)号：US20080305318A1
公开(公告)日：2008-12-11
申请号：US12163785
申请日：2008-06-27
申请人： Atsuo Ito , Yoshihiro Kubota , Kiyoshi Mitani
发明人： Atsuo Ito , Yoshihiro Kubota , Kiyoshi Mitani
IPC分类号： B32B27/32 , H01L21/30
CPC分类号： H01L21/76256 , C30B29/06 , C30B33/00 , H01L27/12
摘要： In a manufacturing method of manufacturing a silicon on insulator (SOI) wafer, a single crystal silicon whose surface is an N region on an outer side of an OSF region, is grown and sliced to fabricate an N region single crystal silicon. An ion injection layer is formed within the N region single crystal silicon wafer by injecting a hydrogen ion or a rare gas ion from a surface of the N region single crystal silicon wafer; the ion injection surface of the N region single crystal silicon wafer and/or a surface of the transparent insulation substrate is processed using plasma and/or ozone. The ion injection surface is bonded to the surface of the transparent insulation substrate by bringing them into close contact with each other at room temperature. An SOI layer is formed by mechanically peeling the single crystal silicon wafer.
摘要翻译：在制造绝缘体上硅（SOI）晶片的制造方法中，生长表面为OSF区域外侧的N区的单晶硅，并切片以制造N区单晶硅。通过从N区域单晶硅晶片的表面注入氢离子或稀有气体离子，在N区域单晶硅晶片内形成离子注入层; 使用等离子体和/或臭氧处理N区域单晶硅晶片的离子注入表面和/或透明绝缘衬底的表面。离子注入表面通过在室温下彼此紧密接触而结合到透明绝缘基板的表面。通过机械剥离单晶硅晶片形成SOI层。

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