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1. 发明申请

US20110006339A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20110006339A1
公开(公告)日：2011-01-13
申请号：US12828422
申请日：2010-07-01
申请人： Kaoru UCHIDA , Kazuyuki SAWADA , Yuji HARADA
发明人： Kaoru UCHIDA , Kazuyuki SAWADA , Yuji HARADA
IPC分类号： H01L29/739 , H01L21/331
CPC分类号： H01L29/7393 , H01L29/063 , H01L29/66325
摘要： A lateral hybrid IGBT is provided including: a RESURF region which is an n-type dopant layer formed in a surface portion of a substrate 1 made of p-type Si; a base region which is a p-type dopant layer; an emitter/source region which is an n-type dopant layer with a high concentration; a collector region which is a p-type dopant layer with a low concentration and formed in the RESURF region; a drain region which is an n-type dopant layer with a high concentration and formed adjacent to the collector region but on another cross-section; a base connection region which is a p-type dopant layer with a high concentration; a gate insulator film; and a gate electrode, wherein the collector region is shallower than the drain region located on the other cross-section.
摘要翻译：提供一种横向混合IGBT，包括：RESURF区，其是在由p型Si制成的衬底1的表面部分中形成的n型掺杂剂层; 作为p型掺杂剂层的基极区域; 作为高浓度的n型掺杂剂层的发射极/源极区域; 作为在RESURF区域中形成的低浓度的p型掺杂剂层的集电极区域; 漏极区域，其是具有高浓度的n型掺杂剂层，并且形成在集电极区域附近但在另一截面上; 作为高浓度的p型掺杂剂层的基极连接区域; 栅极绝缘膜; 以及栅电极，其中所述集电极区域比位于另一截面上的漏极区域浅。

2. 发明申请

US20100264493A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20100264493A1
公开(公告)日：2010-10-21
申请号：US12731267
申请日：2010-03-25
申请人： Yasufumi IZUTSU , Kazuyuki SAWADA , Yuji HARADA
发明人： Yasufumi IZUTSU , Kazuyuki SAWADA , Yuji HARADA
IPC分类号： H01L29/06 , H01L21/336 , H01L29/78
CPC分类号： H01L21/823418 , H01L21/823412 , H01L21/823493 , H01L27/027 , H01L29/66659 , H01L29/78 , H01L29/7835
摘要： To provide a semiconductor device which includes a P-type Si substrate, an ESD protection element, and a protected element. The ESD protection element includes a source N-type diffusion region, and a high-concentration P-type diffusion region formed from under the source N-type diffusion region to at least under part of a gate electrode, covering the source N-type diffusion region within the P-type Si substrate, and having a higher P-type impurity concentration than the P-type Si substrate. The protected element includes a drain N-type diffusion region, and a low-concentration P-type diffusion region that is in contact with the drain N-type diffusion region within the P-type Si substrate. The drain electrode of the ESD protection element and the drain electrode of the protected element are connected, and the high-concentration P-type diffusion region 103 has a higher P-type impurity concentration than the low-concentration P-type diffusion region.
摘要翻译：提供一种包括P型Si衬底，ESD保护元件和受保护元件的半导体器件。 ESD保护元件包括源极N型扩散区域和从源极N型扩散区域至栅极电极的至少一部分形成的高浓度P型扩散区域，覆盖源极N型扩散区域 P型Si衬底内的P型杂质浓度高于P型Si衬底。受保护元件包括漏极N型扩散区域和与P型Si衬底内的漏极N型扩散区域接触的低浓度P型扩散区域。 ESD保护元件的漏电极和受保护元件的漏电极连接，高浓度P型扩散区域103的P型杂质浓度比低浓度P型扩散区域高。

3. 发明申请

US20090104762A1 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20090104762A1
公开(公告)日：2009-04-23
申请号：US12338395
申请日：2008-12-18
申请人： Osamu KUSUMOTO , Makoto KITABATAKE , Masao UCHIDA , Kunimasa TAKAHASHI , Kenya YAMASHITA , Masahiro HAGIO , Kazuyuki SAWADA
发明人： Osamu KUSUMOTO , Makoto KITABATAKE , Masao UCHIDA , Kunimasa TAKAHASHI , Kenya YAMASHITA , Masahiro HAGIO , Kazuyuki SAWADA
IPC分类号： H01L21/265
CPC分类号： H01L29/7828 , H01L21/046 , H01L21/0475 , H01L21/0485 , H01L21/30625 , H01L29/1029 , H01L29/105 , H01L29/1608 , H01L29/365 , H01L29/41766 , H01L29/66068 , H01L29/7838 , H01L29/812
摘要： Ion implantation is carried out to form a p-well region and a source region in parts of a high resistance SiC layer on a SiC substrate, and a carbon film is deposited over the substrate. With the carbon film deposited over the substrate, annealing for activating the implanted dopant ions is performed, and then the carbon film is removed. Thus, a smooth surface having hardly any surface roughness caused by the annealing is obtained. Furthermore, if a channel layer is epitaxially grown, the surface roughness of the channel layer is smaller than that of the underlying layer. Since the channel layer having a smooth surface is provided, it is possible to obtain a MISFET with a high current drive capability.
摘要翻译：进行离子注入以在SiC衬底上的高电阻SiC层的部分中形成p阱区域和源极区域，并且在衬底上沉积碳膜。通过沉积在基板上的碳膜，进行用于激活注入的掺杂离子的退火，然后除去碳膜。因此，获得了退火几乎没有表面粗糙度的光滑表面。此外，如果沟道层外延生长，则沟道层的表面粗糙度小于下层的表面粗糙度。由于提供了具有平滑表面的沟道层，所以可以获得具有高电流驱动能力的MISFET。

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