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1. 发明申请

WO2011085019A3 SITE BASED QUANTIFICATION OF SUBSTRATE TOPOGRAPHY AND ITS RELATION TO LITHOGRAPHY DEFOCUS AND OVERLAY 审中-公开
标题翻译：基于位置的基底地质定量及其与断层和覆盖的关系
公开(公告)号：WO2011085019A3
公开(公告)日：2015-07-09
申请号：PCT/US2011020245
申请日：2011-01-05
申请人： KLA TENCOR CORP , VEERARAGHAVAN SATHISH , SINHA JAYDEEP K
发明人： VEERARAGHAVAN SATHISH , SINHA JAYDEEP K
IPC分类号： H01L21/66 , H01L21/027
CPC分类号： G06F17/5009 , G01B11/24 , G01N21/9501 , G03F7/705 , G03F7/70633 , G03F7/70641 , G03F7/7065 , G03F7/70783 , G06F17/5018 , H01L22/12
摘要： A method and system for modeling and analyzing wafer nanotopography data utilizes a nonlinear contact finite element model. Inputs to the model include lithography chuck parameters and site-based geometry data. Outputs from the model include in-plane distortions and out-of-plane distortions, from which defocus and overlay can be derived.
摘要翻译：用于建模和分析晶片纳米成像数据的方法和系统利用非线性接触有限元模型。该模型的输入包括光刻卡盘参数和基于位置的几何数据。模型的输出包括平面内失真和平面外失真，从中可以得出散焦和叠加。

2. 发明申请

WO2010025334A3 LOCALIZED SUBSTRATE GEOMETRY CHARACTERIZATION 审中-公开
标题翻译：本地化基底几何特征
公开(公告)号：WO2010025334A3
公开(公告)日：2010-05-20
申请号：PCT/US2009055313
申请日：2009-08-28
申请人： KLA TENCOR CORP , VEERARAGHAVAN SATHISH , SINHA JAYDEEP K , FETTIG RABI
发明人： VEERARAGHAVAN SATHISH , SINHA JAYDEEP K , FETTIG RABI
IPC分类号： H01L21/66
CPC分类号： H01L22/12
摘要： A system for evaluating the metrological characteristics of a surface of a substrate, the system including an optical substrate measurement system, a data analyzing system for analyzing data in an evaluation area on the substrate, applying feature-specific filters to characterize the surface of the substrate, and produce surface-specific metrics for characterizing and quantifying a feature of interest, the surface-specific metrics including a range metric for quantifying maximum and minimum deviations in the evaluation area, a deviation metric for quantifying a point deviation having a largest magnitude in a set of point deviations, where the point deviations are an amount of deviation from a reference plane fit to the evaluation area, and a root mean square metric calculated from power spectral density.
摘要翻译：一种用于评估基板的表面的计量特性的系统，所述系统包括光学基板测量系统，用于分析基板上的评估区域中的数据的数据分析系统，应用特征滤波器以表征基板的表面并且产生用于表征和量化感兴趣的特征的表面特定度量，所述表面特定度量包括用于量化评估区域中的最大和最小偏差的范围度量，用于量化具有最大幅度的点偏差的偏差度量点偏差集，其中点偏差是与参考平面拟合到评估区域的偏差量，以及根据功率谱密度计算的均方根度量。

3. 发明公开

EP3005411A4 USING WAFER GEOMETRY TO IMPROVE SCANNER CORRECTION EFFECTIVENESS FOR OVERLAY CONTROL 有权
标题翻译：晶片几何用于改进扫描仪的有效性进行校正库存控制的
公开(公告)号：EP3005411A4
公开(公告)日：2017-01-18
申请号：EP14804391
申请日：2014-05-28
申请人： KLA-TENCOR CORP
发明人： MACNAUGHTON CRAIG , VEERARAGHAVAN SATHISH , VUKKADALA PRADEEP , SINHA JAYDEEP K , AZORDEGAN AMIR
IPC分类号： H01L21/66 , G03F7/20 , G03F9/00
CPC分类号： G03F7/70616 , G03F7/70633 , G03F7/70783 , G03F9/7003 , H01J37/28 , H01J37/304 , H01J37/3172 , H01J37/3174 , H01J2237/221 , H01J2237/2814 , H01J2237/30472 , H01J2237/30483 , H01J2237/31701
摘要： Systems and methods for providing improved scanner corrections are disclosed. Scanner corrections provided in accordance with the present disclosure may be referred to as wafer geometry aware scanner corrections. More specifically, wafer geometry and/or wafer shape signature information are utilized to improve scanner corrections. By removing the wafer geometry as one of the error sources that may affect the overlay accuracy, better scanner corrections can be obtained because one less contributing factor needs to be modeled.
摘要翻译：用于提供改进的扫描仪校正的系统和方法是游离缺失盘。在雅舞蹈设置有本公开的扫描仪的校正可通过为晶片几何扫描器意识到校正被称为。更具体地，晶片的几何形状和/或晶片形状的签名信息被利用来改善扫描器校正。通过除去晶片的几何形状的误差源做可能会影响重叠精度之一，更好扫描器校正可以由于少了一个起作用的因素需要建模来获得。

4. 发明公开

EP3189542A4 BREAKDOWN ANALYSIS OF GEOMETRY INDUCED OVERLAY AND UTILIZATION OF BREAKDOWN ANALYSIS FOR IMPROVED OVERLAY CONTROL 有权
公开(公告)号：EP3189542A4
公开(公告)日：2018-05-09
申请号：EP15838437
申请日：2015-09-01
申请人： KLA TENCOR CORP
发明人： VEERARAGHAVAN SATHISH , HUANG CHIN-CHOU (KEVIN)
IPC分类号： G03F7/20 , H01L21/66
CPC分类号： G03F7/70625 , G03F7/705 , G03F7/70633 , G03F7/70783
摘要： Systems and methods for providing improved measurements and predictions of geometry induced overlay errors are disclosed. Information regarding variations of overlay errors is obtained and analyzed to improve semiconductor processes as well as lithography patterning. In some embodiments, a cascading analysis process is utilized to breakdown the wafer geometry induced overlay into various components. The breakdown analysis may also be utilized to determine effectiveness factors for the various components, which in turn may improve the prediction accuracy of the impact of wafer geometry on wafer overlay. Furthermore, the measurements and/or predictions of the wafer geometry induced overlay errors may be utilized to provide overlay monitoring and correction solutions.

5. 发明公开

EP2909857A4 SYSTEMS, METHODS AND METRICS FOR WAFER HIGH ORDER SHAPE CHARACTERIZATION AND WAFER CLASSIFICATION USING WAFER DIMENSIONAL GEOMETRY TOOLS 有权
标题翻译：系统，方法和标准来塑造WAFERS高阶和晶圆分类表征与晶圆尺寸几何图形工具
公开(公告)号：EP2909857A4
公开(公告)日：2016-04-27
申请号：EP13846801
申请日：2013-10-18
申请人： KLA TENCOR CORP
发明人： CHEN HAIGUANG , SINHA JAYDEEP K , KAMENSKY SERGEY , VEERARAGHAVAN SATHISH , VUKKADALA PRADEEP
IPC分类号： H01L21/66 , G01N21/95
CPC分类号： G01B11/24 , G01B2210/56 , G01N21/9501 , G06F17/00 , H01L22/12

6. 发明公开

EP2526409A4 SITE BASED QUANTIFICATION OF SUBSTRATE TOPOGRAPHY AND ITS RELATION TO LITHOGRAPHY DEFOCUS AND OVERLAY 有权
标题翻译： STANDORTBASIERTE QUANTIFIZIERUNG EINER SUBSTRATTOPOGRAPHIE UND IHRESVERHÄLTNISSESZU DEFOKUSSIERUNG UND在DER LITHOGRAPHIE
公开(公告)号：EP2526409A4
公开(公告)日：2017-10-04
申请号：EP11732096
申请日：2011-01-05
申请人： KLA-TENCOR CORP
发明人： VEERARAGHAVAN SATHISH , SINHA JAYDEEP K
IPC分类号： G01N21/95 , G01B5/28 , G03F7/20 , G06F17/50 , H01L21/66
CPC分类号： G06F17/5009 , G01B11/24 , G01N21/9501 , G03F7/705 , G03F7/70633 , G03F7/70641 , G03F7/7065 , G03F7/70783 , G06F17/5018 , H01L22/12
摘要： A method and system for modeling and analyzing wafer nanotopography data utilizes a nonlinear contact finite element model. Inputs to the model include lithography chuck parameters and site-based geometry data. Outputs from the model include in-plane distortions and out-of-plane distortions, from which defocus and overlay can be derived.
摘要翻译：用于建模和分析晶片纳米形貌数据的方法和系统利用非线性接触有限元模型。该模型的输入包括光刻卡盘参数和基于位置的几何数据。该模型的输出包括平面内失真和平面外失真，可以从中导出失焦和重叠。

7. 发明公开

EP3063785A4 PROCESS-INDUCED DISTORTION PREDICTION AND FEEDFORWARD AND FEEDBACK CORRECTION OF OVERLAY ERRORS 有权
标题翻译： PROZESSINDUZIERTE VERZERRUNGSVORHERSAGE SOWIEVORWÄRTSWEITERLEITUNGUND FEEDBACK-KORREKTUR VONÜBERDECKUNGSFEHLERN
公开(公告)号：EP3063785A4
公开(公告)日：2017-08-30
申请号：EP14857915
申请日：2014-10-29
申请人： KLA-TENCOR CORP
发明人： VUKKADALA PRADEEP , CHEN HAIGUANG , SINHA JAYDEEP , VEERARAGHAVAN SATHISH
IPC分类号： H01L21/66
CPC分类号： G01N19/08 , C23C14/54 , G01L1/00 , G01L5/0047 , G03F7/705 , G03F7/70633 , G03F7/70783 , H01L22/12 , H01L22/20

8. 发明公开

EP2766923A4 OVERLAY AND SEMICONDUCTOR PROCESS CONTROL USING A NOVEL WAFER GEOMETRY METRIC 有权
标题翻译： OVERLAY- UND HALBLEITERPROZESSSTEUERUNG UNTER VERWENDUNG EINER NEUARTIGEN WAFERGEETRIEMETRIK
公开(公告)号：EP2766923A4
公开(公告)日：2015-06-10
申请号：EP12839940
申请日：2012-10-10
申请人： KLA TENCOR CORP
发明人： VUKKADALA PRADEEP , VEERARAGHAVAN SATHISH , SINHA JAYDEEP K
IPC分类号： G03F7/00 , G01B11/24 , H01L21/70
CPC分类号： H01L21/67288 , G01B9/02021 , G01B9/02027 , G01B9/02057 , G01B11/161 , G01B11/2441 , G01B11/272 , G03F7/70633 , G03F7/70783 , H01L21/67271 , H01L22/12 , H01L2924/0002 , H01L2924/00

9. 发明公开

EP2324495A4 LOCALIZED SUBSTRATE GEOMETRY CHARACTERIZATION 无效
标题翻译： CHARAKTERISIERUNG EINER LOKALISIERTEN SUBSTRATGEOMETRIE
公开(公告)号：EP2324495A4
公开(公告)日：2013-06-05
申请号：EP09810639
申请日：2009-08-28
申请人： KLA TENCOR CORP
发明人： VEERARAGHAVAN SATHISH , SINHA JAYDEEP K , FETTIG RABI
IPC分类号： H01L21/66
CPC分类号： H01L22/12

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