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1. 发明公开

EP1083655A3 Amplifier circuit 审中-公开
标题翻译：放大电路
公开(公告)号：EP1083655A3
公开(公告)日：2007-03-28
申请号：EP00119379.6
申请日：2000-09-11
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Ishii, Hirotomo , Czarnul, Zdzislaw
IPC分类号： H03F3/45
CPC分类号： H03F3/45183 , H03F3/45475 , H03F3/45659 , H03F3/45766 , H03F3/45991 , H03F2203/45418 , H03F2203/45424 , H03F2203/45574
摘要： A balanced type DDA 1 is combined with a single end type DDA 2 to form a differential amplifier circuit 3 which is a balanced type DDA- The balanced type DDA 1 has four input terminals VPP, VPN, VNN and VNP which are input terminals of two differential input stages, and two output terminals VoutP and VoutN which are output terminals of two output stages. These terminals are four input terminals and two output terminals of the differential amplifier circuit 3. The single end type DDA 2 has four input terminals, which are input terminals of two differential input stages and which are connected to the four input terminals of the differential amplifier circuit 3, respectively. The single end type DDA 2 also has an output terminal vout of one output stage, which serves as a control output terminal for the feedback control of the differential amplifier circuit 3. By the negative feedback of the signal of the control output terminal Vout, a virtual short-circuit can be established between two input terminals of each differential input stages, so that it is possible to reduce distortion without reducing gains.

2. 发明公开

EP1184989A3 DA converter 审中-公开
标题翻译： DA转换器
公开(公告)号：EP1184989A3
公开(公告)日：2004-07-21
申请号：EP01120619.0
申请日：2001-08-29
申请人： Kabushiki Kaisha Toshiba
发明人： Ishii, Hirotomo
IPC分类号： H03M1/76 , H03M1/68
CPC分类号： H03M1/682 , H03M1/765
摘要： Considering that MOS transistors on a common integrated circuit can be controlled in resistance ratio between them with a relatively high accuracy, a DA converter is improved in accuracy by replacing resistors required to be accurate with MOS transistors without inviting an increase of the chip area. That is, between a high potential reference voltage (VrefH) and a low potential reference voltage (VrefL), a plurality of MOS transistors (M1~MN) are connected in series such that they normally operate in a linear region and at least one turns OFF during power-down periods of the DA converter. One of partial voltages (V1~VN) of these MOS transistors (M1~MN) is selected by switches (SW1~SWN) controlled in ON-OFF motion by a control signal obtained by decoding a digital input (12) in a decoder (11), and delivered to an analog output (13), such that an analog value corresponding to the digital data given from the digital input (12) is sent out from the analog output 13.
摘要翻译：考虑到公共集成电路上的MOS晶体管可以以相对高的精确度来控制它们之间的电阻比，通过用MOS晶体管替换需要精确的电阻而不会增加芯片面积，DA转换器的准确度得到提高。也就是说，在高电位参考电压（VrefH）和低电位参考电压（VrefL）之间，多个MOS晶体管（M1〜MN）串联连接，使得它们正常地工作在线性区域并且至少一个匝在DA转换器的掉电期间关闭。这些MOS晶体管（M1〜MN）的部分电压（V1〜VN）中的一个由开关（SW1〜SWN）选择，开关SW1〜SWN由解码器中的数字输入（12）并且被传递到模拟输出（13），使得与从数字输入（12）给出的数字数据相对应的模拟值从模拟输出13被发出。

3. 发明公开

EP1083655A2 Amplifier circuit 审中-公开
标题翻译： Verstärkungsschaltung
公开(公告)号：EP1083655A2
公开(公告)日：2001-03-14
申请号：EP00119379.6
申请日：2000-09-11
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Ishii, Hirotomo , Czarnul, Zdzislaw
IPC分类号： H03F3/45
CPC分类号： H03F3/45183 , H03F3/45475 , H03F3/45659 , H03F3/45766 , H03F3/45991 , H03F2203/45418 , H03F2203/45424 , H03F2203/45574
摘要： A balanced type DDA 1 is combined with a single end type DDA 2 to form a differential amplifier circuit 3 which is a balanced type DDA- The balanced type DDA 1 has four input terminals VPP, VPN, VNN and VNP which are input terminals of two differential input stages, and two output terminals VoutP and VoutN which are output terminals of two output stages. These terminals are four input terminals and two output terminals of the differential amplifier circuit 3. The single end type DDA 2 has four input terminals, which are input terminals of two differential input stages and which are connected to the four input terminals of the differential amplifier circuit 3, respectively. The single end type DDA 2 also has an output terminal vout of one output stage, which serves as a control output terminal for the feedback control of the differential amplifier circuit 3. By the negative feedback of the signal of the control output terminal Vout, a virtual short-circuit can be established between two input terminals of each differential input stages, so that it is possible to reduce distortion without reducing gains.
摘要翻译：平衡型DDA 1与单端DDA2组合形成平衡型DDA的差分放大电路3。平衡型DDA 1具有四个输入端子VPP，VPN，VNN和VNP，输入端为二差分输入级，以及作为两个输出级的输出端子的两个输出端子VoutP和VoutN。这些端子是差分放大器电路3的四个输入端子和两个输出端子。单端型DDA2具有四个输入端子，它们是两个差分输入级的输入端子，它们连接到差分放大器的四个输入端子电路3。单端型DDA2还具有一个输出级的输出端子vout，其作为用于差分放大器电路3的反馈控制的控制输出端子。通过控制输出端子Vout的信号的负反馈，a 可以在每个差分输入级的两个输入端之间建立虚拟短路，使得可以在不减少增益的情况下减少失真。

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