专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US08108593B2 Memory system for flushing and relocating data 失效
标题翻译：用于冲洗和重新定位数据的内存系统
公开(公告)号：US08108593B2
公开(公告)日：2012-01-31
申请号：US12396104
申请日：2009-03-02
申请人： Junji Yano , Hidenori Matsuzaki , Kosuke Hatsuda , Wataru Okamoto , Ryoichi Kato
发明人： Junji Yano , Hidenori Matsuzaki , Kosuke Hatsuda , Wataru Okamoto , Ryoichi Kato
IPC分类号： G06F13/10
CPC分类号： G06F12/0246 , G06F12/0866 , G06F2212/7203
摘要： A system includes: a first input buffer that functions as an input buffer for a third storing area; and a second input buffer that functions as an input buffer for the third storing area and that separately stores data with a high update frequency for the third storing area. In the system, a plurality of data written in a first storing area or a second storing area are flushed to the first input buffer in units of logical blocks. Also, a plurality of data written in the first input buffer are relocated to the third storing area in units of logical blocks.
摘要翻译：一种系统包括：用作第三存储区域的输入缓冲器的第一输入缓冲器; 以及第二输入缓冲器，其用作第三存储区域的输入缓冲器，并且分别存储具有用于第三存储区域的较高更新频率的数据。在系统中，以逻辑块为单位将写入第一存储区域或第二存储区域的多个数据刷新到第一输入缓冲器。此外，写入第一输入缓冲器的多个数据以逻辑块为单位重新定位到第三存储区域。

2. 发明申请

US20090240871A1 MEMORY SYSTEM 失效
标题翻译：记忆系统
公开(公告)号：US20090240871A1
公开(公告)日：2009-09-24
申请号：US12396104
申请日：2009-03-02
申请人： Junji Yano , Hidenori Matsuzaki , Kosuke Hatsuda , Wataru Okamoto , Ryoichi Kato
发明人： Junji Yano , Hidenori Matsuzaki , Kosuke Hatsuda , Wataru Okamoto , Ryoichi Kato
IPC分类号： G06F12/00 , G06F12/02 , G06F12/08
CPC分类号： G06F12/0246 , G06F12/0866 , G06F2212/7203
摘要： A system includes: a first input buffer that functions as an input buffer for a third storing area; and a second input buffer that functions as an input buffer for the third storing area and that separately stores data with a high update frequency for the third storing area. In the system, a plurality of data written in a first storing area or a second storing area are flushed to the first input buffer in units of logical blocks. Also, a plurality of data written in the first input buffer are relocated to the third storing area in units of logical blocks.
摘要翻译：一种系统包括：用作第三存储区域的输入缓冲器的第一输入缓冲器; 以及第二输入缓冲器，其用作第三存储区域的输入缓冲器，并且分别存储具有用于第三存储区域的较高更新频率的数据。在系统中，以逻辑块为单位将写入第一存储区域或第二存储区域的多个数据刷新到第一输入缓冲器。此外，写入第一输入缓冲器的多个数据以逻辑块为单位重新定位到第三存储区域。

3. 发明授权

US08745313B2 Memory system and method for controlling a nonvolatile semiconductor memory 有权
标题翻译：用于控制非易失性半导体存储器的存储器系统和方法
公开(公告)号：US08745313B2
公开(公告)日：2014-06-03
申请号：US12394632
申请日：2009-02-27
申请人： Junji Yano , Kosuke Hatsuda , Hidenori Matsuzaki , Wataru Okamoto
发明人： Junji Yano , Kosuke Hatsuda , Hidenori Matsuzaki , Wataru Okamoto
IPC分类号： G06F12/00
CPC分类号： G06F3/061 , G06F3/065 , G06F3/0661 , G06F3/0679 , G06F12/0246 , G06F2206/1014 , G06F2212/7203 , G06F2212/7205 , G11C11/5628 , G11C16/0483 , G11C16/102 , G11C2211/5643 , G11C2211/5646
摘要： A memory system includes a nonvolatile semiconductor memory having blocks, the block being data erasing unit; and a controller configured to execute; an update processing for; writing superseding data in a block, the superseding data being treated as valid data; and invalidating superseded data having the same logical address as the superseding data, the superseded data being treated as invalid data; and a compaction processing for; retrieving blocks having invalid data using a management tablet the management table managing blocks in a linked list format for each number of valid data included in the block; selecting a compaction source block having at least one valid data from the retrieved blocks; copying a plurality of valid data included in the compaction source blocks into a compaction target block; invalidating the plurality of valid data in the compaction source blocks; and releasing the compaction source blocks in which all data are invalidated.
摘要翻译：存储器系统包括具有块的非易失性半导体存储器，该块是数据擦除单元; 以及控制器，被配置为执行; 更新处理; 在块中写入替代数据，替代数据被视为有效数据; 并且使具有与取代数据相同的逻辑地址的替代数据无效，所取代的数据被视为无效数据; 和压实处理; 使用管理数据库检索具有无效数据的块，所述管理表管理所述块中包括的每个数量的有效数据的链接列表格式的块; 从所检索的块中选择具有至少一个有效数据的压缩源块; 将压缩源块中包括的多个有效数据复制到压缩目标块中; 使压缩源块中的多个有效数据无效; 并释放其中所有数据无效的压缩源块。

4. 发明申请

US20090248964A1 MEMORY SYSTEM AND METHOD FOR CONTROLLING A NONVOLATILE SEMICONDUCTOR MEMORY 有权
标题翻译：用于控制非易失性半导体存储器的存储器系统和方法
公开(公告)号：US20090248964A1
公开(公告)日：2009-10-01
申请号：US12394632
申请日：2009-02-27
申请人： Junji Yano , Kosuke Hatsuda , Hidenori Matsuzaki , Wataru Okamoto
发明人： Junji Yano , Kosuke Hatsuda , Hidenori Matsuzaki , Wataru Okamoto
IPC分类号： G06F12/00 , G06F12/02
CPC分类号： G06F3/061 , G06F3/065 , G06F3/0661 , G06F3/0679 , G06F12/0246 , G06F2206/1014 , G06F2212/7203 , G06F2212/7205 , G11C11/5628 , G11C16/0483 , G11C16/102 , G11C2211/5643 , G11C2211/5646
摘要： A memory system includes a nonvolatile semiconductor memory having blocks, the block being data erasing unit; and a controller configured to execute; an update processing for; writing superseding data in a block, the superseding data being treated as valid data; and invalidating superseded data having the same logical address as the superseding data, the superseded data being treated as invalid data; and a compaction processing for; retrieving blocks having invalid data using a management tablet the management table managing blocks in a linked list format for each number of valid data included in the block; selecting a compaction source block having at least one valid data from the retrieved blocks; copying a plurality of valid data included in the compaction source blocks into a compaction target block; invalidating the plurality of valid data in the compaction source blocks; and releasing the compaction source blocks in which all data are invalidated.
摘要翻译：存储器系统包括具有块的非易失性半导体存储器，该块是数据擦除单元; 以及控制器，被配置为执行; 更新处理; 在块中写入替代数据，替代数据被视为有效数据; 并且使具有与取代数据相同的逻辑地址的替代数据无效，所取代的数据被视为无效数据; 和压实处理; 使用管理数据库检索具有无效数据的块，所述管理表管理所述块中包括的每个数量的有效数据的链接列表格式的块; 从所检索的块中选择具有至少一个有效数据的压缩源块; 将压缩源块中包括的多个有效数据复制到压缩目标块中; 使压缩源块中的多个有效数据无效; 并释放其中所有数据无效的压缩源块。

5. 发明授权

US08938586B2 Memory system with flush processing from volatile memory to nonvolatile memory utilizing management tables and different management units 有权
标题翻译：使用管理表和不同管理单元从易失性存储器到非易失性存储器的闪存处理的存储器系统
公开(公告)号：US08938586B2
公开(公告)日：2015-01-20
申请号：US12529228
申请日：2009-02-10
申请人： Junji Yano , Kosuke Hatsuda , Hidenori Matsuzaki , Ryoichi Kato
发明人： Junji Yano , Kosuke Hatsuda , Hidenori Matsuzaki , Ryoichi Kato
IPC分类号： G06F12/02 , G06F12/08
CPC分类号： G06F12/0246 , G06F2212/7207
摘要： A memory system includes: a cache memory, a nonvolatile semiconductor memory, and a controller. The controller includes a plurality of management tables that manage data stored in the cache memory and the nonvolatile semiconductor memory using a cluster unit and a track unit. The controller performs data flushing processing from the cache memory to the nonvolatile semiconductor memory when the number of track units registered in the cache memory exceeds a predetermined threshold. Data may be flushed to the nonvolatile memory in different size data units such as a cluster or a track. Data flushing processing may also be performed if a last free way is used when data writing processing is performed on the cache memory managed in a set associative system. The nonvolatile semiconductor memory can be a NAND flash memory.
摘要翻译：存储器系统包括：高速缓冲存储器，非易失性半导体存储器和控制器。控制器包括多个管理表，其管理存储在高速缓冲存储器中的数据和使用集群单元和轨道单元的非易失性半导体存储器。当登记在高速缓冲存储器中的轨道单元的数量超过预定阈值时，控制器执行从高速缓冲存储器到非易失性半导体存储器的数据刷新处理。可以将数据刷新到不同大小的数据单元（例如，群集或轨道）中的非易失性存储器。如果在对集合关联系统中管理的高速缓冲存储器上执行数据写入处理时，如果使用最后的自由方式，则也可以执行数据刷新处理。非易失性半导体存储器可以是NAND闪存。

6. 发明申请

US20110307667A1 MEMORY SYSTEM 有权
标题翻译：记忆系统
公开(公告)号：US20110307667A1
公开(公告)日：2011-12-15
申请号：US12529228
申请日：2009-02-10
申请人： Junji Yano , Kosuke Hatsuda , Hidenori Matsuzaki , Ryoichi Kato
发明人： Junji Yano , Kosuke Hatsuda , Hidenori Matsuzaki , Ryoichi Kato
IPC分类号： G06F12/08
CPC分类号： G06F12/0246 , G06F2212/7207
摘要： A memory system according to an embodiment of the present invention comprises: a first management table that manages addresses concerning the data written in a first storing area; and a second management table that manages, in an address unit of a second management unit, information indicating temporal order of the data stored in the first storing area and manages, for each of addresses in a second management unit, number-of-valid-data information indicating a number of data in the first management unit included in the addresses in the second management unit.
摘要翻译：根据本发明的实施例的存储器系统包括：第一管理表，其管理与第一存储区域中写入的数据有关的地址; 以及第二管理表，其在第二管理单元的地址单元中管理指示存储在第一存储区域中的数据的时间顺序的信息，并且对于第二管理单元中的每个地址管理有效 - 指示包括在第二管理单元中的地址中的第一管理单元中的数据的数量的数据信息。

7. 发明授权

US08554984B2 Memory system 有权
标题翻译：内存系统
公开(公告)号：US08554984B2
公开(公告)日：2013-10-08
申请号：US12529127
申请日：2009-02-10
申请人： Junji Yano , Kosuke Hatsuda , Hidenori Matsuzaki
发明人： Junji Yano , Kosuke Hatsuda , Hidenori Matsuzaki
IPC分类号： G06F12/00
CPC分类号： G06F12/0246 , G06F12/0804 , G06F2212/1016 , G06F2212/1044 , G06F2212/1048 , G06F2212/7201 , G06F2212/7209
摘要： A memory system in which speed of processing for searching through management tables is increased by providing a forward lookup table for searching for, respectively in track and cluster units, from a logical address, a storage device position where data corresponds to the logical address, and a reverse lookup table for searching for, from a position of the storage device, a logical address stored in the position. These forward and reverse lookup tables are linked.
摘要翻译：通过提供从逻辑地址，数据对应于逻辑地址的存储设备位置分别在轨道和群集单元中搜索的前向查找表来增加用于通过管理表搜索的处理速度的存储器系统，以及用于从存储设备的位置搜索存储在该位置中的逻辑地址的反向查找表。这些正向和反向查找表是链接的。

8. 发明授权

US08443133B2 Memory system storing management information and method of controlling same 有权
公开(公告)号：US08443133B2
公开(公告)日：2013-05-14
申请号：US12529145
申请日：2009-02-10
申请人： Junji Yano , Hidenori Matsuzaki , Kosuke Hatsuda
发明人： Junji Yano , Hidenori Matsuzaki , Kosuke Hatsuda
IPC分类号： G06F12/00
CPC分类号： G06F3/0619 , G06F3/0647 , G06F3/065 , G06F3/0652 , G06F3/0685 , G06F11/1456 , G06F11/1469 , G06F11/1471 , G06F12/0246 , G06F2201/84 , G06F2212/7201 , G06F2212/7207 , G11C7/20 , G11C11/5628 , G11C16/0483 , G11C16/10 , G11C16/105
摘要： A memory system includes a management-information restoring unit. The management-information restoring unit determines whether a short break has occurred referring to a pre-log or a post-log in a NAND memory. The management-information restoring unit determines that a short break has occurred when the pre-log or the post-log is present in the NAND memory. In that case, the management-information restoring unit determines timing of occurrence of the short break, and, after selecting a pre-log or a post-log used for restoration, performs restoration of the management information reflecting these logs on a snapshot. Thereafter, the management-information restoring unit applies recovery processing to all write-once blocks in the NAND memory, takes the snapshot again, and opens the snapshot and the logs in the past.

9. 发明授权

US08429333B2 Memory system with efficient data search processing 失效
公开(公告)号：US08429333B2
公开(公告)日：2013-04-23
申请号：US12394582
申请日：2009-02-27
申请人： Junji Yano , Kosuke Hatsuda , Hidenori Matsuzaki
发明人： Junji Yano , Kosuke Hatsuda , Hidenori Matsuzaki
IPC分类号： G06F12/00
CPC分类号： G06F12/0246 , G06F12/0804 , G06F12/0866 , G06F2212/7201
摘要： A controller includes an identification information management table that manages identification information indicating, for each of addresses in second-management unit, whether one or more data in first management unit belonging to the addresses is stored in the second or the third storing area. When the controller executes a process of flushing data from the first storing area to the second storing area or the third storing area, the controller updates the identification information in the identification information management table. The controller executes a process of reading data from the second storing area or the third storing area by referring to the identification information. As a result, the speed of searches conducted in the management table is increased.

10. 发明授权

US08407402B2 Memory system and data erasing method therefor 失效
标题翻译：内存系统和数据擦除方法
公开(公告)号：US08407402B2
公开(公告)日：2013-03-26
申请号：US12394720
申请日：2009-02-27
申请人： Junji Yano , Hidenori Matsuzaki , Kosuke Hatsuda
发明人： Junji Yano , Hidenori Matsuzaki , Kosuke Hatsuda
IPC分类号： G06F13/10
CPC分类号： G06F12/0246 , G06F2212/7203 , G06F2212/7205 , G06F2212/7207
摘要： A memory system includes a management table group in which management information including storage positions of data stored in a first storing area and a second storing area is stored. The management table group is stored in the second storing area. A controller performs data transfer between a host apparatus and the second storing area via the first storing area and performs management of the data in the first and second storing areas based on the management table group while updating the management table group expanded in the first storing area. The second storing area can store data associated with a first logical address area accessible from the host apparatus and data associated with a second logical address area accessible from the host apparatus, and the controller receives an erasing command from the host apparatus, collects the data associated with the second logical address area in a predetermined area in the second storing area, and then initializes the management table group.
摘要翻译：存储器系统包括管理表组，其中存储包括存储在第一存储区域和第二存储区域中的数据的存储位置的管理信息。管理表组存储在第二存储区域中。控制器经由第一存储区域在主机设备和第二存储区域之间执行数据传送，并且在更新在第一存储区域中扩展的管理表组的同时，基于管理表组来执行第一和第二存储区域中的数据的管理。第二存储区域可以存储与从主机设备可访问的第一逻辑地址区域相关联的数据和与从主机设备可访问的第二逻辑地址区域相关联的数据，并且控制器从主机设备接收擦除命令，收集相关联的数据第二逻辑地址区域在第二存储区域中的预定区域中，然后初始化管理表组。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式