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1. 发明申请

US20110053329A1 Semiconductor device including a gate electrode of lower electrial resistance and method of manufacturing the same 审中-公开
标题翻译：包括具有较低电阻率的栅电极的半导体器件及其制造方法
公开(公告)号：US20110053329A1
公开(公告)日：2011-03-03
申请号：US12926245
申请日：2010-11-04
申请人： Jung-Hun Seo , Hyun-Young Kim , Jin-Gi Hong
发明人： Jung-Hun Seo , Hyun-Young Kim , Jin-Gi Hong
IPC分类号： H01L21/336 , H01L21/4763
CPC分类号： H01L21/28061 , H01L29/4941
摘要： A semiconductor device may include a gate insulating layer on a semiconductor substrate, a polysilicon layer doped with impurities on the gate insulating layer, an interface reaction preventing layer on the polysilicon layer, a barrier layer on the interface reaction preventing layer, and a conductive metal layer on the barrier layer. The interface reaction preventing layer may reduce or prevent the occurrence of a chemical interfacial reaction with the barrier layer, and the barrier layer may reduce or prevent the diffusion of impurities doped to the polysilicon layer. The interface reaction preventing layer may include a metal-rich metal silicide having a metal mole fraction greater than a silicon mole fraction, so that the interface reaction preventing layer may reduce or prevent the dissociation of the barrier layer at higher temperatures. Thus, a barrier characteristic of a poly-metal gate electrode may be improved and surface agglomerations may be reduced or prevented.
摘要翻译：半导体器件可以包括在半导体衬底上的栅极绝缘层，在栅极绝缘层上掺杂有杂质的多晶硅层，多晶硅层上的界面反应防止层，界面反应防止层上的阻挡层和导电金属层在阻挡层上。界面反应防止层可以减少或防止与阻挡层的化学界面反应的发生，并且阻挡层可以减少或防止掺杂到多晶硅层的杂质的扩散。界面反应防止层可以包括具有大于硅摩尔分数的金属摩尔分数的富金属的金属硅化物，使得界面反应防止层可以降低或防止在较高温度下阻挡层的解离。因此，可以改善多金属栅电极的阻挡特性，并且可以减少或防止表面团聚。

2. 发明申请

US20080048274A1 Semiconductor device including a gate electrode of lower electrical resistance and method of manufacturing the same 审中-公开
标题翻译：包括具有较低电阻的栅电极的半导体器件及其制造方法
公开(公告)号：US20080048274A1
公开(公告)日：2008-02-28
申请号：US11878096
申请日：2007-07-20
申请人： Jung-Hun Seo , Hyun-Young Kim , Jin-Gi Hong
发明人： Jung-Hun Seo , Hyun-Young Kim , Jin-Gi Hong
IPC分类号： H01L29/78 , H01L21/4763
CPC分类号： H01L21/28061 , H01L29/4941
摘要： A semiconductor device may include a gate insulating layer on a semiconductor substrate, a polysilicon layer doped with impurities on the gate insulating layer, an interface reaction preventing layer on the polysilicon layer, a barrier layer on the interface reaction preventing layer, and a conductive metal layer on the barrier layer. The interface reaction preventing layer may reduce or prevent the occurrence of a chemical interfacial reaction with the barrier layer, and the barrier layer may reduce or prevent the diffusion of impurities doped to the polysilicon layer. The interface reaction preventing layer may include a metal-rich metal silicide having a metal mole fraction greater than a silicon mole fraction, so that the interface reaction preventing layer may reduce or prevent the dissociation of the barrier layer at higher temperatures. Thus, a barrier characteristic of a poly-metal gate electrode may be improved and surface agglomerations may be reduced or prevented.
摘要翻译：半导体器件可以包括在半导体衬底上的栅极绝缘层，在栅极绝缘层上掺杂有杂质的多晶硅层，多晶硅层上的界面反应防止层，界面反应防止层上的阻挡层和导电金属层在阻挡层上。界面反应防止层可以减少或防止与阻挡层的化学界面反应的发生，并且阻挡层可以减少或防止掺杂到多晶硅层的杂质的扩散。界面反应防止层可以包括具有大于硅摩尔分数的金属摩尔分数的富金属的金属硅化物，使得界面反应防止层可以降低或防止在较高温度下阻挡层的解离。因此，可以改善多金属栅电极的阻挡特性，并且可以减少或防止表面团聚。

3. 发明申请

US20060292810A1 Method of manufacturing a capacitor 审中-公开
标题翻译：制造电容器的方法
公开(公告)号：US20060292810A1
公开(公告)日：2006-12-28
申请号：US11448769
申请日：2006-06-08
申请人： Jung-Hun Seo , Hyun-Young Kim , Young-Wook Park , Jin-Gi Hong , Kun-Sang Park , Jin-Ho Kim , Kyung-Bum Koo
发明人： Jung-Hun Seo , Hyun-Young Kim , Young-Wook Park , Jin-Gi Hong , Kun-Sang Park , Jin-Ho Kim , Kyung-Bum Koo
IPC分类号： H01L21/20
CPC分类号： H01L28/91 , H01L21/28562 , H01L27/10817 , H01L27/10852
摘要： In methods of manufacturing capacitors, a first metal compound may be deposited on a substrate using first and second source gases. The first and the second source gases may be provided onto the substrate by a first flow rate ratio in which a deposition rate of the first metal compound by surface reaction between the source gases is higher than that by mass transfer between the source gases. A second metal compound may be deposited on the first metal compound and undesired materials may be removed by providing the source gases with a second flow rate ratio different from the first flow rate ratio. Depositing the first and the second metal compounds may be repeated to form a lower electrode. A dielectric layer and an upper electrode may be formed on the lower electrode. Accordingly, permeation of an etching liquid or gas may be reduced during an etching process.
摘要翻译：在制造电容器的方法中，可以使用第一和第二源气体在基板上沉积第一金属化合物。可以通过第一流量比将第一和第二源气体提供到基底上，其中通过源气体之间的表面反应使第一金属化合物的沉积速率高于源气体之间的质量传递的沉积速率。可以将第二金属化合物沉积在第一金属化合物上，并且可以通过提供不同于第一流速比的第二流量比来提供源气体来除去不需要的物质。可以重复沉积第一和第二金属化合物以形成下电极。电介质层和上电极可以形成在下电极上。因此，在蚀刻过程中可能会减少蚀刻液体或气体的渗透。

4. 发明授权

US08988640B2 Display device and fabrication method of the same 有权
标题翻译：显示装置及其制造方法相同
公开(公告)号：US08988640B2
公开(公告)日：2015-03-24
申请号：US13019876
申请日：2011-02-02
申请人： Hyun-Young Kim , Joo-Sun Yoon , Jin-Yup Kim
发明人： Hyun-Young Kim , Joo-Sun Yoon , Jin-Yup Kim
IPC分类号： G02F1/1333 , G02F1/136 , H01L29/49 , G02F1/1368 , H01L29/423 , H01L27/12
CPC分类号： H01L29/4908 , G02F1/1368 , H01L27/1255 , H01L29/42384
摘要： The embodiment relates to a display device having an improved aperture ratio and capacitance, and a fabrication method of the display device, in which the display device may include a thin film transistor, which includes: an active layer, a gate electrode, a source electrode electrically connected to the active layer, a drain electrode electrically connected to the active layer, and a gate insulating material formed between the active layer and the gate electrode, where the gate insulating material includes a first layer, a second layer and a third layer, where the second layer has a thickness between about 0.1 to about 1.5 times a thickness of the first layer, and where the third layer has a thickness between about 2 to about 12 times the thickness of the second layer.
摘要翻译：该实施例涉及具有改善的开口率和电容的显示装置，以及显示装置的制造方法，其中显示装置可以包括薄膜晶体管，其包括：有源层，栅电极，源电极电连接到有源层，电连接到有源层的漏电极和形成在有源层和栅电极之间的栅极绝缘材料，其中栅极绝缘材料包括第一层，第二层和第三层，其中所述第二层的厚度为所述第一层的厚度的约0.1至约1.5倍，并且其中所述第三层的厚度为所述第二层的厚度的约2至约12倍。

5. 发明授权

US08124978B2 Capacitor and method of manufacturing the same 有权
标题翻译：电容器及其制造方法
公开(公告)号：US08124978B2
公开(公告)日：2012-02-28
申请号：US12659553
申请日：2010-03-12
申请人： Hyun-Young Kim , Rak-Hwan Kim , Young-Joo Cho , Won-sik Shin
发明人： Hyun-Young Kim , Rak-Hwan Kim , Young-Joo Cho , Won-sik Shin
IPC分类号： H01L29/12 , H01L29/786 , H01L27/108 , H01L29/94
CPC分类号： H01L28/91 , H01L27/0207 , H01L27/10852
摘要： A capacitor and method of manufacturing the same include an insulating interlayer, a lower electrode, a protection structure, a dielectric layer and an upper electrode. The insulating interlayer may include a conductive pattern formed on a substrate. The lower electrode may be electrically connected to the conductive pattern. The protection structure may be formed on an outer sidewall of the cylindrical lower electrode and on the insulating interlayer.
摘要翻译：电容器及其制造方法包括绝缘中间层，下电极，保护结构，电介质层和上电极。绝缘中间层可以包括形成在基板上的导电图案。下电极可以电连接到导电图案。保护结构可以形成在圆柱形下电极的外侧壁上和绝缘中间层上。

6. 发明申请

US20100188795A1 Capacitor and method of manufacturing the same 有权
标题翻译：电容器及其制造方法
公开(公告)号：US20100188795A1
公开(公告)日：2010-07-29
申请号：US12659553
申请日：2010-03-12
申请人： Hyun-Young Kim , Rak-Hwan Kim , Young-Joo Cho , Won-sik Shin
发明人： Hyun-Young Kim , Rak-Hwan Kim , Young-Joo Cho , Won-sik Shin
IPC分类号： H01G4/002
CPC分类号： H01L28/91 , H01L27/0207 , H01L27/10852
摘要： A capacitor and method of manufacturing the same include an insulating interlayer, a lower electrode, a protection structure, a dielectric layer and an upper electrode. The insulating interlayer may include a conductive pattern formed on a substrate. The lower electrode may be electrically connected to the conductive pattern. The protection structure may be formed on an outer sidewall of the cylindrical lower electrode and on the insulating interlayer.
摘要翻译：电容器及其制造方法包括绝缘中间层，下电极，保护结构，电介质层和上电极。绝缘中间层可以包括形成在基板上的导电图案。下电极可以电连接到导电图案。保护结构可以形成在圆柱形下电极的外侧壁上和绝缘中间层上。

7. 发明授权

US07709342B2 Capacitor and method of manufacturing the same 有权
公开(公告)号：US07709342B2
公开(公告)日：2010-05-04
申请号：US11254851
申请日：2005-10-21
申请人： Hyun-Young Kim , Rak-Hwan Kim , Young-Joo Cho , Won-sik Shin
发明人： Hyun-Young Kim , Rak-Hwan Kim , Young-Joo Cho , Won-sik Shin
IPC分类号： H01L21/20
CPC分类号： H01L28/91 , H01L27/0207 , H01L27/10852
摘要： A capacitor and method of manufacturing the same include an insulating interlayer, a lower electrode, a protection structure, a dielectric layer and an upper electrode. The insulating interlayer may include a conductive pattern formed on a substrate. The lower electrode may be electrically connected to the conductive pattern. The protection structure may be formed on an outer sidewall of the cylindrical lower electrode and on the insulating interlayer.

8. 发明授权

US07364967B2 Methods of forming storage capacitors for semiconductor devices 有权
标题翻译：形成半导体器件的储存电容器的方法
公开(公告)号：US07364967B2
公开(公告)日：2008-04-29
申请号：US11266520
申请日：2005-11-03
申请人： Rak-Hwan Kim , Young-Joo Cho , Sung-Tae Kim , In-Sun Park , Hyeon-Deok Lee , Hyun-Suk Lee , Jung-Hee Chung , Hyun-Young Kim , Hyun-Seok Lim
发明人： Rak-Hwan Kim , Young-Joo Cho , Sung-Tae Kim , In-Sun Park , Hyeon-Deok Lee , Hyun-Suk Lee , Jung-Hee Chung , Hyun-Young Kim , Hyun-Seok Lim
IPC分类号： H01L21/8242
CPC分类号： H01L28/91 , H01L27/10817 , H01L27/10852 , H01L28/75
摘要： Methods of forming a storage capacitor include forming an interlayer insulation layer having an opening therethrough on a semiconductor substrate, forming a contact plug in the opening, forming a molding oxide layer on the interlayer insulation layer and the contact plug, selectively removing portions of the molding oxide layer to form a recess above the contact plug, forming a titanium layer on a bottom surface and side surfaces of the recess, forming a titanium nitride layer on the titanium layer, and forming a titanium oxide nitride layer on the titanium nitride layer. A storage capacitor includes a semiconductor substrate, an interlayer insulation layer having a contact plug therein on the substrate, and a storage electrode on the contact plug including a titanium silicide layer, a titanium nitride layer on the titanium silicide layer, and a titanium oxide nitride layer on the titanium nitride layer.
摘要翻译：形成存储电容器的方法包括在半导体衬底上形成具有开口的层间绝缘层，在开口中形成接触插塞，在层间绝缘层和接触插塞上形成模压氧化层，选择性地去除模制件的部分在接触塞上方形成凹部，在凹部的底面和侧面形成钛层，在钛层上形成氮化钛层，在氮化钛层上形成氮化钛层。存储电容器包括半导体衬底，在衬底上具有接触插塞的层间绝缘层，以及包括钛硅化物层的接触插塞上的存储电极，硅化钛层上的氮化钛层和氧化钛氮化物层在氮化钛层上。

9. 发明申请

US20060290838A1 Display panel and method of manufacture 有权
标题翻译：显示面板及制造方法
公开(公告)号：US20060290838A1
公开(公告)日：2006-12-28
申请号：US11476316
申请日：2006-06-27
申请人： Sung-In Ro , Sang-Woo Park , Dae-Cheol Kim , Hyun-Young Kim
发明人： Sung-In Ro , Sang-Woo Park , Dae-Cheol Kim , Hyun-Young Kim
IPC分类号： G02F1/1333
CPC分类号： G02F1/13394
摘要： A display panel includes a first substrate, a second substrate, a connecting member and a strength-reinforcing member. The second substrate faces the first substrate, and includes a display area and a peripheral area surrounding the display area. The connecting member is disposed in the peripheral area to electrically connect the first substrate and the second substrate. The strength-reinforcing member protrudes from the second substrate and is disposed inside the connecting member. Thus, the strength-reinforcing member increases strength of the connecting member and stabilizes electrical connection between the first and second substrates, thereby improving display quality of a display device having the display panel.
摘要翻译：显示面板包括第一基板，第二基板，连接部件和强度增强部件。第二基板面向第一基板，并且包括显示区域和围绕显示区域的周边区域。连接构件设置在周边区域中以电连接第一基板和第二基板。强化部件从第二基板突出并设置在连接部件的内部。因此，强度增强部件提高连接部件的强度，并稳定第一和第二基板之间的电连接，从而提高具有显示面板的显示装置的显示质量。

10. 发明申请

US20060086952A1 Capacitor and method of manufacturing the same 有权
标题翻译：电容器及其制造方法
公开(公告)号：US20060086952A1
公开(公告)日：2006-04-27
申请号：US11254851
申请日：2005-10-21
申请人： Hyun-Young Kim , Rak-Hwan Kim , Young-Joo Cho , Won-sik Shin
发明人： Hyun-Young Kim , Rak-Hwan Kim , Young-Joo Cho , Won-sik Shin
IPC分类号： H01L27/10
CPC分类号： H01L28/91 , H01L27/0207 , H01L27/10852
摘要： A capacitor and method of manufacturing the same include an insulating interlayer, a lower electrode, a protection structure, a dielectric layer and an upper electrode. The insulating interlayer may include a conductive pattern formed on a substrate. The lower electrode may be electrically connected to the conductive pattern. The protection structure may be formed on an outer sidewall of the cylindrical lower electrode and on the insulating interlayer.
摘要翻译：电容器及其制造方法包括绝缘中间层，下电极，保护结构，电介质层和上电极。绝缘中间层可以包括形成在基板上的导电图案。下电极可以电连接到导电图案。保护结构可以形成在圆柱形下电极的外侧壁上和绝缘中间层上。

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