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1. 发明授权

US07745932B2 Semiconductor package, semiconductor package module including the semiconductor package, and methods of fabricating the same 有权
标题翻译：包括半导体封装的半导体封装，半导体封装模块及其制造方法
公开(公告)号：US07745932B2
公开(公告)日：2010-06-29
申请号：US12153558
申请日：2008-05-21
申请人： Jun-young Ko , Dae-sang Chan , Jae-yong Park , Heui-seog Kim , Wha-su Sin
发明人： Jun-young Ko , Dae-sang Chan , Jae-yong Park , Heui-seog Kim , Wha-su Sin
IPC分类号： H01L23/48
CPC分类号： H01L23/49575 , H01L23/50 , H01L24/48 , H01L24/49 , H01L2224/05554 , H01L2224/32145 , H01L2224/48091 , H01L2224/48247 , H01L2224/49171 , H01L2224/73265 , H01L2225/06562 , H01L2924/00014 , H01L2924/10162 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： Provided are a semiconductor package and a semiconductor package module including the same. The semiconductor package may include a plurality of semiconductor chips, a plurality of leads connected to pads of the semiconductor chips and externally exposed, wherein the plurality of leads may be classified into a plurality of pin groups, and the plurality of semiconductor chips may be classified into a plurality of chip groups, and the pads of the semiconductor chips of like chip groups may be connected to the leads of like pin groups.
摘要翻译：提供半导体封装和包括该半导体封装的半导体封装模块。半导体封装可以包括多个半导体芯片，连接到半导体芯片的焊盘并从外部暴露的多个引线，其中多个引线可以分为多个引脚组，并且多个半导体芯片可以被分类成为多个芯片组，并且类似芯片组的半导体芯片的焊盘可以连接到类似引脚组的引线。

2. 发明申请

US20080315408A1 Semiconductor package, semiconductor package module including the semiconductor package, and methods of fabricating the same 有权
标题翻译：包括半导体封装的半导体封装，半导体封装模块及其制造方法
公开(公告)号：US20080315408A1
公开(公告)日：2008-12-25
申请号：US12153558
申请日：2008-05-21
申请人： Jun-young Ko , Dae-sang Chan , Jae-yong Park , Heui-seog Kim , Wha-su Sin
发明人： Jun-young Ko , Dae-sang Chan , Jae-yong Park , Heui-seog Kim , Wha-su Sin
IPC分类号： H01L23/498
CPC分类号： H01L23/49575 , H01L23/50 , H01L24/48 , H01L24/49 , H01L2224/05554 , H01L2224/32145 , H01L2224/48091 , H01L2224/48247 , H01L2224/49171 , H01L2224/73265 , H01L2225/06562 , H01L2924/00014 , H01L2924/10162 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： Provided are a semiconductor package and a semiconductor package module including the same. The semiconductor package may include a plurality of semiconductor chips, a plurality of leads connected to pads of the semiconductor chips and externally exposed, wherein the plurality of leads may be classified into a plurality of pin groups, and the plurality of semiconductor chips may be classified into a plurality of chip groups, and the pads of the semiconductor chips of like chip groups may be connected to the leads of like pin groups.
摘要翻译：提供半导体封装和包括该半导体封装的半导体封装模块。半导体封装可以包括多个半导体芯片，连接到半导体芯片的焊盘并从外部暴露的多个引线，其中多个引线可以分为多个引脚组，并且多个半导体芯片可以被分类成为多个芯片组，并且类似芯片组的半导体芯片的焊盘可以连接到类似引脚组的引线。

3. 发明申请

US20110110062A1 Stack-type semiconductor device having chips having different backside structure and electronic apparatus including the same 审中-公开
标题翻译：具有不同背面结构的芯片的堆叠式半导体器件和包括其的电子设备
公开(公告)号：US20110110062A1
公开(公告)日：2011-05-12
申请号：US12661012
申请日：2010-03-09
申请人： Jae-yong Park , Heui-Seog Kim , Jun-young Ko , Dae-sang Chan
发明人： Jae-yong Park , Heui-Seog Kim , Jun-young Ko , Dae-sang Chan
IPC分类号： H05K7/02 , H01L23/12
CPC分类号： H01L23/49575 , H01L23/26 , H01L23/3121 , H01L23/3128 , H01L23/481 , H01L24/45 , H01L24/48 , H01L24/73 , H01L25/0657 , H01L29/0657 , H01L2224/16145 , H01L2224/32145 , H01L2224/32225 , H01L2224/32245 , H01L2224/45144 , H01L2224/48091 , H01L2224/48145 , H01L2224/48147 , H01L2224/48227 , H01L2224/48247 , H01L2224/732 , H01L2224/73265 , H01L2225/0651 , H01L2225/06513 , H01L2225/06541 , H01L2225/06562 , H01L2225/06575 , H01L2924/01079 , H01L2924/10155 , H01L2924/181 , H01L2924/19041 , H01L2924/00014 , H01L2924/00012 , H01L2924/00
摘要： A stack-type semiconductor device including semiconductor chips having different backside structures and an electronic apparatus including the stack-type semiconductor device include: a base frame for a semiconductor device; a first semiconductor chip that is mounted on the base frame and has a bottom surface having a first surface roughness; and a second semiconductor chip that is mounted on the first semiconductor chip and has a bottom surface having a second surface roughness, wherein the second surface roughness is greater than the first surface roughness by 1.2 nm or more. The stack-type semiconductor device is manufactured to be thin while cracking of the first semiconductor chip is prevented. In addition, changes in data caused by charge loss resulting from diffusion of metal ions, which can occur when a stack-type semiconductor device is a memory device, is prevented.
摘要翻译：包括具有不同背面结构的半导体芯片的堆叠型半导体器件和包括堆叠型半导体器件的电子设备包括：半导体器件的基底框架; 第一半导体芯片，其安装在所述基座框架上并且具有第一表面粗糙度的底面; 以及第二半导体芯片，其安装在所述第一半导体芯片上并且具有第二表面粗糙度的底表面，其中所述第二表面粗糙度大于所述第一表面粗糙度为1.2nm以上。堆叠型半导体器件制造得很薄，同时防止了第一半导体芯片的破裂。此外，防止了当堆叠型半导体器件是存储器件时可能发生的由金属离子扩散引起的电荷损失导致的数据变化。

4. 发明申请

US20090278249A1 Printed circuit board and method thereof and a solder ball land and method thereof 有权
标题翻译：印刷电路板及其方法和焊球地及其方法
公开(公告)号：US20090278249A1
公开(公告)日：2009-11-12
申请号：US12458429
申请日：2009-07-13
申请人： Ky-hyun Jung , Heui-seog Kim , Sang-jun Kim , Wha-su Sin , Ho-geon Song , Jun-young Ko
发明人： Ky-hyun Jung , Heui-seog Kim , Sang-jun Kim , Wha-su Sin , Ho-geon Song , Jun-young Ko
IPC分类号： H01L23/498 , H05K1/11 , H01B5/00
CPC分类号： H05K3/282 , H01L21/4853 , H01L23/49816 , H01L23/49838 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/73 , H01L2224/05001 , H01L2224/05008 , H01L2224/05548 , H01L2224/05567 , H01L2224/16503 , H01L2224/32057 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/83102 , H01L2224/83385 , H01L2224/92125 , H01L2924/01006 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01077 , H01L2924/01079 , H01L2924/01082 , H01L2924/15311 , H01L2924/181 , H05K3/243 , H05K3/3457 , H05K2201/0391 , H05K2201/0989 , H01L2924/00014 , H01L2924/00012
摘要： A printed circuit board and method thereof and a solder ball land and method thereof. The example printed circuit board (PCB) may include a first solder ball land having a first surface treatment portion configured for a first type of resistance and a second solder ball land having a second surface treatment portion configured for a second type of resistance. The example solder ball land may include a first surface treatment portion configured for a first type of resistance and a second surface treatment portion configured for a second type of resistance. A first example method may include first treating a first surface of a first solder ball land to increase a first type of resistance and second treating a second surface of a second solder ball land to increase a second type of resistance other than the first type of resistance. A second example method may include first treating a solder ball land to increase a first type of resistance and second treating the solder ball land to increase a second type of resistance other than the first type of resistance.
摘要翻译：一种印刷电路板及其方法和焊球地及其方法。示例性印刷电路板（PCB）可以包括具有构造成用于第一类型电阻的第一表面处理部分的第一焊球焊盘和具有被配置为用于第二类型电阻的第二表面处理部分的第二焊球焊盘。示例性焊球焊盘可以包括被配置为用于第一类型电阻的第一表面处理部分和被配置用于第二类型电阻的第二表面处理部分。第一示例性方法可以包括首先处理第一焊球焊盘的第一表面以增加第一类型的电阻，并且第二处理第二焊球焊盘的第二表面以增加除第一类型电阻之外的第二类型的电阻。第二示例性方法可以包括首先处理焊球焊盘以增加第一类型的电阻，并且第二次处理焊球焊盘以增加除第一类型电阻之外的第二类型的电阻。

5. 发明授权

US07576438B2 Printed circuit board and method thereof and a solder ball land and method thereof 有权
公开(公告)号：US07576438B2
公开(公告)日：2009-08-18
申请号：US11486064
申请日：2006-07-14
申请人： Ky-hyun Jung , Heui-seog Kim , Sang-jun Kim , Wha-su Sin , Ho-geon Song , Jun-young Ko
发明人： Ky-hyun Jung , Heui-seog Kim , Sang-jun Kim , Wha-su Sin , Ho-geon Song , Jun-young Ko
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H05K3/282 , H01L21/4853 , H01L23/49816 , H01L23/49838 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/73 , H01L2224/05001 , H01L2224/05008 , H01L2224/05548 , H01L2224/05567 , H01L2224/16503 , H01L2224/32057 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/83102 , H01L2224/83385 , H01L2224/92125 , H01L2924/01006 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01077 , H01L2924/01079 , H01L2924/01082 , H01L2924/15311 , H01L2924/181 , H05K3/243 , H05K3/3457 , H05K2201/0391 , H05K2201/0989 , H01L2924/00014 , H01L2924/00012
摘要： A printed circuit board and method thereof and a solder ball land and method thereof. The example printed circuit board (PCB) may include a first solder ball land having a first surface treatment portion configured for a first type of resistance and a second solder ball land having a second surface treatment portion configured for a second type of resistance. The example solder ball land may include a first surface treatment portion configured for a first type of resistance and a second surface treatment portion configured for a second type of resistance. A first example method may include first treating a first surface of a first solder ball land to increase a first type of resistance and second treating a second surface of a second solder ball land to increase a second type of resistance other than the first type of resistance. A second example method may include first treating a solder ball land to increase a first type of resistance and second treating the solder ball land to increase a second type of resistance other than the first type of resistance.

6. 发明授权

US08039972B2 Printed circuit board and method thereof and a solder ball land and method thereof 有权
标题翻译：印刷电路板及其方法和焊球地及其方法
公开(公告)号：US08039972B2
公开(公告)日：2011-10-18
申请号：US12458429
申请日：2009-07-13
申请人： Ky-hyun Jung , Heui-seog Kim , Sang-jun Kim , Wha-su Sin , Ho-geon Song , Jun-young Ko
发明人： Ky-hyun Jung , Heui-seog Kim , Sang-jun Kim , Wha-su Sin , Ho-geon Song , Jun-young Ko
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H05K3/282 , H01L21/4853 , H01L23/49816 , H01L23/49838 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/73 , H01L2224/05001 , H01L2224/05008 , H01L2224/05548 , H01L2224/05567 , H01L2224/16503 , H01L2224/32057 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/83102 , H01L2224/83385 , H01L2224/92125 , H01L2924/01006 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01077 , H01L2924/01079 , H01L2924/01082 , H01L2924/15311 , H01L2924/181 , H05K3/243 , H05K3/3457 , H05K2201/0391 , H05K2201/0989 , H01L2924/00014 , H01L2924/00012
摘要： A printed circuit board and method thereof and a solder ball land and method thereof. The example printed circuit board (PCB) may include a first solder ball land having a first surface treatment portion configured for a first type of resistance and a second solder ball land having a second surface treatment portion configured for a second type of resistance. The example solder ball land may include a first surface treatment portion configured for a first type of resistance and a second surface treatment portion configured for a second type of resistance. A first example method may include first treating a first surface of a first solder ball land to increase a first type of resistance and second treating a second surface of a second solder ball land to increase a second type of resistance other than the first type of resistance. A second example method may include first treating a solder ball land to increase a first type of resistance and second treating the solder ball land to increase a second type of resistance other than the first type of resistance.
摘要翻译：一种印刷电路板及其方法和焊球地及其方法。示例性印刷电路板（PCB）可以包括具有构造成用于第一类型电阻的第一表面处理部分的第一焊球焊盘和具有被配置为用于第二类型电阻的第二表面处理部分的第二焊球焊盘。示例性焊球焊盘可以包括被配置为用于第一类型电阻的第一表面处理部分和被配置用于第二类型电阻的第二表面处理部分。第一示例性方法可以包括首先处理第一焊球焊盘的第一表面以增加第一类型的电阻，并且第二处理第二焊球焊盘的第二表面以增加除第一类型电阻之外的第二类型的电阻。第二示例性方法可以包括首先处理焊球焊盘以增加第一类型的电阻，并且第二次处理焊球焊盘以增加除第一类型电阻之外的第二类型的电阻。

7. 发明申请

US20070057410A1 Method of fabricating wafer chips 审中-公开
标题翻译：制造晶圆片的方法
公开(公告)号：US20070057410A1
公开(公告)日：2007-03-15
申请号：US11500345
申请日：2006-08-08
申请人： Dae-sang Chan , Jun-young Ko , Sang-jun Kim , Wha-su Sin
发明人： Dae-sang Chan , Jun-young Ko , Sang-jun Kim , Wha-su Sin
IPC分类号： H05B6/00
CPC分类号： H01L21/67132
摘要： Example embodiments of the present invention relate to a method of packaging a semiconductor device. Other example embodiments of the present invention relate to a method of fabricating wafer chips for packaging a semiconductor device. Provided is a method of fabricating a wafer chips, which can perform a reliable pick-up process by removing the adhesive component adhering onto the cutting surfaces of the wafer chips, the diced DAF and the first base film. The method includes preparing at least one wafer, attaching at least one film onto a back surface of the wafer to support the wafer, forming wafer chips by dicing the wafer, detaching the at least one film from the wafer chips and attaching at least one base film onto the wafer chips to support the wafer chips.
摘要翻译：本发明的示例性实施例涉及一种封装半导体器件的方法。本发明的其它示例性实施例涉及制造用于封装半导体器件的晶片芯片的方法。提供一种制造晶片芯片的方法，其可以通过去除附着在晶片芯片，切割的DAF和第一基底膜的切割表面上的粘合剂成分来执行可靠的拾取过程。该方法包括制备至少一个晶片，将至少一个膜附着到晶片的背面上以支撑晶片，通过切割晶片形成晶片芯片，将晶片芯片中的至少一个薄膜分开并将至少一个基底胶片到晶片芯片上以支撑晶片芯片。

8. 发明申请

US20110318887A1 METHOD OF MOLDING SEMICONDUCTOR PACKAGE 有权
标题翻译：模制半导体封装的方法
公开(公告)号：US20110318887A1
公开(公告)日：2011-12-29
申请号：US13094216
申请日：2011-04-26
申请人： Jun-young Ko , Jae-yong Park , Heui-seog Kim , Ho-geon Song
发明人： Jun-young Ko , Jae-yong Park , Heui-seog Kim , Ho-geon Song
IPC分类号： H01L21/56
CPC分类号： H01L21/52 , H01L21/56 , H01L21/565 , H01L25/0657 , H01L2224/16225 , H01L2224/48227 , H01L2225/06562
摘要： A method of molding a semiconductor package includes coating liquid molding resin or disposing solid molding resin on a top surface of a semiconductor chip arranged on a substrate. The solid molding resin may include powdered molding resin or sheet-type molding resin. In a case where liquid molding resin is coated on the top surface of the semiconductor chip, the substrate is mounted between a lower molding and an upper molding, and then melted molding resin is filled in a space between the lower molding and the upper molding. In a case where the solid molding resin is disposed on the top surface of the semiconductor chip, the substrate is mounted on a lower mold and then the solid molding resin is heated and melts into liquid molding resin having flowability. An upper mold is mounted on the lower mold, and melted molding resin is filled in a space between the lower molding and the upper molding.
摘要翻译：模制半导体封装的方法包括在设置在基板上的半导体芯片的顶表面上涂布液体模制树脂或将固体模塑树脂设置。固体成型树脂可以包括粉末成型树脂或片状模塑树脂。在半导体芯片的上表面上涂布有液态成型树脂的情况下，将基板安装在下模和上模之间，然后将熔融模制树脂填充在下模和上模之间的空间中。在固体成形树脂设置在半导体芯片的顶面的情况下，将基板安装在下模上，然后将固体成型树脂加热熔融成具有流动性的液态成型树脂。上模具安装在下模具上，熔融模塑树脂填充在下模和上模之间的空间中。

9. 发明授权

US08420450B2 Method of molding semiconductor package 有权
公开(公告)号：US08420450B2
公开(公告)日：2013-04-16
申请号：US13094216
申请日：2011-04-26
申请人： Jun-young Ko , Jae-yong Park , Heui-seog Kim , Ho-geon Song
发明人： Jun-young Ko , Jae-yong Park , Heui-seog Kim , Ho-geon Song
IPC分类号： H01L21/16
CPC分类号： H01L21/52 , H01L21/56 , H01L21/565 , H01L25/0657 , H01L2224/16225 , H01L2224/48227 , H01L2225/06562
摘要： A method of molding a semiconductor package includes coating liquid molding resin or disposing solid molding resin on a top surface of a semiconductor chip arranged on a substrate. The solid molding resin may include powdered molding resin or sheet-type molding resin. In a case where liquid molding resin is coated on the top surface of the semiconductor chip, the substrate is mounted between a lower molding and an upper molding, and then melted molding resin is filled in a space between the lower molding and the upper molding. In a case where the solid molding resin is disposed on the top surface of the semiconductor chip, the substrate is mounted on a lower mold and then the solid molding resin is heated and melts into liquid molding resin having flowability. An upper mold is mounted on the lower mold, and melted molding resin is filled in a space between the lower molding and the upper molding.

10. 发明申请

US20070040282A1 Printed circuit board and method thereof and a solder ball land and method thereof 有权
标题翻译：印刷电路板及其方法和焊球地及其方法
公开(公告)号：US20070040282A1
公开(公告)日：2007-02-22
申请号：US11486064
申请日：2006-07-14
申请人： Ky-hyun Jung , Heui-seog Kim , Sang-jun Kim , Wa-su Sin , Ho-geon Song , Jun-young Ko
发明人： Ky-hyun Jung , Heui-seog Kim , Sang-jun Kim , Wa-su Sin , Ho-geon Song , Jun-young Ko
IPC分类号： H01L23/48
CPC分类号： H05K3/282 , H01L21/4853 , H01L23/49816 , H01L23/49838 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/73 , H01L2224/05001 , H01L2224/05008 , H01L2224/05548 , H01L2224/05567 , H01L2224/16503 , H01L2224/32057 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/83102 , H01L2224/83385 , H01L2224/92125 , H01L2924/01006 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01077 , H01L2924/01079 , H01L2924/01082 , H01L2924/15311 , H01L2924/181 , H05K3/243 , H05K3/3457 , H05K2201/0391 , H05K2201/0989 , H01L2924/00014 , H01L2924/00012
摘要： A printed circuit board and method thereof and a solder ball land and method thereof. The example printed circuit board (PCB) may include a first solder ball land having a first surface treatment portion configured for a first type of resistance and a second solder ball land having a second surface treatment portion configured for a second type of resistance. The example solder ball land may include a first surface treatment portion configured for a first type of resistance and a second surface treatment portion configured for a second type of resistance. A first example method may include first treating a first surface of a first solder ball land to increase a first type of resistance and second treating a second surface of a second solder ball land to increase a second type of resistance other than the first type of resistance. A second example method may include first treating a solder ball land to increase a first type of resistance and second treating the solder ball land to increase a second type of resistance other than the first type of resistance.
摘要翻译：一种印刷电路板及其方法和焊球地及其方法。示例性印刷电路板（PCB）可以包括具有构造成用于第一类型电阻的第一表面处理部分的第一焊球焊盘和具有被配置为用于第二类型电阻的第二表面处理部分的第二焊球焊盘。示例性焊球焊盘可以包括被配置为用于第一类型电阻的第一表面处理部分和被配置用于第二类型电阻的第二表面处理部分。第一示例性方法可以包括首先处理第一焊球焊盘的第一表面以增加第一类型的电阻，并且第二处理第二焊球焊盘的第二表面以增加除第一类型电阻之外的第二类型的电阻。第二示例性方法可以包括首先处理焊球焊盘以增加第一类型的电阻，并且第二次处理焊球焊盘以增加除第一类型电阻之外的第二类型的电阻。

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