专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US08241991B2 Method for forming interconnect structure having airgap 有权
标题翻译：形成具有气隙的互连结构的方法
公开(公告)号：US08241991B2
公开(公告)日：2012-08-14
申请号：US12718731
申请日：2010-03-05
申请人： Julian J. Hsieh , Nobuyoshi Kobayashi , Akira Shimizu , Kiyohiro Matsushita , Atsuki Fukazawa
发明人： Julian J. Hsieh , Nobuyoshi Kobayashi , Akira Shimizu , Kiyohiro Matsushita , Atsuki Fukazawa
IPC分类号： H01L21/76
CPC分类号： H01L21/768
摘要： A method for forming an interconnect structure with airgaps, includes: providing a structure having a trench formed on a substrate; depositing a spacer oxide layer on sidewalls of the trench as sidewall spacers by plasma enhanced atomic layer deposition; filling the trench having the sidewall spacers with copper; removing the sidewall spacers to form an airgap structure; and encapsulating the airgap structure, wherein airgaps are formed between the filled copper and the sidewalls of the trench.
摘要翻译：一种用气隙形成互连结构的方法，包括：提供在衬底上形成沟槽的结构; 通过等离子体增强的原子层沉积在沟槽的侧壁上沉积间隔氧化物层作为侧壁间隔物; 用铜填充具有侧壁间隔物的沟槽; 去除侧壁间隔件以形成气隙结构; 并且封装气隙结构，其中在填充的铜和沟槽的侧壁之间形成气隙。

2. 发明申请

US20110217838A1 METHOD FOR FORMING INTERCONNECT STRUCTURE HAVING AIRGAP 有权
标题翻译：用于形成具有AIRGAP的互连结构的方法
公开(公告)号：US20110217838A1
公开(公告)日：2011-09-08
申请号：US12718731
申请日：2010-03-05
申请人： Julian J. Hsieh , Nobuyoshi Kobayashi , Akira Shimizu , Kiyohiro Matsushita , Atsuki Fukazawa
发明人： Julian J. Hsieh , Nobuyoshi Kobayashi , Akira Shimizu , Kiyohiro Matsushita , Atsuki Fukazawa
IPC分类号： H01L21/768
CPC分类号： H01L21/768
摘要： A method for forming an interconnect structure with airgaps, includes: providing a structure having a trench formed on a substrate; depositing a spacer oxide layer on sidewalls of the trench as sidewall spacers by plasma enhanced atomic layer deposition; filling the trench having the sidewall spacers with copper; removing the sidewall spacers to form an airgap structure; and encapsulating the airgap structure, wherein airgaps are formed between the filled copper and the sidewalls of the trench.
摘要翻译：一种用气隙形成互连结构的方法，包括：提供在衬底上形成沟槽的结构; 通过等离子体增强的原子层沉积在沟槽的侧壁上沉积间隔氧化物层作为侧壁间隔物; 用铜填充具有侧壁间隔物的沟槽; 去除侧壁间隔件以形成气隙结构; 并且封装气隙结构，其中在填充的铜和沟槽的侧壁之间形成气隙。

3. 发明申请

US20100124618A1 Method of Forming Insulation Film Using Plasma Treatment Cycles 有权
标题翻译：使用等离子体处理循环形成绝缘膜的方法
公开(公告)号：US20100124618A1
公开(公告)日：2010-05-20
申请号：US12618419
申请日：2009-11-13
申请人： Akiko Kobayashi , Akira Shimizu , Kuo-wei Hong , Nobuyoshi Kobayashi , Atsuki Fukazawa
发明人： Akiko Kobayashi , Akira Shimizu , Kuo-wei Hong , Nobuyoshi Kobayashi , Atsuki Fukazawa
IPC分类号： B05D3/04
CPC分类号： C23C16/45542 , C23C16/345 , C23C16/56
摘要： A film forming cycle based on pulse CVD or ALD is repeated multiple times to form a single layer of insulation film, while a reforming cycle is implemented in the aforementioned process, either once or multiple times per each film forming cycle, by treating the surface of formed film using a treating gas that has been activated by a plasma.
摘要翻译：基于脉冲CVD或ALD的成膜循环重复多次以形成单层绝缘膜，而在上述过程中重整循环是每个成膜循环一次或多次，通过处理使用已经被等离子体激活的处理气体形成膜。

4. 发明授权

US08647722B2 Method of forming insulation film using plasma treatment cycles 有权
标题翻译：使用等离子体处理循环形成绝缘膜的方法
公开(公告)号：US08647722B2
公开(公告)日：2014-02-11
申请号：US12618419
申请日：2009-11-13
申请人： Akiko Kobayashi , Akira Shimizu , Kuo-wei Hong , Nobuyoshi Kobayashi , Atsuki Fukazawa
发明人： Akiko Kobayashi , Akira Shimizu , Kuo-wei Hong , Nobuyoshi Kobayashi , Atsuki Fukazawa
IPC分类号： H05H1/24
CPC分类号： C23C16/45542 , C23C16/345 , C23C16/56
摘要： A film forming cycle based on pulse CVD or ALD is repeated multiple times to form a single layer of insulation film, while a reforming cycle is implemented in the aforementioned process, either once or multiple times per each film forming cycle, by treating the surface of formed film using a treating gas that has been activated by a plasma.
摘要翻译：基于脉冲CVD或ALD的成膜循环重复多次以形成单层绝缘膜，而在上述过程中重整循环是每个成膜循环一次或多次，通过处理使用已经被等离子体激活的处理气体形成膜。

5. 发明申请

US20100124621A1 Method of Forming Insulation Film by Modified PEALD 审中-公开
标题翻译：通过改性PEALD形成绝缘膜的方法
公开(公告)号：US20100124621A1
公开(公告)日：2010-05-20
申请号：US12618355
申请日：2009-11-13
申请人： Akiko Kobayashi , Akira Shimizu , Nobuyoshi Kobayashi , Woo-Jin Lee
发明人： Akiko Kobayashi , Akira Shimizu , Nobuyoshi Kobayashi , Woo-Jin Lee
IPC分类号： C23C16/48
CPC分类号： C23C16/402 , C23C16/325 , C23C16/345 , C23C16/45542 , C23C16/45553 , H01L21/0214 , H01L21/02164 , H01L21/0217 , H01L21/02219 , H01L21/02274 , H01L21/0228
摘要： A method of forming an insulation film by alternating multiple times, respectively, a process of adsorbing a precursor onto a substrate and a process of treating the adsorbed surface using reactant gas and a plasma, wherein a plasma is applied in the process of supplying the precursor.
摘要翻译：一种通过交替多次交替形成绝缘膜的方法，将前体吸附到基底上的方法和使用反应气体和等离子体处理吸附表面的方法，其中在提供前体的过程中施加等离子体。

6. 发明授权

US10378106B2 Method of forming insulation film by modified PEALD 有权
公开(公告)号：US10378106B2
公开(公告)日：2019-08-13
申请号：US12618355
申请日：2009-11-13
申请人： Akiko Kobayashi , Akira Shimizu , Nobuyoshi Kobayashi , Woo-Jin Lee
发明人： Akiko Kobayashi , Akira Shimizu , Nobuyoshi Kobayashi , Woo-Jin Lee
IPC分类号： C23C16/32 , C23C16/34 , C23C16/40 , H01L21/02 , C23C16/455 , H05H1/24
摘要： A method of forming an insulation film by alternating multiple times, respectively, a process of adsorbing a precursor onto a substrate and a process of treating the adsorbed surface using reactant gas and a plasma, wherein a plasma is applied in the process of supplying the precursor.

7. 发明授权

US08102739B2 Optical disk playback apparatus and optical disk recording/playback apparatus 失效
标题翻译：光盘播放装置和光盘记录/重放装置
公开(公告)号：US08102739B2
公开(公告)日：2012-01-24
申请号：US12654855
申请日：2010-01-06
申请人： Nobuyoshi Kobayashi
发明人： Nobuyoshi Kobayashi
IPC分类号： G11B7/00
CPC分类号： G11B20/10009 , G11B7/1263 , G11B20/10027 , G11B20/10037 , G11B20/10046 , G11B20/10203 , G11B2220/2537
摘要： Disclosed herein is an optical disk playback apparatus including: a signal playback device configured to read and decode information recorded to an optical disk through an optical pickup unit in order to reproduce the information; the signal playback device including a signal generation circuit, a first signal processing device, a second signal processing device, a modulator, a switch, an analog to digital converter, and a third signal processing device.
摘要翻译：这里公开了一种光盘播放装置，包括：信号重放装置，被配置为通过光学拾取单元读取和解码记录到光盘的信息，以便再现信息; 信号重放装置包括信号产生电路，第一信号处理装置，第二信号处理装置，调制器，开关，模数转换器和第三信号处理装置。

8. 发明授权

US08085637B2 Tracking error signal detection apparatus and optical disc apparatus 失效
标题翻译：跟踪误差信号检测装置和光盘装置
公开(公告)号：US08085637B2
公开(公告)日：2011-12-27
申请号：US12569002
申请日：2009-09-29
申请人： Osamu Hosokawa , Nobuyoshi Kobayashi
发明人： Osamu Hosokawa , Nobuyoshi Kobayashi
IPC分类号： G11B5/09 , G11B27/36 , G11B7/00
CPC分类号： G11B7/0906 , G11B7/094 , G11B2220/2537
摘要： A DPD tracking error signal detection apparatus includes the following. Four differentiators remove DC components and differentiate four signal with varying differential phases. The signals are then sampled and quantized by four A/D converters, and output to a non-inverting unit and an inverting unit. A phase inverter/compositor then leaves as-is or phase-inverts the output signals, according to a control signal. The non-inverting and the inverting unit each include two Hilbert transformers that phase-shift the output from the A/D converters, two delay units that delay the output of the other A/D converters to match the delay of the Hilbert transformers, two cross-correlators that calculate the cross-correlation between pairs of Hilbert transformers and delay units, and an adding unit that combines the cross-correlator results and outputs the combined result to the phase inverter/compositor.
摘要翻译： DPD跟踪误差信号检测装置包括以下。四个微分器去除直流分量并区分具有变化差分相位的四个信号。然后，信号由四个A / D转换器采样和量化，并输出到同相单元和反相单元。相位逆变器/合成器然后根据控制信号原样或相位反相输出信号。非反相和反相单元各自包括两个希尔伯特变换器，它们相移来自A / D转换器的输出，两个延迟单元延迟其他A / D转换器的输出以匹配希尔伯特变压器的延迟，两个计算希尔伯特变换器和延迟单元对之间的互相关的交叉相关器，以及组合交叉相关器结果并将组合结果输出到相位逆变器/合成器的加法单元。

9. 发明授权

US06555464B2 Semiconductor device and method of manufacturing the same 有权
公开(公告)号：US06555464B2
公开(公告)日：2003-04-29
申请号：US10046814
申请日：2002-01-17
申请人： Shinichi Fukada , Kazuo Nojiri , Takashi Yunogami , Shoji Hotta , Hideo Aoki , Takayuki Oshima , Nobuyoshi Kobayashi
发明人： Shinichi Fukada , Kazuo Nojiri , Takashi Yunogami , Shoji Hotta , Hideo Aoki , Takayuki Oshima , Nobuyoshi Kobayashi
IPC分类号： H01L214763
CPC分类号： H01L21/76874 , H01L21/76804 , H01L21/76811 , H01L21/76813 , H01L21/76829 , H01L21/76843 , H01L21/76873 , H01L23/53238 , H01L2221/1036 , H01L2924/0002 , H01L2924/00
摘要： Insulating films 34 through 38 (of which insulating films 34, 36, 38 are silicon nitride films and insulating films 35, 38 are silicon oxide films) are sequentially formed on the wires 33 of the fourth wiring layer and groove pattern 40 is transferred into the insulating film 38 by means of photolithography. An anti-reflection film 41 is formed to fill the grooves 40 of the insulating film 38 and then a resist film 42 carrying a hole pattern 43 is formed. The films are subjected to an etching operation in the presence of the resist film 42 to transfer the hole pattern into the insulating films 38, 37, 36 and part of the insulating film 35. Subsequently, the resist film 42 and the anti-reflection film 41 are removed and the groove pattern 40 and the hole pattern 43 are transferred respectively into the insulating film 37 and the insulating film 35 by using the insulating film 38 as mask.

10. 发明授权

US06432769B1 Semiconductor integrated circuit device and process for manufacture the same 有权
标题翻译：半导体集成电路器件及其制造方法
公开(公告)号：US06432769B1
公开(公告)日：2002-08-13
申请号：US09642582
申请日：2000-08-22
申请人： Takuya Fukuda , Nobuyoshi Kobayashi , Yoshitaka Nakamura , Masayoshi Saito , Shinichi Fukada , Yoshifumi Kawamoto
发明人： Takuya Fukuda , Nobuyoshi Kobayashi , Yoshitaka Nakamura , Masayoshi Saito , Shinichi Fukada , Yoshifumi Kawamoto
IPC分类号： H01L2972
CPC分类号： H01L27/10808 , H01L27/108
摘要： The new structure of a memory cell which enables avoiding the problem of a step without increasing the number of processes, the structure of a semiconductor integrated circuit in which a common part of the same substrate in a manufacturing process is increased and the structure of the semiconductor integrated circuit which allows measures for environment obstacles without increasing the number of processes are disclosed. Memory cell structure in which a capacitor is formed in the uppermost layer of plural metal wiring layers by connecting the storage node of the capacitor to a diffusion layer via plugs and pads is adopted. It is desirable that a dielectric film formed in a metal wiring layer under the uppermost layer and a supplementary capacitor composed of a storage node and a plate electrode are connected to the capacitor. It is also desirable that the plate electrode of the capacitor covers the chip.
摘要翻译：存储单元的新结构能够在不增加处理次数的情况下避免步骤的问题，制造过程中同一基板的公共部分增加的半导体集成电路的结构和半导体的结构公开了不增加处理次数的环境障碍措施的集成电路。采用通过将电容器的存储节点经由插头和焊盘连接到扩散层，在多个金属布线层的最上层形成电容器的存储单元结构。最好将形成在最上层的金属布线层中的电介质膜和由存储节点和平板电极构成的辅助电容器连接到电容器。还希望电容器的平板电极覆盖芯片。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式