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1. 发明授权

US5949218A Methods and apparatus for managing the charging and discharging of a lithium battery 失效
标题翻译：用于管理锂电池的充电和放电的方法和装置
公开(公告)号：US5949218A
公开(公告)日：1999-09-07
申请号：US45276
申请日：1998-03-20
申请人： Joseph H. Colles , Jean-Christophe Berchtold , Max A. Child
发明人： Joseph H. Colles , Jean-Christophe Berchtold , Max A. Child
IPC分类号： H02H7/18 , H02J7/00 , H02J7/10 , H01M10/44 , H01M10/46
CPC分类号： H02J7/0031
摘要： An apparatus and corresponding method are provided for regulating the voltage potential of a lithium ion battery based upon an operating range having an upper threshold (e.g., on the order of 4.2 v) and a lower threshold (e.g., on the order of 2.5 v) and for providing a reduction in dissipated power when the lithium ion battery is charging and when a load is drawing upon the lithium ion battery. The apparatus includes a p-minus substrate and a first p-channel enhancement Field Effect Transistor (FET) integrally formed on the p-minus substrate. The first p-channel enhancement FET is configured to limit charging of the lithium ion battery when the voltage potential of the lithium ion battery is greater than the upper threshold. A second p-channel enhancement FET is integrally formed on the p-minus substrate and connected in parallel with the first p-channel enhancement FET and configured to limit discharging of the lithium ion battery when the voltage potential of the lithium ion battery is less than the lower threshold. A third p-channel enhancement FET is integrally formed on the p-minus substrate and connected in parallel with the first p-channel enhancement FET and the second p-channel enhancement FET. The third p-channel enhancement FET encompasses a substantially larger area of the p-minus substrate as compared to each of the first p-channel enhancement FET and the second p-channel enhancement FET such that a substantially reduced resistive path is presented by the third p-channel enhancement FET relative to the resistive paths associated with the first and second p-channel enhancement FETs. The reduced resistive path provides reduced dissipated power while the lithium ion battery is charging and when the load is drawing upon the battery in the operating range.
摘要翻译：提供了一种装置和相应的方法，用于基于具有较高阈值（例如，4.2v）和较低阈值（例如，2.5v级）的操作范围来调节锂离子电池的电压，并且用于当锂离子电池正在充电时以及负载在锂离子电池上时降低耗散功率。该装置包括一个p-负极衬底和一个整体形成在p-负极衬底上的第一个p沟道增强场效应晶体管（FET）。第一p沟道增强FET被配置为当锂离子电池的电压电位大于上阈值时限制锂离子电池的充电。第二p沟道增强FET一体地形成在p-minus衬底上并与第一p沟道增强FET并联连接，并且被配置为当锂离子电池的电压低于...时，限制锂离子电池的放电较低的门槛。第三p沟道增强FET一体地形成在p-minus衬底上并与第一p沟道增强FET和第二p沟道增强FET并联连接。与第一p沟道增强FET和第二p沟道增强FET中的每一个相比，第三p沟道增强FET包括相当大的p-minus衬底的面积，使得基本上减小的电阻路径由第三 p沟道增强FET相对于与第一和第二p沟道增强FET相关联的电阻路径。降低的电阻路径在锂离子电池正在充电时以及当负载在电池工作范围内被拉动时，提供降低的耗散功率。

2. 发明授权

US07928712B1 Low noise fast dithering switching power supply 有权
标题翻译：低噪声快速抖动开关电源
公开(公告)号：US07928712B1
公开(公告)日：2011-04-19
申请号：US11756909
申请日：2007-06-01
申请人： Chris Levesque , Joseph H. Colles , Jean-Christophe Berchtold
发明人： Chris Levesque , Joseph H. Colles , Jean-Christophe Berchtold
IPC分类号： G05F1/56 , G05F1/575
CPC分类号： H02M3/156
摘要： The present invention is a switching power supply that switches (dithers) between at least two switching frequencies without introducing a ripple signal at the dithering frequency, which is based on the time duration of a dithering cycle. In one embodiment of the present invention, an average current in an energy transfer element, such as an inductive element, during operation using one switching frequency is regulated to be approximately equal to the average current during operation using any other switching frequency. The average current may be regulated by controlling the durations of transition periods between operating using one switching frequency and operating using another switching frequency. By maintaining a constant average current while operating using different switching frequencies, dithering frequency ripple may be significantly reduced or eliminated.
摘要翻译：本发明是一种开关电源，其在至少两个开关频率之间切换（抖动），而不引入基于抖动周期的持续时间的抖动频率处的纹波信号。在本发明的一个实施例中，在使用一个开关频率的操作期间能量传递元件（例如电感元件）中的平均电流被调节为大约等于使用任何其它开关频率的操作期间的平均电流。可以通过控制使用一个开关频率的操作和使用另一个开关频率的操作之间的过渡期的持续时间来调节平均电流。通过在使用不同的开关频率进行操作时保持恒定的平均电流，可以显着减少或消除抖动频率纹波。

3. 发明授权

US06651021B2 System using adaptive circuitry to improve performance and provide linearity and dynamic range on demand 有权
公开(公告)号：US06651021B2
公开(公告)日：2003-11-18
申请号：US09881932
申请日：2001-06-15
申请人： Paul A. Underbrink , Daryush Shamlou , Ricke W. Clark , Joseph H. Colles , Guangming Yin , Patrick D. Ryan , Kelly H. Hale
发明人： Paul A. Underbrink , Daryush Shamlou , Ricke W. Clark , Joseph H. Colles , Guangming Yin , Patrick D. Ryan , Kelly H. Hale
IPC分类号： G01R3500
CPC分类号： H04B1/109
摘要： The invention discloses a system for improving performance of the RF amplification stage of communication receivers by accounting for the signal environment of the RF amplifier. The linearity, gain and power supply voltage of the RF amplification stage of the communication receiver is adjusted to produce an optimal signal into the succeeding narrow-band amplification stage(s). The adjustment of the RF stage includes mechanisms such as adjusting the RF amplifier power supply level using a DC to DC converter. It also includes allowing distortion in the RF amplification stage if the distortion in the RF amplification stage does not affect the target signal. For example, if there were a strong signal that fell within the same band as the target signal, amplification would be allowed to be so high that it distorted the undesired signals, but not the tined signals. If the desired signal is the predominant signal, within the RF amplifier's band, then the amplifier gain may be increased only to the point where distortion is detected.

4. 发明授权

US5198703A System for detecting voltage pulses of a particular magnitude 失效
标题翻译：用于检测特定大小的电压脉冲的系统
公开(公告)号：US5198703A
公开(公告)日：1993-03-30
申请号：US802072
申请日：1991-12-03
申请人： Joseph H. Colles
发明人： Joseph H. Colles
IPC分类号： B60T8/48 , G01R19/165
CPC分类号： B60T8/4827 , G01R19/16585
摘要： First circuitry on an integrated circuit chip has an input terminal, preferably the only input terminal, for receiving a voltage pulse introduced to a first terminal on the chip. The first circuitry damps the negative voltage peaks of the voltage pulse at a voltage of a first magnitude inherent in the construction of the first circuitry. A pair of input transistors in the first circuitry have dimensions to provide, at the input terminal to second circuitry, a clamping voltage of a first magnitude at a certain fraction of the power supply voltage. The first circuitry may include a closed loop servo amplifier which regulates the negative peaks of the pulse at the input terminal to the second circuitry to a value approximately equal to the voltage of the first magnitude. The second circuitry compares the negative peaks of the input voltage pulse with a voltage of a second magnitude inherent in the construction of the second circuitry to provide an output logic pulse. A pair of input transistors in the second circuitry have dimensions to provide an internal reference voltage of the second magnitude. Differences between the dimensions of the input transistors in the second circuitry and the first circuitry provide a slight but accurate difference between the voltages of second and first magnitudes. The output pulse may constitute a horizontal sync pulse having amplitude not slightly more negative than the negative peaks of a color burst following it. This pulse provides for a faithful reproduction of color from color information signals following the color burst signals.
摘要翻译：集成电路芯片上的第一电路具有用于接收引入到芯片上的第一端子的电压脉冲的输入端子，最好是唯一的输入端子。第一电路将电压脉冲的负电压峰值减去第一电路结构固有的第一幅度的电压。第一电路中的一对输入晶体管具有在电源电压的一定分数下在第二电路的输入端提供第一幅度的钳位电压的尺寸。第一电路可以包括闭环伺服放大器，其将在第二电路的输入端处的脉冲的负峰值调节到大致等于第一幅度的电压的值。第二电路将输入电压脉冲的负峰值与在第二电路结构中固有的第二幅度的电压进行比较以提供输出逻辑脉冲。第二电路中的一对输入晶体管具有提供第二幅度的内部参考电压的尺寸。第二电路和第一电路中的输入晶体管的尺寸之间的差异提供了第二和第一幅度的电压之间的轻微但精确的差异。输出脉冲可以构成水平同步脉冲，该水平同步脉冲的幅度不比其随后的色同步脉冲的负峰值稍微大一些。该脉冲提供了在色同步信号之后的颜色信息信号的忠实再现。

5. 发明授权

US5150077A Generation of horizontal sync pulse 失效
标题翻译：生成水平同步脉冲
公开(公告)号：US5150077A
公开(公告)日：1992-09-22
申请号：US766817
申请日：1991-09-26
申请人： Joseph H. Colles
发明人： Joseph H. Colles
IPC分类号： H04N5/10 , H04N5/12
CPC分类号： H04N5/126
摘要： A system eliminates the adverse effects of serration and equalization pulses (periodically generated during the vertical sync interval) in regulating the frequency of horizontal sync pulses. These sync pulses provide timing information to regulate a video display. The system includes circuitry for stripping and processing the horizontal and vertical sync signals and the serration pulses from the video signals. These pulses are introduced to a first AND gate and through a first display line to an input of a second AND gate. Frequency divider output signals are introduced to the first AND gate and to a third AND gate through a second delay line having an equal delay with the first delay line. The output from the first AND gate passes to second inputs of the second and third AND gates. The second and third AND gates produce signals which represent the time difference between the sync and divider output signals and which have a maximum time difference equal to the delays of the delay lines. In doing so, the gates eliminate the effects of the serration and equalization pulses. A phase comparator compares the times of occurrence of the second and third AND gate signals and introduces to a low pass filter and signals representing the time difference. A voltage controlled oscillator produces a signal having a frequency dependent upon the magnitude of the output voltage from the filter. The frequency of the oscillator signals is passed to a frequency divider. The resultant divider signals are introduced to the first AND gate and the second delay line.

6. 发明授权

US08351880B1 Saturation corrected power amplifier integration loop 有权
标题翻译：饱和校正功率放大器集成环路
公开(公告)号：US08351880B1
公开(公告)日：2013-01-08
申请号：US12841712
申请日：2010-07-22
申请人： Alexander W. Hietala , Joseph H. Colles
发明人： Alexander W. Hietala , Joseph H. Colles
IPC分类号： H01Q11/12 , H04B1/04
CPC分类号： H03F3/245 , H03G3/3047
摘要： Embodiments of the present disclosure relate to an radio frequency (RF) power amplifier (PA) module having a saturation corrected integration loop, which includes saturation detection and correction circuitry, an integrator, PA circuitry, and detector circuitry. An integrator output signal from the integrator is prevented from being driven toward a power supply rail in the presence of saturation of the PA circuitry by saturation correction of an input ramp signal. The saturation detection and correction circuitry receives and saturation corrects the input ramp signal to provide a saturation corrected input ramp signal to the integrator based on detecting saturation of the PA circuitry. Saturation of the PA circuitry is detected based on a difference between a desired PA output voltage, as indicated by the input ramp signal, and a detected PA output voltage, as indicated by a detector output signal from the detector circuitry.
摘要翻译：本公开的实施例涉及具有饱和校正积分环路的射频（RF）功率放大器（PA）模块，其包括饱和检测和校正电路，积分器，PA电路和检测器电路。在积分器的积分器输出信号通过输入斜坡信号的饱和校正在PA电路饱和的情况下，不会被驱动朝向电源轨。饱和检测和校正电路接收并饱和校正输入斜坡信号，以基于检测PA电路的饱和度向积分器提供饱和校正的输入斜坡信号。基于由输入斜坡信号指示的期望的PA输出电压和检测到的PA输出电压之间的差异检测PA电路的饱和度，如来自检测器电路的检测器输出信号所示。

7. 发明授权

US06980772B1 Wireless communications system utilizing directional wireless communication device 有权
标题翻译：利用定向无线通信设备的无线通信系统
公开(公告)号：US06980772B1
公开(公告)日：2005-12-27
申请号：US09821110
申请日：2001-03-29
申请人： Paul A. Underbrink , Kelly H. Hale , Guang-Ming Yin , Patrick D. Ryan , Joseph H. Colles , Daryush Shamlou , Christian Levesque
发明人： Paul A. Underbrink , Kelly H. Hale , Guang-Ming Yin , Patrick D. Ryan , Joseph H. Colles , Daryush Shamlou , Christian Levesque
IPC分类号： H01Q1/24 , H04W88/02 , H04B1/00 , H04B15/00
CPC分类号： H01Q9/0407 , H01Q1/245 , H01Q1/246 , H04W88/02
摘要： A system for wireless communications is provided. The system includes a hand-held wireless communications device, such as a cell phone. An antenna is connected to the cell phone. The antenna radiates radio waves over an area of less than 360 degrees of arc, such as in a cardioid or hemisphere. The antenna is oriented such that hemisphere is in the direction away from a head of a user of the cell phone.
摘要翻译：提供了一种用于无线通信的系统。该系统包括诸如手机的手持式无线通信设备。天线连接到手机。天线辐射无线电波在小于360度弧度的区域，例如在心形或半球中。天线被定向成使得半球在离开手机的用户的头部的方向上。

8. 发明授权

US5400056A Apparatus for and method of processing and converting binary information to corresponding analog signals 失效
标题翻译：二进制信息处理和转换为相应的模拟信号的装置和方法
公开(公告)号：US5400056A
公开(公告)日：1995-03-21
申请号：US6813
申请日：1993-01-21
申请人： Joseph H. Colles
发明人： Joseph H. Colles
IPC分类号： G09G5/02 , G09G5/395 , G09G1/28
CPC分类号： G09G5/395 , G09G5/02
摘要： In first and second modes, successive pairs of bytes, each with a suitable number (e.g. 8) of binary indications, are respectively processed in each clock cycle or clock half cycle to provide a true color. In these modes, the successive pairs of bytes may be processed in a 5,5,5, or a 5,6,5 pattern representing the primary colors for a pixel. In a third mode, the bytes may be introduced to a memory having a plurality of positions for storing individual binary combinations, which may be updated by a microprocessor, representing pseudo colors. In the third mode, a particular position in the memory is selected in accordance with the indications in each byte in each clock cycle or half cycle. In an additional mode, three successive bytes in a group may indicate the primary colors defining a true color when the fourth byte in the group provides a particular indication (e.g. 0 for all 8 binary bits). In this mode, indications in the fourth byte other than the particular indication select a particular position in the memory to represent a pseudo color. In this mode, the successive bytes may be respectively provided either in each clock cycle or clock half cycle. The binary indications representing the true color or the pseudo color in the different modes are converted to analog signals for introduction to a video monitor. In the additional mode, the indications in particular positions in the memory may be blocked from conversion to analog signals.
摘要翻译：在第一和第二模式中，在每个时钟周期或时钟半周期中分别处理连续的字节对，每个字节具有适当数量（例如8个）二进制指示，以提供真实颜色。在这些模式中，连续的字节对可以在表示像素的原色的5,5,5或5,6,5图案中进行处理。在第三模式中，字节可以被引入具有多个位置的存储器，该存储器用于存储表示伪颜色的可由微处理器更新的各个二进制组合。在第三模式中，根据每个时钟周期或半周期中的每个字节的指示来选择存储器中的特定位置。在附加模式中，组中的三个连续字节可以指示当组中的第四个字节提供特定指示（例如对于所有8个二进制位为0）时定义真实颜色的主要颜色。在该模式中，除特定指示之外的第四字节中的指示选择存储器中的特定位置以表示伪颜色。在该模式中，可以在每个时钟周期或时钟半周期内分别提供连续的字节。表示不同模式中的真实颜色或伪色的二进制指示被转换为模拟信号，以引入视频监视器。在附加模式中，存储器中特定位置的指示可能被阻止转换为模拟信号。

9. 发明授权

US4496995A Down converting a high frame rate signal to a standard TV frame rate signal by skipping preselected video information 失效
标题翻译：通过跳过预先选择的视频信息，将高帧率信号转换成标准电视帧速率信号
公开(公告)号：US4496995A
公开(公告)日：1985-01-29
申请号：US363319
申请日：1982-03-29
申请人： Joseph H. Colles , James A. Bixby
发明人： Joseph H. Colles , James A. Bixby
IPC分类号： H04N5/77 , H04N5/92 , H04N5/782
CPC分类号： H04N5/77
摘要： In a fast frame recorder having (1) a video camera adapted to produce signals corresponding to a variety of frame rates, (2) a variable speed tape recorder adapted to down-convert the frame rate of the camera signals to a reference frame rate by appropriately reducing the recorder tape speed to a reference speed, and (3) a display monitor adapted to receive the reference frame rate signals, the camera thereof may be adjusted for various scene and frame rate conditions without need to record the camera frame rate signals (for purposes of signal down-conversion). This is, in accordance with the invention, achieved by selecting a certain line (or lines) from each frame of the camera output signal, and applying such selected lines directly to the display monitor. Skipping from line to line in the camera output signal has the effect of down-converting the frame rate of the camera output signal as required. Thus, tape recording for camera set-up purposes is obviated and, attendantly, the camera may be operated at any selected rate while, at the same time, the camera optics, scene lighting, etc., may be adjusted to optimize the monitor display.
摘要翻译：在具有（1）适于产生对应于各种帧速率的信号的摄像机的快速帧记录器中，（2）适用于将摄像机信号的帧速率下变频为参考帧速率的变速磁带录像机，适当地将记录器磁带速度降低到参考速度，以及（3）适于接收参考帧速率信号的显示监视器，可以针对各种场景和帧速率条件调整其摄像机，而无需记录摄像机帧速率信号用于信号下变频）。根据本发明，通过从相机输出信号的每个帧中选择一条线（或线）并将这样选择的线直接应用到显示监视器来实现。在相机输出信号中从一线到另一条跳线具有根据需要下变频摄像机输出信号的帧速率的效果。因此，用于相机设置目的的磁带记录被消除，并且伴随地，相机可以以任何选择的速率操作，同时可以调整照相机光学元件，场景照明等以优化监视器显示。

10. 发明授权

US4330846A Digital time base correction 失效
标题翻译：数字时基校正
公开(公告)号：US4330846A
公开(公告)日：1982-05-18
申请号：US159421
申请日：1980-06-16
申请人： Joseph H. Colles , James A. Bixby , Gary A. Labeau
发明人： Joseph H. Colles , James A. Bixby , Gary A. Labeau
IPC分类号： G11B20/18 , G11B20/20 , G11C5/06 , G11B5/02
CPC分类号： G11B20/18 , G11B20/20 , G11C5/063
摘要： The present invention provides apparatus for adjusting the time base of a signal that is read out from an addressable memory device. In accordance with a disclosed embodiment, coarse time base adjustment is provided by controlling the address count produced by a readout counter, while the phase of the counter clocking signal is adjusted to provide fine time base adjustment.
摘要翻译：本发明提供了一种用于调整从可寻址存储器件读出的信号的时基的装置。根据所公开的实施例，通过控制由读出计数器产生的地址计数来提供粗调时基调整，同时调整计数器时钟信号的相位以提供精细的时基调整。

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