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1. 发明授权

US08115274B2 Fuse structure and method for manufacturing same 有权
标题翻译：保险丝结构及其制造方法
公开(公告)号：US08115274B2
公开(公告)日：2012-02-14
申请号：US11855004
申请日：2007-09-13
申请人： Josef Boeck , Herbert Knapp , Wolfgang Liebl , Herbert Schaefer
发明人： Josef Boeck , Herbert Knapp , Wolfgang Liebl , Herbert Schaefer
IPC分类号： H01L29/00
CPC分类号： H01L23/5258 , H01L2924/0002 , H01L2924/00
摘要： A fuse structure includes a substrate, a fuse conductive trace disposed closer to a first chip surface than to a second chip surface facing away from the first chip surface, a metallization layer on the substrate disposed on a side of the fuse conductive trace facing away from the first chip surface, and a planar barrier multilayer assembly disposed between the fuse conductive trace and the metallization layer and including multiple barrier layers of different materials, wherein the fuse conductive trace, the metallization layer and the barrier multilayer assembly are arranged such that when cutting the fuse conductive trace and the barrier multilayer assembly, a first area of the metallization layer is electrically isolated from a second area of the metallization layer.
摘要翻译：保险丝结构包括衬底，布置成更接近第一芯片表面的熔丝导电迹线，而不是靠近第二芯片表面的第二芯片表面;衬底上的金属化层，设置在熔丝导电迹线的背离所述第一芯片表面以及布置在所述熔丝导电迹线和所述金属化层之间并且包括多个不同材料的阻挡层的平面势垒层叠组件，其中所述熔丝导电迹线，所述金属化层和所述阻挡层多层组件被布置成使得当切割所述熔丝导电迹线和所述阻挡层多层组件，所述金属化层的第一区域与所述金属化层的第二区域电隔离。

2. 发明申请

US20080067627A1 Fuse Structure and Method for Manufacturing Same 有权
标题翻译：保险丝结构及其制造方法相同
公开(公告)号：US20080067627A1
公开(公告)日：2008-03-20
申请号：US11855004
申请日：2007-09-13
申请人： Josef Boeck , Herbert Knapp , Wolfgang Liebl , Herbert Schaefer
发明人： Josef Boeck , Herbert Knapp , Wolfgang Liebl , Herbert Schaefer
IPC分类号： H01L29/00 , H01L21/02
CPC分类号： H01L23/5258 , H01L2924/0002 , H01L2924/00
摘要： A fuse structure includes a substrate, a fuse conductive trace disposed closer to a first chip surface than to a second chip surface facing away from the first chip surface, a metallization layer on the substrate disposed on a side of the fuse conductive trace facing away from the first chip surface, and a planar barrier multilayer assembly disposed between the fuse conductive trace and the metallization layer and including multiple barrier layers of different materials, wherein the fuse conductive trace, the metallization layer and the barrier multilayer assembly are arranged such that when cutting the fuse conductive trace and the barrier multilayer assembly, a first area of the metallization layer is electrically isolated from a second area of the metallization layer.
摘要翻译：保险丝结构包括衬底，布置成更接近第一芯片表面的熔丝导电迹线，而不是靠近第二芯片表面的第二芯片表面;衬底上的金属化层，设置在熔丝导电迹线的背离所述第一芯片表面以及布置在所述熔丝导电迹线和所述金属化层之间并且包括多个不同材料的阻挡层的平面势垒层叠组件，其中所述熔丝导电迹线，所述金属化层和所述阻挡层多层组件被布置成使得当切割所述熔丝导电迹线和所述阻挡层多层组件，所述金属化层的第一区域与所述金属化层的第二区域电隔离。

3. 发明申请

US20120156830A1 METHOD OF FORMING A RING-SHAPED METAL STRUCTURE 有权
标题翻译：形成环形金属结构的方法
公开(公告)号：US20120156830A1
公开(公告)日：2012-06-21
申请号：US13406062
申请日：2012-02-27
申请人： Rudolf Lachner , Josef Boeck , Klaus Aufinger , Herbert Knapp
发明人： Rudolf Lachner , Josef Boeck , Klaus Aufinger , Herbert Knapp
IPC分类号： H01L21/78 , H01L21/56
CPC分类号： H01L23/367 , H01L21/561 , H01L21/568 , H01L21/6835 , H01L23/3107 , H01L23/3128 , H01L23/4334 , H01L24/19 , H01L24/96 , H01L24/97 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2224/20 , H01L2224/92 , H01L2224/97 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01023 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/014 , H01L2924/10329 , H01L2924/12044 , H01L2924/14 , H01L2924/1423 , H01L2924/15174 , H01L2924/15311 , H01L2924/18162 , H01L2924/3025 , H01L2224/96 , H01L2224/82
摘要： A method includes providing a first semiconductor chip comprising a ring-shaped metal structure extending along a contour of a first main surface of the semiconductor chip. The method includes encapsulating the first semiconductor chip with an encapsulation body thereby defining a second main surface and depositing a metal layer over the first semiconductor chip and the encapsulation body. A plurality of external contact pads are placed over the second main surface of the encapsulation body, the metal layer electrically coupling at least one external contact pad of the plurality of external contact pads to the ring-shaped metal structure. A seal ring is placed between the ring-shaped metal structure and the contour of the first main surface of the first semiconductor chip.
摘要翻译：一种方法包括提供包括沿着半导体芯片的第一主表面的轮廓延伸的环形金属结构的第一半导体芯片。该方法包括用封装体封装第一半导体芯片，从而限定第二主表面，并在第一半导体芯片和封装体上沉积金属层。多个外部接触焊盘放置在封装主体的第二主表面上，金属层将多个外部接触焊盘中的至少一个外部接触焊盘电耦合到环形金属结构。在环形金属结构和第一半导体芯片的第一主表面的轮廓之间放置密封环。

4. 发明申请

US20110037163A1 DEVICE INCLUDING A RING-SHAPED METAL STRUCTURE AND METHOD 有权
标题翻译：包括环形金属结构和方法的装置
公开(公告)号：US20110037163A1
公开(公告)日：2011-02-17
申请号：US12540491
申请日：2009-08-13
申请人： Rudolf Lachner , Josef Boeck , Klaus Aufinger , Herbert Knapp
发明人： Rudolf Lachner , Josef Boeck , Klaus Aufinger , Herbert Knapp
IPC分类号： H01L23/48 , H01L21/60
CPC分类号： H01L23/367 , H01L21/561 , H01L21/568 , H01L21/6835 , H01L23/3107 , H01L23/3128 , H01L23/4334 , H01L24/19 , H01L24/96 , H01L24/97 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2224/20 , H01L2224/92 , H01L2224/97 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01023 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/014 , H01L2924/10329 , H01L2924/12044 , H01L2924/14 , H01L2924/1423 , H01L2924/15174 , H01L2924/15311 , H01L2924/18162 , H01L2924/3025 , H01L2224/96 , H01L2224/82
摘要： A device includes a semiconductor chip with a ring-shaped metal structure extending along the contour of a first main surface of the semiconductor chip. An encapsulation body encapsulates the semiconductor chip and defines a second main surface. An array of external contact pads attaches to the second main surface of the encapsulation body, and at least one external contact pad of the array of external contact pads electrically couples to the ring-shaped metal structure.
摘要翻译：一种器件包括具有沿着半导体芯片的第一主表面的轮廓延伸的环形金属结构的半导体芯片。封装体封装半导体芯片并限定第二主表面。外部接触焊盘的阵列连接到封装体的第二主表面，并且外部接触焊盘阵列中的至少一个外部接触焊盘电耦合到环形金属结构。

5. 发明授权

US09263362B2 Method of forming a ring-shaped metal structure 有权
标题翻译：形成环形金属结构的方法
公开(公告)号：US09263362B2
公开(公告)日：2016-02-16
申请号：US13406062
申请日：2012-02-27
申请人： Rudolf Lachner , Josef Boeck , Klaus Aufinger , Herbert Knapp
发明人： Rudolf Lachner , Josef Boeck , Klaus Aufinger , Herbert Knapp
IPC分类号： H01L23/31 , H01L23/367 , H01L21/56 , H01L21/683 , H01L23/433 , H01L23/00
CPC分类号： H01L23/367 , H01L21/561 , H01L21/568 , H01L21/6835 , H01L23/3107 , H01L23/3128 , H01L23/4334 , H01L24/19 , H01L24/96 , H01L24/97 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2224/20 , H01L2224/92 , H01L2224/97 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01023 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/014 , H01L2924/10329 , H01L2924/12044 , H01L2924/14 , H01L2924/1423 , H01L2924/15174 , H01L2924/15311 , H01L2924/18162 , H01L2924/3025 , H01L2224/96 , H01L2224/82
摘要： A method includes providing a first semiconductor chip comprising a ring-shaped metal structure extending along a contour of a first main surface of the semiconductor chip. The method includes encapsulating the first semiconductor chip with an encapsulation body thereby defining a second main surface and depositing a metal layer over the first semiconductor chip and the encapsulation body. A plurality of external contact pads are placed over the second main surface of the encapsulation body, the metal layer electrically coupling at least one external contact pad of the plurality of external contact pads to the ring-shaped metal structure. A seal ring is placed between the ring-shaped metal structure and the contour of the first main surface of the first semiconductor chip.
摘要翻译：一种方法包括提供包括沿着半导体芯片的第一主表面的轮廓延伸的环形金属结构的第一半导体芯片。该方法包括用封装体封装第一半导体芯片，从而限定第二主表面，并在第一半导体芯片和封装体上沉积金属层。多个外部接触焊盘放置在封装主体的第二主表面上，金属层将多个外部接触焊盘中的至少一个外部接触焊盘电耦合到环形金属结构。在环形金属结构和第一半导体芯片的第一主表面的轮廓之间放置密封环。

6. 发明授权

US08125072B2 Device including a ring-shaped metal structure and method 有权
标题翻译：装置包括环形金属结构和方法
公开(公告)号：US08125072B2
公开(公告)日：2012-02-28
申请号：US12540491
申请日：2009-08-13
申请人： Rudolf Lachner , Josef Boeck , Klaus Aufinger , Herbert Knapp
发明人： Rudolf Lachner , Josef Boeck , Klaus Aufinger , Herbert Knapp
IPC分类号： H01L23/48
CPC分类号： H01L23/367 , H01L21/561 , H01L21/568 , H01L21/6835 , H01L23/3107 , H01L23/3128 , H01L23/4334 , H01L24/19 , H01L24/96 , H01L24/97 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2224/20 , H01L2224/92 , H01L2224/97 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01023 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/014 , H01L2924/10329 , H01L2924/12044 , H01L2924/14 , H01L2924/1423 , H01L2924/15174 , H01L2924/15311 , H01L2924/18162 , H01L2924/3025 , H01L2224/96 , H01L2224/82
摘要： A device includes a semiconductor chip with a ring-shaped metal structure extending along the contour of a first main surface of the semiconductor chip. An encapsulation body encapsulates the semiconductor chip and defines a second main surface. An array of external contact pads attaches to the second main surface of the encapsulation body, and at least one external contact pad of the array of external contact pads electrically couples to the ring-shaped metal structure.
摘要翻译：一种器件包括具有沿着半导体芯片的第一主表面的轮廓延伸的环形金属结构的半导体芯片。封装体封装半导体芯片并限定第二主表面。外部接触焊盘的阵列连接到封装体的第二主表面，并且外部接触焊盘阵列中的至少一个外部接触焊盘电耦合到环形金属结构。

7. 发明授权

US08237603B2 Receiver test circuits, systems and methods 有权
标题翻译：接收机测试电路，系统和方法
公开(公告)号：US08237603B2
公开(公告)日：2012-08-07
申请号：US12696220
申请日：2010-01-29
申请人： Herbert Knapp , Erich Kolmhofer
发明人： Herbert Knapp , Erich Kolmhofer
IPC分类号： G01S7/40
CPC分类号： G01S7/4021 , G01S13/931 , G01S2007/406
摘要： Embodiments relate to apparatuses, systems and methods for testing high-frequency receivers. In an embodiment, a method includes integrating a pulse train generator and a receiver in an integrated circuit; generating a pulse train by the pulse train generator and applying the pulse train to an input of the receiver; measuring at least one property of the pulse train; and determining at least one characteristic of the receiver using the at least one property of the pulse train. In an embodiment, an integrated circuit includes a receiver, and a pulse train generator configured to generate a pulse train and apply the pulse train to an input of the receiver, wherein at least one characteristic of the receiver can be determined using at least one measured property of the pulse train.
摘要翻译：实施例涉及用于测试高频接收机的设备，系统和方法。在一个实施例中，一种方法包括在集成电路中集成脉冲串发生器和接收器; 通过脉冲串发生器产生脉冲序列并将脉冲串施加到接收机的输入端; 测量脉冲串的至少一个属性; 以及使用所述脉冲串的所述至少一个属性来确定所述接收机的至少一个特性。在一个实施例中，集成电路包括接收器和脉冲串发生器，其被配置为产生脉冲串并将脉冲串施加到接收器的输入端，其中接收器的至少一个特性可以使用至少一个测量的脉冲列车的属性。

8. 发明申请

US20060028250A1 Frequency converter circuit 审中-公开
标题翻译：变频器电路
公开(公告)号：US20060028250A1
公开(公告)日：2006-02-09
申请号：US11149450
申请日：2005-06-08
申请人： Herbert Knapp , Martin Wurzer
发明人： Herbert Knapp , Martin Wurzer
IPC分类号： H03B19/00
CPC分类号： H03K21/08 , H03K21/17
摘要： A frequency converter circuit having at least one frequency converter element and a load stage. The frequency converter element has at least one signal input and at least one signal output, the frequency converter element being set up such that a signal provided at the signal output has a different signal frequency than a signal fed in at the signal input. The load stage has at least one nonreactive resistor coupled between the frequency converter element and a power feeding terminal and at least one inductance coupled in series with said resistor, and at least one capacitance whose first terminal is coupled between the nonreactive resistor and the inductance and whose second terminal is coupled to a power supply terminal.
摘要翻译：一种具有至少一个变频器元件和负载级的变频器电路。变频器元件具有至少一个信号输入和至少一个信号输出，所述变频器元件被设置为使得在信号输出处提供的信号具有与在信号输入端馈入的信号不同的信号频率。负载级具有耦合在变频器元件和馈电端子之间的至少一个非反应电阻器和与所述电阻器串联耦合的至少一个电感器，以及至少一个电容器，其第一端子耦合在非反应电阻器和电感器之间，其第二端子耦合到电源端子。

9. 发明授权

US08810330B2 DC power supply circuit, oscillator circuit and method for generating a DC power supply signal 有权
标题翻译：直流电源电路，振荡电路及产生直流电源信号的方法
公开(公告)号：US08810330B2
公开(公告)日：2014-08-19
申请号：US13619963
申请日：2012-09-14
申请人： Saverio Trotta , Winfried Bakalski , Herbert Knapp
发明人： Saverio Trotta , Winfried Bakalski , Herbert Knapp
IPC分类号： H03L1/00 , G05F1/46
CPC分类号： G05F1/46 , H03L7/099 , H03L7/18
摘要： A DC power supply circuit comprises an output configured to provide a power supply signal to an RF element for generating an RF output signal. Furthermore, the DC power supply circuit comprises an input configured to receive the RF output signal. The DC power supply circuit is configured to generate the DC power supply signal based on the received RF output signal.
摘要翻译：直流电源电路包括被配置为向RF元件提供电源信号以产生RF输出信号的输出。此外，直流电源电路包括被配置为接收RF输出信号的输入。直流电源电路被配置为基于接收到的RF输出信号生成直流电源信号。

10. 发明申请

US20060232349A1 Integrated circuit arrangement 有权
公开(公告)号：US20060232349A1
公开(公告)日：2006-10-19
申请号：US10520805
申请日：2003-07-11
申请人： Daniel Kehrer , Herbert Knapp
发明人： Daniel Kehrer , Herbert Knapp
IPC分类号： G01D5/20
CPC分类号： H03F3/45183 , H01L2924/0002 , H03F2203/45562 , H03F2203/45638 , H03H7/0115 , H01L2924/00
摘要： An integrated circuit arrangement is disclosed. In one embodiment, the integrated circuit arrangement includes an output circuit having at least one first output connection which can provide a data signal, at least one first data output connection; and at least one first inductance connected between the at least one first output connection and the at least one data output connection.

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