专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US09252095B2 Semiconductor package and method of fabricating the same 有权
标题翻译：半导体封装及其制造方法
公开(公告)号：US09252095B2
公开(公告)日：2016-02-02
申请号：US13922722
申请日：2013-06-20
申请人： Jongkook Kim , Su-min Park , Soojeoung Park , Bona Baek , Hohyeuk Im , Byoungwook Jang , Yoonha Jung
发明人： Jongkook Kim , Su-min Park , Soojeoung Park , Bona Baek , Hohyeuk Im , Byoungwook Jang , Yoonha Jung
IPC分类号： H01L23/498 , H01L21/56 , H01L23/00 , H01L23/13 , H01L25/065 , H01L25/10 , H01L23/31
CPC分类号： H01L23/3107 , H01L21/56 , H01L21/561 , H01L21/565 , H01L23/13 , H01L23/3128 , H01L23/49811 , H01L23/49816 , H01L23/5386 , H01L24/97 , H01L25/0657 , H01L25/105 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/73253 , H01L2224/73265 , H01L2224/97 , H01L2225/0651 , H01L2225/06517 , H01L2225/06558 , H01L2225/1023 , H01L2225/1058 , H01L2225/1076 , H01L2924/12042 , H01L2924/15151 , H01L2924/15311 , H01L2924/181 , H01L2924/18301 , H01L2924/00014 , H01L2224/85 , H01L2224/81 , H01L2924/00 , H01L2924/00012
摘要： Provided are a semiconductor package and a method of fabricating the same. The package substrate includes a hole, which may be used to form a mold layer without any void. The mold layer may be partially removed to expose a lower conductive pattern. Accordingly, it is possible to improve routability of solder balls.
摘要翻译：提供半导体封装及其制造方法。封装基板包括孔，其可用于形成没有任何空隙的模具层。可以部分去除模具层以暴露下部导电图案。因此，可以提高焊球的布线性。

2. 发明申请

US20160111347A1 SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME 审中-公开
标题翻译：半导体封装及其制造方法
公开(公告)号：US20160111347A1
公开(公告)日：2016-04-21
申请号：US14984519
申请日：2015-12-30
申请人： Jongkook Kim , Su-min Park , Soojeoung Park , Bona Baek , Hohyeuk Im , Byoungwook Jang , Yoonha Jung
发明人： Jongkook Kim , Su-min Park , Soojeoung Park , Bona Baek , Hohyeuk Im , Byoungwook Jang , Yoonha Jung
IPC分类号： H01L23/31 , H01L23/538
CPC分类号： H01L23/3107 , H01L21/56 , H01L21/561 , H01L21/565 , H01L23/13 , H01L23/3128 , H01L23/49811 , H01L23/49816 , H01L23/5386 , H01L24/97 , H01L25/0657 , H01L25/105 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/73253 , H01L2224/73265 , H01L2224/97 , H01L2225/0651 , H01L2225/06517 , H01L2225/06558 , H01L2225/1023 , H01L2225/1058 , H01L2225/1076 , H01L2924/12042 , H01L2924/15151 , H01L2924/15311 , H01L2924/181 , H01L2924/18301 , H01L2924/00014 , H01L2224/85 , H01L2224/81 , H01L2924/00 , H01L2924/00012
摘要： Provided are a semiconductor package and a method of fabricating the same. The package substrate includes a hole, which may be used to form a mold layer without any void. The mold layer may be partially removed to expose a lower conductive pattern. Accordingly, it is possible to improve routability of solder balls.
摘要翻译：提供半导体封装及其制造方法。封装基板包括孔，其可用于形成没有任何空隙的模具层。可以部分去除模具层以暴露下部导电图案。因此，可以提高焊球的布线性。

3. 发明申请

US20110057297A1 SEMICONDUCTOR CHIPS HAVING GUARD RINGS AND METHODS OF FABRICATING THE SAME 有权
标题翻译：具有保护环的半导体芯片及其制造方法
公开(公告)号：US20110057297A1
公开(公告)日：2011-03-10
申请号：US12875382
申请日：2010-09-03
申请人： Jung-Do Lee , Jongkook Kim , Seok Won Lee , Jaesik Lee , Hohyeuk Im , Su-min Park
发明人： Jung-Do Lee , Jongkook Kim , Seok Won Lee , Jaesik Lee , Hohyeuk Im , Su-min Park
IPC分类号： H01L23/544
CPC分类号： H01L21/78 , H01L23/562 , H01L23/585 , H01L2924/0002 , H01L2924/00
摘要： Provided is a semiconductor chip. The semiconductor chip includes a semiconductor substrate including a main chip region and a scribe lane region surrounding the main chip region. An insulating layer is disposed over the semiconductor substrate. A guard ring is disposed in the insulating layer in the scribe lane region. The guard ring surrounds at least a portion of the main chip region. The guard ring has a brittleness greater than a brittleness of the insulating layer.
摘要翻译：提供了一种半导体芯片。半导体芯片包括包括主芯片区域和围绕主芯片区域的划线通道区域的半导体衬底。绝缘层设置在半导体衬底上。保护环设置在划线区域的绝缘层中。防护环围绕主芯片区域的至少一部分。保护环的脆性大于绝缘层的脆性。

4. 发明授权

US08354735B2 Semiconductor chips having guard rings and methods of fabricating the same 有权
标题翻译：具有保护环的半导体芯片及其制造方法
公开(公告)号：US08354735B2
公开(公告)日：2013-01-15
申请号：US12875382
申请日：2010-09-03
申请人： Jung-Do Lee , Jongkook Kim , Seok Won Lee , Jaesik Lee , Hohyeuk Im , Su-min Park
发明人： Jung-Do Lee , Jongkook Kim , Seok Won Lee , Jaesik Lee , Hohyeuk Im , Su-min Park
IPC分类号： H01L23/544
CPC分类号： H01L21/78 , H01L23/562 , H01L23/585 , H01L2924/0002 , H01L2924/00
摘要： Provided is a semiconductor chip. The semiconductor chip includes a semiconductor substrate including a main chip region and a scribe lane region surrounding the main chip region. An insulating layer is disposed over the semiconductor substrate. A guard ring is disposed in the insulating layer in the scribe lane region. The guard ring surrounds at least a portion of the main chip region. The guard ring has a brittleness greater than a brittleness of the insulating layer.
摘要翻译：提供了一种半导体芯片。半导体芯片包括包括主芯片区域和围绕主芯片区域的划线通道区域的半导体衬底。绝缘层设置在半导体衬底上。保护环设置在划线区域的绝缘层中。防护环围绕主芯片区域的至少一部分。保护环的脆性大于绝缘层的脆性。

5. 发明授权

US09370098B2 Package substrates and integrated circuit packages including the same 有权
标题翻译：封装衬底和集成电路封装包括相同
公开(公告)号：US09370098B2
公开(公告)日：2016-06-14
申请号：US14569845
申请日：2014-12-15
申请人： Byoung Wook Jang , Jongkook Kim , Su-min Park
发明人： Byoung Wook Jang , Jongkook Kim , Su-min Park
IPC分类号： H05K1/11 , H01L23/00 , H01L23/498
CPC分类号： H05K1/111 , H01L23/49816 , H01L23/49838 , H01L24/14 , H01L2224/16225 , H01L2224/16238 , H01L2924/15311 , H05K2201/09227 , H05K2201/094 , H05K2201/10674 , Y02P70/611
摘要： Packages substrates are provided. The package substrates may include a substrate and a set of leads disposed on the substrate. The set of lead may include a first lead, a second lead and a third lead, which are sequentially disposed along a first direction. Each of the first lead, the second lead and the third lead may extend along a second direction that is different from the first direction. The first lead and the second lead may be spaced apart at a first distance, and the second lead and the third lead may be spaced apart at a second distance that is less than the first distance.
摘要翻译：提供包装底物。封装衬底可以包括衬底和设置在衬底上的一组引线。该组引线可以包括沿着第一方向依次布置的第一引线，第二引线和第三引线。第一引线，第二引线和第三引线中的每一个可沿与第一方向不同的第二方向延伸。第一引线和第二引线可以以第一距离间隔开，并且第二引线和第三引线可以以小于第一距离的第二距离间隔开。

6. 发明申请

US20150364334A1 METHOD OF FORMING PATTERNS AND METHOD OF MANUFACTURING INTEGRATED CIRCUIT DEVICE 有权
标题翻译：形成图案的方法和制造集成电路装置的方法
公开(公告)号：US20150364334A1
公开(公告)日：2015-12-17
申请号：US14695047
申请日：2015-04-24
申请人： Yool Kang , Dong-won Kim , Ju-young Kim , Tae-hoon Kim , Hye-ji Lee , Su-min Park , Hyung-rae Lee
发明人： Yool Kang , Dong-won Kim , Ju-young Kim , Tae-hoon Kim , Hye-ji Lee , Su-min Park , Hyung-rae Lee
IPC分类号： H01L21/308 , H01L21/311 , H01L21/02 , H01L21/027
CPC分类号： H01L21/3086 , H01L21/0273 , H01L21/0332 , H01L21/0337 , H01L21/3081 , H01L21/31144 , H01L21/32139 , H01L21/76816 , H01L27/10814 , H01L27/10855 , H01L27/10885 , H01L27/10888
摘要： Provided are a method of forming patterns and a method of manufacturing an integrated circuit device. In the method of forming patterns, a photoresist pattern having a first opening exposing a first region of a target layer is formed. A capping layer is formed at sidewalls of the photoresist pattern defining the first opening. An insoluble region is formed around the first opening by diffusing acid from the capping layer to the inside of the photoresist pattern. A second opening exposing a second region of the target layer is formed by removing a soluble region spaced apart from the first opening, with the insoluble region being interposed therebetween. The target layer is etched using the insoluble region as an etch mask.
摘要翻译：提供形成图案的方法和制造集成电路器件的方法。在形成图案的方法中，形成具有暴露目标层的第一区域的第一开口的光致抗蚀剂图案。在限定第一开口的光致抗蚀剂图案的侧壁处形成覆盖层。通过将酸从封盖层扩散到光致抗蚀剂图案的内部，在第一开口周围形成不溶性区域。通过去除与第一开口间隔开的可溶性区域形成暴露目标层的第二区域的第二开口，其中插入不溶性区域。使用不溶性区域作为蚀刻掩模蚀刻靶层。

7. 发明授权

US08225142B2 Method and system for tracepoint-based fault diagnosis and recovery 有权
标题翻译：基于跟踪点故障诊断和恢复的方法和系统
公开(公告)号：US08225142B2
公开(公告)日：2012-07-17
申请号：US12787086
申请日：2010-05-25
申请人： Kwang Yong Lee , Su-min Park
发明人： Kwang Yong Lee , Su-min Park
IPC分类号： G06F11/00
CPC分类号： G06F11/079
摘要： A system for tracepoint-based fault diagnosis and recovery includes: a system state tracing model unit for storing state tracing models which are obtained by a modeling technique and are required for fault diagnosis and recovery; a state diagnosis unit for determining whether or not an action event is executable with reference to the state tracing models when the action event is received from a specific tracepoint among multiple tracepoints which exist in each of components within an operating system of the system, and generating a fault recovery command when it is determined that the action is not executable, that is, a fault has occurred; and a fault recovery unit for performing a fault recovery processing based on the state tracing models in response to the generated fault recovery command.
摘要翻译：用于基于跟踪点的故障诊断和恢复系统包括：用于存储通过建模技术获得并且是故障诊断和恢复所需的状态跟踪模型的系统状态跟踪模型单元; 状态诊断单元，用于当从所述系统的操作系统中的每个组件中存在的多个跟踪点中的特定跟踪点接收到所述动作事件时，参考所述状态跟踪模型来确定动作事件是否可执行，并且生成确定动作不可执行的故障恢复命令，即已发生故障; 以及故障恢复单元，用于响应于所生成的故障恢复命令，基于状态跟踪模型执行故障恢复处理。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式