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1. 发明授权

US09252095B2 Semiconductor package and method of fabricating the same 有权
标题翻译：半导体封装及其制造方法
公开(公告)号：US09252095B2
公开(公告)日：2016-02-02
申请号：US13922722
申请日：2013-06-20
申请人： Jongkook Kim , Su-min Park , Soojeoung Park , Bona Baek , Hohyeuk Im , Byoungwook Jang , Yoonha Jung
发明人： Jongkook Kim , Su-min Park , Soojeoung Park , Bona Baek , Hohyeuk Im , Byoungwook Jang , Yoonha Jung
IPC分类号： H01L23/498 , H01L21/56 , H01L23/00 , H01L23/13 , H01L25/065 , H01L25/10 , H01L23/31
CPC分类号： H01L23/3107 , H01L21/56 , H01L21/561 , H01L21/565 , H01L23/13 , H01L23/3128 , H01L23/49811 , H01L23/49816 , H01L23/5386 , H01L24/97 , H01L25/0657 , H01L25/105 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/73253 , H01L2224/73265 , H01L2224/97 , H01L2225/0651 , H01L2225/06517 , H01L2225/06558 , H01L2225/1023 , H01L2225/1058 , H01L2225/1076 , H01L2924/12042 , H01L2924/15151 , H01L2924/15311 , H01L2924/181 , H01L2924/18301 , H01L2924/00014 , H01L2224/85 , H01L2224/81 , H01L2924/00 , H01L2924/00012
摘要： Provided are a semiconductor package and a method of fabricating the same. The package substrate includes a hole, which may be used to form a mold layer without any void. The mold layer may be partially removed to expose a lower conductive pattern. Accordingly, it is possible to improve routability of solder balls.
摘要翻译：提供半导体封装及其制造方法。封装基板包括孔，其可用于形成没有任何空隙的模具层。可以部分去除模具层以暴露下部导电图案。因此，可以提高焊球的布线性。

2. 发明申请

US20160111347A1 SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME 审中-公开
标题翻译：半导体封装及其制造方法
公开(公告)号：US20160111347A1
公开(公告)日：2016-04-21
申请号：US14984519
申请日：2015-12-30
申请人： Jongkook Kim , Su-min Park , Soojeoung Park , Bona Baek , Hohyeuk Im , Byoungwook Jang , Yoonha Jung
发明人： Jongkook Kim , Su-min Park , Soojeoung Park , Bona Baek , Hohyeuk Im , Byoungwook Jang , Yoonha Jung
IPC分类号： H01L23/31 , H01L23/538
CPC分类号： H01L23/3107 , H01L21/56 , H01L21/561 , H01L21/565 , H01L23/13 , H01L23/3128 , H01L23/49811 , H01L23/49816 , H01L23/5386 , H01L24/97 , H01L25/0657 , H01L25/105 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/73253 , H01L2224/73265 , H01L2224/97 , H01L2225/0651 , H01L2225/06517 , H01L2225/06558 , H01L2225/1023 , H01L2225/1058 , H01L2225/1076 , H01L2924/12042 , H01L2924/15151 , H01L2924/15311 , H01L2924/181 , H01L2924/18301 , H01L2924/00014 , H01L2224/85 , H01L2224/81 , H01L2924/00 , H01L2924/00012
摘要： Provided are a semiconductor package and a method of fabricating the same. The package substrate includes a hole, which may be used to form a mold layer without any void. The mold layer may be partially removed to expose a lower conductive pattern. Accordingly, it is possible to improve routability of solder balls.
摘要翻译：提供半导体封装及其制造方法。封装基板包括孔，其可用于形成没有任何空隙的模具层。可以部分去除模具层以暴露下部导电图案。因此，可以提高焊球的布线性。

3. 发明申请

US20110057297A1 SEMICONDUCTOR CHIPS HAVING GUARD RINGS AND METHODS OF FABRICATING THE SAME 有权
标题翻译：具有保护环的半导体芯片及其制造方法
公开(公告)号：US20110057297A1
公开(公告)日：2011-03-10
申请号：US12875382
申请日：2010-09-03
申请人： Jung-Do Lee , Jongkook Kim , Seok Won Lee , Jaesik Lee , Hohyeuk Im , Su-min Park
发明人： Jung-Do Lee , Jongkook Kim , Seok Won Lee , Jaesik Lee , Hohyeuk Im , Su-min Park
IPC分类号： H01L23/544
CPC分类号： H01L21/78 , H01L23/562 , H01L23/585 , H01L2924/0002 , H01L2924/00
摘要： Provided is a semiconductor chip. The semiconductor chip includes a semiconductor substrate including a main chip region and a scribe lane region surrounding the main chip region. An insulating layer is disposed over the semiconductor substrate. A guard ring is disposed in the insulating layer in the scribe lane region. The guard ring surrounds at least a portion of the main chip region. The guard ring has a brittleness greater than a brittleness of the insulating layer.
摘要翻译：提供了一种半导体芯片。半导体芯片包括包括主芯片区域和围绕主芯片区域的划线通道区域的半导体衬底。绝缘层设置在半导体衬底上。保护环设置在划线区域的绝缘层中。防护环围绕主芯片区域的至少一部分。保护环的脆性大于绝缘层的脆性。

4. 发明授权

US08354735B2 Semiconductor chips having guard rings and methods of fabricating the same 有权
标题翻译：具有保护环的半导体芯片及其制造方法
公开(公告)号：US08354735B2
公开(公告)日：2013-01-15
申请号：US12875382
申请日：2010-09-03
申请人： Jung-Do Lee , Jongkook Kim , Seok Won Lee , Jaesik Lee , Hohyeuk Im , Su-min Park
发明人： Jung-Do Lee , Jongkook Kim , Seok Won Lee , Jaesik Lee , Hohyeuk Im , Su-min Park
IPC分类号： H01L23/544
CPC分类号： H01L21/78 , H01L23/562 , H01L23/585 , H01L2924/0002 , H01L2924/00
摘要： Provided is a semiconductor chip. The semiconductor chip includes a semiconductor substrate including a main chip region and a scribe lane region surrounding the main chip region. An insulating layer is disposed over the semiconductor substrate. A guard ring is disposed in the insulating layer in the scribe lane region. The guard ring surrounds at least a portion of the main chip region. The guard ring has a brittleness greater than a brittleness of the insulating layer.
摘要翻译：提供了一种半导体芯片。半导体芯片包括包括主芯片区域和围绕主芯片区域的划线通道区域的半导体衬底。绝缘层设置在半导体衬底上。保护环设置在划线区域的绝缘层中。防护环围绕主芯片区域的至少一部分。保护环的脆性大于绝缘层的脆性。

5. 发明授权

US09881822B2 Multi-stepped boat assembly for receiving semiconductor packages 有权
公开(公告)号：US09881822B2
公开(公告)日：2018-01-30
申请号：US14856048
申请日：2015-09-16
申请人： Sunrak Kim , Hohyeuk Im
发明人： Sunrak Kim , Hohyeuk Im
IPC分类号： H01L21/673
CPC分类号： H01L21/67333 , H01L2224/16145 , H01L2224/97
摘要： A multi-stepped boat assembly includes a stack boat having at least one stack hole configured to receive a first semiconductor package and a second semiconductor package vertically stacked on the first semiconductor package in the stack hole. A guide boat has at least one guide hole vertically aligned with the at least one stack hole. The guide boat is removably attachable to the stack boat. An inner sidewall of the stack hole includes a first step configured to receive the first semiconductor package, and a second step provided on the first step and configured to receive the second semiconductor package. The guide hole extends toward the stack hole to guide movement of the first semiconductor package to the first step.

6. 发明申请

US20160086834A1 Multi-Stepped Boat Assembly for Receiving Semiconductor Packages 有权
标题翻译：用于接收半导体封装的多步骤船组件
公开(公告)号：US20160086834A1
公开(公告)日：2016-03-24
申请号：US14856048
申请日：2015-09-16
申请人： Sunrak Kim , Hohyeuk Im
发明人： Sunrak Kim , Hohyeuk Im
IPC分类号： H01L21/673
CPC分类号： H01L21/67333 , H01L2224/16145 , H01L2224/97
摘要： A multi-stepped boat assembly includes a stack boat having at least one stack hole configured to receive a first semiconductor package and a second semiconductor package vertically stacked on the first semiconductor package in the stack hole. A guide boat has at least one guide hole vertically aligned with the at least one stack hole. The guide boat is removably attachable to the stack boat. An inner sidewall of the stack hole includes a first step configured to receive the first semiconductor package, and a second step provided on the first step and configured to receive the second semiconductor package. The guide hole extends toward the stack hole to guide movement of the first semiconductor package to the first step.
摘要翻译：多级船组件包括具有构造成容纳第一半导体封装的至少一个堆叠孔和堆叠在第一半导体封装中的第二半导体封装的堆叠舟。引导舟具有与所述至少一个堆叠孔垂直对准的至少一个引导孔。引导船可拆卸地连接到堆垛船。堆叠孔的内侧壁包括被配置为接收第一半导体封装的第一台阶，以及设置在第一台阶上并被配置为接收第二半导体封装的第二台阶。引导孔朝向堆叠孔延伸以引导第一半导体封装件的运动到第一步骤。

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