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1. 发明授权

US4386359A Line printer attachment 失效
标题翻译：行式打印机附件
公开(公告)号：US4386359A
公开(公告)日：1983-05-31
申请号：US336649
申请日：1982-01-04
申请人： John L. Regehr , Phillip C. Schloss
发明人： John L. Regehr , Phillip C. Schloss
IPC分类号： G06F3/12 , G06F3/153 , G06K15/00 , G01D9/00
CPC分类号： G06K15/00 , G06K2215/0091
摘要： A line printer attachment for converting a display screen copier printer to a line printer. The last or extra line of the display is used as the line print buffer. An initiate print signal is generated upon detecting that the last or extra line is to be scanned. The initiate print signal is used to blank or inhibit the serial video data from the display screen and to enable the printer. The serial video data is constantly sent to the printer attachment but is ignored until the printer is enabled. With the printer enabled, printing takes place using the line print buffer data which has been serialized as serial video data. The print buffer data remains unchanged during the entire printing of the line where the printing is done in series of horizontal lines to complete the printing of a line. At the end of each horizontal line of print a vertical screen retrace occurs and the display screen is swept where again the last or extra line is detected and another initiate print signal is generated. The next horizontal line of the series of horizontal lines for completing a line of print is printed and the operation repeats until an entire line of printing is completed.
摘要翻译：用于将显示屏复印机打印机转换成行式打印机的行式打印机附件。显示的最后一行或多行用作行打印缓冲区。在检测到最后或额外的行被扫描时，产生启动打印信号。启动打印信号用于空白或禁止来自显示屏幕的串行视频数据，并启用打印机。串行视频数据不断发送到打印机附件，但在打印机启用之前会被忽略。启用打印机后，使用已经串行化为串行视频数据的行打印缓冲区数据进行打印。打印缓冲区数据在打印完成的行的整个打印过程中保持不变，以完成打印一行。在每个水平线打印结束时，发生垂直屏幕回扫，并且显示屏幕被扫描，再次检测到最后或额外的行，并且产生另一个启动打印信号。打印用于完成打印行的一系列水平行的下一个水平线，并重复该操作，直到整个打印行完成。

2. 发明授权

US5251130A Method and apparatus for facilitating contextual language translation within an interactive software application 失效
标题翻译：用于促进交互式软件应用程序内的语境翻译的方法和装置
公开(公告)号：US5251130A
公开(公告)日：1993-10-05
申请号：US687257
申请日：1991-04-18
申请人： Gregory P. Andrews , Phillip C. Schloss
发明人： Gregory P. Andrews , Phillip C. Schloss
IPC分类号： G06F17/28 , G06F15/38
CPC分类号： G06F17/2836 , G06F17/289
摘要： A method and apparatus for facilitating the contextual translation of textual entries within an interactive software application which is executable within a data processing system. A contextual translation procedure is created and inserted into a selected interactive software application. During execution of the selected interactive software application, display screens containing textual entries are typically generated. Upon encountering a screen requiring translation an operator may invoke the contextual translation procedure, causing a translation viewport to be displayed. Individual translate phrases within the display screen are then selected and displayed within the translation viewport. A contextual translation may then be entered into the translation viewport by a translator and displayed therein in proximity to the selected translatable phrase. Upon completion of translation of a selected phrase, the newly created translation is substituted for the existing phrase within the display screen, automatically altering the display area, if necessary, and a subsequent translatable phrase may be selected. In this manner, translation may occur during actual execution of an interactive software application, permitting contextual variations to be observed and compensated for.
摘要翻译：一种便于在数据处理系统内可执行的交互式软件应用程序内的文本条目的上下文翻译的方法和装置。创建上下文翻译过程并将其插入到选定的交互式软件应用程序中。在执行选定的交互式软件应用程序期间，通常会生成包含文本条目的显示屏幕。当遇到需要翻译的屏幕时，操作员可以调用上下文翻译过程，导致翻译视口被显示。然后在显示屏幕内单独翻译短语，然后在翻译视口中进行显示。然后可以由翻译器将上下文翻译输入到翻译视口中，并在其中显示在所选择的可翻译短语附近。在完成所选择的短语的翻译之后，新创建的翻译代替显示屏幕中的现有短语，如有必要，自动改变显示区域，并且可以选择随后的可翻译短语。以这种方式，可以在实际执行交互式软件应用程序期间进行翻译，从而允许观察和补偿上下文变化。

3. 发明授权

US4130868A Independently controllable multiple address registers for a data processor 失效
标题翻译：用于数据处理器的独立可控的多个地址寄存器
公开(公告)号：US4130868A
公开(公告)日：1978-12-19
申请号：US786921
申请日：1977-04-12
申请人： Dale A. Heuer , Charles W. McCallister , Phillip C. Schloss
发明人： Dale A. Heuer , Charles W. McCallister , Phillip C. Schloss
IPC分类号： G06F12/02 , G06F9/06 , G06F9/315 , G06F9/34 , G06F12/00 , G06F9/20
CPC分类号： G06F9/30032 , G06F9/06
摘要： A microprocessor has a common data bus coupled to a storage data register, two separate storage address registers and a storage control unit. The data register transfers data to and from a storage unit addressed by that address register selected by a gating means. The address registers can be independently incremented and decremented, and perform either a read or a write operation. All these functions are specified by signals produced from a control word held in the storage control unit.
摘要翻译：微处理器具有耦合到存储数据寄存器，两个单独的存储地址寄存器和存储控制单元的公共数据总线。数据寄存器将数据传送到由选通装置选择的该地址寄存器寻址的存储单元。地址寄存器可以独立递增和递减，并执行读操作或写操作。所有这些功能由从存储控制单元中保持的控制字产生的信号指定。

4. 发明授权

US4709328A Composite data-processing system using multiple standalone processing systems 失效
标题翻译：使用多个独立处理系统的复合数据处理系统
公开(公告)号：US4709328A
公开(公告)日：1987-11-24
申请号：US745546
申请日：1985-06-17
申请人： Bruce O. Anthony, Jr. , Glenn D. Batalden , Glen R. Mitchell , Phillip C. Schloss , David K. Wells
发明人： Bruce O. Anthony, Jr. , Glenn D. Batalden , Glen R. Mitchell , Phillip C. Schloss , David K. Wells
IPC分类号： G06F13/12 , G06F13/38 , G06F15/00 , G06F15/16 , G06F15/167
CPC分类号： G06F13/385 , G06F13/124 , G06F15/161 , G06F15/167
摘要： Two different data-processing systems are interconnected into a composite system by a shared memory in the address space of each, and by a virtual channel which generates interrupts so that each system can control the other. Each system can execute standalone programs. In addition, one of them acts as an emulated terminal for the other, and also as a system console for the other.
摘要翻译：两个不同的数据处理系统通过每个地址空间中的共享存储器和由产生中断的虚拟通道互连到复合系统中，使得每个系统可以控制另一个。每个系统都可以执行独立程序。此外，其中一个作为另一个的仿真终端，也作为另一个的系统控制台。

5. 发明授权

US4144563A Microprocessor system 失效
公开(公告)号：US4144563A
公开(公告)日：1979-03-13
申请号：US853784
申请日：1977-11-21
申请人： Dale A. Heuer , Phillip C. Schloss , Larry L. Schroeder
发明人： Dale A. Heuer , Phillip C. Schloss , Larry L. Schroeder
IPC分类号： G06F7/38 , G06F7/00 , G06F7/50 , G06F7/508 , G06F9/22 , G06F9/30 , G06F12/00 , G06F12/06 , G06F15/16 , G06F15/177 , G06F15/78 , G06F1/00
CPC分类号： G06F15/7864
摘要： A single chip large scale integration processor processes its own on-chip control storage array while including the ability to also address supplemental off-chip control storage and to use such off-chip supplemental storage in substitution for portions of the on-chip storage. The processor further includes simplified arithmetic and logic (ALU) circuitry wherein the adder circuit has portions selectively gated to perform other functions with a reduced logic circuit requirement. Processor function is also enhanced by providing a read only storage (ROS) array in association with the ALU to provide multiple register loading and control functions in response to certain addresses. The processor also includes memory control circuitry that permits a group of like processors to access a single, external memory on a dynamic, prioritized basis.

6. 发明授权

US5243519A Method and system for language translation within an interactive software application 失效
标题翻译：在交互式软件应用中进行语言翻译的方法和系统
公开(公告)号：US5243519A
公开(公告)日：1993-09-07
申请号：US837797
申请日：1992-02-18
申请人： Greg P. Andrews , William C. Rapp , Phillip C. Schloss , Daniel D. Schulz , Schuman Shao
发明人： Greg P. Andrews , William C. Rapp , Phillip C. Schloss , Daniel D. Schulz , Schuman Shao
IPC分类号： G06F15/00 , G06F3/023 , G06F3/033 , G06F3/048 , G06F9/44 , G06F17/28
CPC分类号： G06F17/2836 , G06F17/289 , G06F3/023 , G06F3/0481 , G06F9/4448
摘要： A method and system for facilitating language translation of text fields within an interactive software application. A control parameter is associated with each text field within an interactive softwave application prior to translation and utilized to automatically extract each text field for translation and to reinsert a translated text field thereafter. In certain interactive software applications which utilize fixed template user-interface structures, such as dialog boxes or menu templates, the architecture will not permit captions or menu pulldown controls to be identified within the template. In such applications, an additional artificial control parameter is included within the template which contains an identifier of the text field for the caption or menu pulldown control. Thereafter, the control parameters may be utilized to automatically extract text fields for translation. An attempted automatic extraction of text fields for translation in an application, which includes dialog boxes or menu templates, will result in an error message in the absence of the required artificial control parameter.
摘要翻译：一种用于促进交互式软件应用程序内的文本字段的语言翻译的方法和系统。控制参数在翻译之前与交互式软波应用程序中的每个文本字段相关联，并用于自动提取每个文本字段进行翻译，并在此之后重新插入翻译的文本字段。在使用固定模板用户界面结构（如对话框或菜单模板）的某些交互式软件应用程序中，架构将不允许在模板内识别字幕或菜单下拉控件。在这样的应用中，模板中包含一个附加的人工控制参数，该参数包含字幕或菜单下拉控件的文本字段的标识符。此后，可以利用控制参数来自动提取用于翻译的文本字段。在包括对话框或菜单模板的应用程序中尝试自动提取用于翻译的文本字段将在缺少所需的人工控制参数的情况下导致错误消息。

7. 发明授权

US4171536A Microprocessor system 失效
标题翻译：微处理器系统
公开(公告)号：US4171536A
公开(公告)日：1979-10-16
申请号：US857493
申请日：1977-12-05
申请人： Dale A. Heuer , Phillip C. Schloss , Larry L. Schroeder
发明人： Dale A. Heuer , Phillip C. Schloss , Larry L. Schroeder
IPC分类号： G06F13/18 , G06F15/78 , G06F15/16
CPC分类号： G06F13/18 , G06F15/7864
摘要： A single chip large scale integration processor processes its own on-chip control storage array while including the ability to also address supplemental off-chip control storage and to use such off-chip supplemental storage in substitution for portions of the on-chip storage. The processor further includes simplified arithmetic and logic (ALU) circuitry wherein the adder circuit has portions selectively gated to perform other functions with a reduced logic circuit requirement. Processor function is also enhanced by providing a read only storage (ROS) array in association with the ALU to provide multiple register loading and control functions in response to certain addresses. The processor also includes memory control circuitry that permits a group of like processors to access a single, external memory on a dynamic, prioritized basis.
摘要翻译：单芯片大规模集成处理器处理其自己的片上控制存储阵列，同时还包括解决补充片外控制存储的能力，并使用这样的片外补充存储来替代片上存储的部分。处理器还包括简化的算术和逻辑（ALU）电路，其中加法器电路具有选择性地选通以执行具有减小的逻辑电路要求的其他功能的部分。通过提供与ALU相关联的只读存储（ROS）阵列来增强处理器功能，以响应某些地址提供多个寄存器加载和控制功能。处理器还包括存储器控制电路，其允许一组相似的处理器以动态优先级为基础访问单个外部存储器。

8. 发明授权

US4144447A Interval timer 失效
标题翻译：间隔定时器
公开(公告)号：US4144447A
公开(公告)日：1979-03-13
申请号：US786918
申请日：1977-04-12
申请人： Bryce G. Fossum , Kenneth J. Markson , Phillip C. Schloss , James W. Wing
发明人： Bryce G. Fossum , Kenneth J. Markson , Phillip C. Schloss , James W. Wing
IPC分类号： G06F3/12 , G06F1/06 , G06F1/14 , G06K15/00 , G06M3/02
CPC分类号： G06F1/14
摘要： A device control circuit is disclosed which includes the provision of control commands at precise time intervals by gating each command at a time controlled by a continuously running counter to which is added the next event delay value. Upon reaching a predetermined fixed value the next event gating signal is generated. The delay value may be entered at any time prior to the elaspe of the delay time and all gating signals are accurately time related with regard to a fixed reference and to one another.
摘要翻译：公开了一种设备控制电路，其包括以精确的时间间隔提供控制命令，通过在由添加了下一个事件延迟值的连续运行计数器控制的时间选通每个命令。当达到预定的固定值时，产生下一个事件选通信号。可以在延迟时间的延迟之前的任何时间输入延迟值，并且所有门控信号相对于固定参考和彼此精确地与时间相关。

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