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1. 发明授权

US06600205B2 Method for making low voltage transistors with increased breakdown voltage to substrate having three different MOS transistors 有权
标题翻译：制造具有三个不同MOS晶体管的衬底的具有增加的击穿电压的低电压晶体管的方法
公开(公告)号：US06600205B2
公开(公告)日：2003-07-29
申请号：US10062215
申请日：2002-02-01
申请人： John H. Carpenter, Jr. , Joseph A. Devore , Toru Tanaka
发明人： John H. Carpenter, Jr. , Joseph A. Devore , Toru Tanaka
IPC分类号： H01L2900
CPC分类号： H01L21/823493 , H01L27/088 , H01L29/1087
摘要： A high-breakdown voltage transistor (30; 30′) is disclosed. The transistor (30; 30′) is formed into a well arrangement in which a shallow, heavily doped, well (44) is disposed at least partially within a deeper, more lightly-doped well (50), both formed into an epitaxial layer (43) of the substrate (42). The deep well (50) is also used, by itself, for the formation of high-voltage transistors, while the shallower well (44) is used by itself in low-voltage, high-performance transistors. This construction permits the use of high-performance, and precisely matching, transistors in high bias voltage applications, without fear of body-to-substrate (or “back-gate-to-substrate”) junction breakdown.
摘要翻译：公开了一种高耐压晶体管（30; 30'）。晶体管（30; 30'）形成为阱布置，其中浅的，重掺杂的阱（44）至少部分地设置在更深，更轻掺杂的阱（50）内，两者都形成为外延层（42）的（43）。深阱（50）本身也用于形成高压晶体管，而较浅的阱（44）本身用于低电压，高性能的晶体管。这种结构允许在高偏压应用中使用高性能和精确匹配的晶体管，而不用担心体对衬底（或“背栅极到衬底”）结击穿。

2. 发明授权

US06376870B1 Low voltage transistors with increased breakdown voltage to substrate 有权
标题翻译：具有对衬底的击穿电压增加的低压晶体管
公开(公告)号：US06376870B1
公开(公告)日：2002-04-23
申请号：US09658202
申请日：2000-09-08
申请人： John H. Carpenter, Jr. , Joseph A. Devore , Toru Tanaka , Ross E. Teggatz
发明人： John H. Carpenter, Jr. , Joseph A. Devore , Toru Tanaka , Ross E. Teggatz
IPC分类号： H01L2972
CPC分类号： H01L21/823493 , H01L27/088 , H01L29/1087
摘要： A high-breakdown voltage transistor (30; 30′) is disclosed. The transistor (30; 30′) is formed into a well arrangement in which a shallow, heavily doped, well (44) is disposed at least partially within a deeper, more lightly-doped well (50), both formed into an epitaxial layer (43) of the substrate (42). The deep well (50) is also used, by itself, for the formation of high-voltage transistors, while the shallower well (44) is used by itself in low-voltage, high-performance transistors. This construction permits the use of high-performance, and precisely matching, transistors in high bias voltage applications, without fear of body-to-substrate (or “back-gate-to-substrate”) junction breakdown.
摘要翻译：公开了一种高耐压晶体管（30; 30'）。晶体管（30; 30'）形成为阱布置，其中浅的，重掺杂的阱（44）至少部分地设置在更深，更轻掺杂的阱（50）内，两者都形成为外延层（42）的（43）。深阱（50）本身也用于形成高压晶体管，而较浅的阱（44）本身用于低电压，高性能的晶体管。这种结构允许在高偏压应用中使用高性能和精确匹配的晶体管，而不用担心体对衬底（或“背栅极到衬底”）结击穿。

3. 发明授权

US6111737A Internal voltage protection circuit 有权
标题翻译：内部电压保护电路
公开(公告)号：US6111737A
公开(公告)日：2000-08-29
申请号：US267490
申请日：1999-03-11
申请人： David J. Baldwin , Ross E. Teggatz , John H. Carpenter, Jr. , Joseph A. Devore
发明人： David J. Baldwin , Ross E. Teggatz , John H. Carpenter, Jr. , Joseph A. Devore
IPC分类号： H01L27/02 , H02H3/20
CPC分类号： H01L27/0251
摘要： An internal circuitry protection scheme which protects on-IC circuitry when an external regulator voltage pin is shorted to a higher voltage. The circuit prevents damage to the on-die circuitry that is on the internal voltage rail, by clamping the received voltage, thereby eliminating the chance of damaging the on die circuitry. The circuit offers protection even if the voltage difference is large, but the difference remains small between the internal rail and the external regulated voltage under normal operation.
摘要翻译：内部电路保护方案，当外部稳压器电压引脚短路到较高电压时，保护IC内部电路。该电路通过钳位接收到的电压来防止损坏内部电压轨上的片上电路，从而消除了损坏管芯电路的可能性。即使电压差大，电路也能提供保护，但在正常工作状态下，内部轨道与外部调节电压之间的差异仍然很小。

4. 发明授权

US06469884B1 Internal protection circuit and method for on chip programmable poly fuses 有权
标题翻译：片内可编程保险丝内部保护电路及方法
公开(公告)号：US06469884B1
公开(公告)日：2002-10-22
申请号：US09472710
申请日：1999-12-24
申请人： John H. Carpenter, Jr. , Joseph A. Devore , Reed Adams , Ross Teggatz
发明人： John H. Carpenter, Jr. , Joseph A. Devore , Reed Adams , Ross Teggatz
IPC分类号： H02H322
CPC分类号： G11C17/18
摘要： An integrated circuit (10) having at least one programmable fuse (F1) and ESD circuitry (MN3, MN1) preventing the fuse (F1) from being unintentionally blown when a voltage transient exists on a main voltage potential (Vmain). The ESD circuitry preferably comprises of MOSFET switches which are coupled to turn on quicker than a main fuse programming switch (MNmain) due to the voltage transient, thereby insuring that the main switch remains off during the voltage transient to prevent the unintentional blowing of the fuse F1. The circuit is well suited for programmable logic device (PLDs), allowing for read voltages as low as 6 volts, and allowing for programming voltages as high as 40 volts.
摘要翻译：具有至少一个可编程熔丝（F1）和ESD电路（MN3，MN1）的集成电路（10）防止当在主电压电位（Vmain）上存在电压瞬变时熔丝（F1）被无意地烧断。 ESD电路优选地包括MOSFET开关，其由于电压瞬变而被耦合以比主熔丝编程开关（MNmain）更快地接通，从而确保主开关在电压瞬变期间保持关断以防止熔丝的无意的吹动 F1。该电路非常适用于可编程逻辑器件（PLD），允许低至6伏的读取电压，并允许高达40伏的编程电压。

5. 发明授权

US07554309B2 Circuits, devices and methods for regulator minimum load control 有权
标题翻译：用于调节器最小负载控制的电路，器件和方法
公开(公告)号：US07554309B2
公开(公告)日：2009-06-30
申请号：US11132750
申请日：2005-05-18
申请人： John H. Carpenter, Jr. , Brett J. Thompsen , Benjamin L. Amey , Zhihong You , Joseph A. Devore
发明人： John H. Carpenter, Jr. , Brett J. Thompsen , Benjamin L. Amey , Zhihong You , Joseph A. Devore
IPC分类号： G05F1/40
CPC分类号： G05F1/618
摘要： Systems, methods and circuits for regulator minimum load control. In one particular case, a system is provided that includes a load control circuit and a switched load. The load control circuit includes a reference current, and a sense current representative of a load current. In addition, the load control circuit includes a comparator circuit that drives a control signal in response to a comparison between the reference current and the sense current. The switched load is electrically coupled to a load voltage signal to provide loading to the load voltage signal. The switched load is operable to switch between a first loading factor and a second loading factor in response to the control signal.
摘要翻译：用于调节器最小负载控制的系统，方法和电路。在一个特定情况下，提供了包括负载控制电路和开关负载的系统。负载控制电路包括参考电流和代表负载电流的感测电流。此外，负载控制电路包括响应于参考电流和感测电流之间的比较来驱动控制信号的比较器电路。开关负载电耦合到负载电压信号以向负载电压信号提供负载。切换负载可操作以响应于控制信号而在第一负载系数和第二负载系数之间切换。

6. 发明授权

US06407626B1 Analog filtering with symmetrical timing using a single comparator 有权
标题翻译：使用单个比较器进行对称定时的模拟滤波
公开(公告)号：US06407626B1
公开(公告)日：2002-06-18
申请号：US09715759
申请日：2000-11-17
申请人： John H. Carpenter, Jr. , Joseph A. Devore , Tohru Tanaka , Ross E. Teggatz
发明人： John H. Carpenter, Jr. , Joseph A. Devore , Tohru Tanaka , Ross E. Teggatz
IPC分类号： H03K500
CPC分类号： H03K5/1252 , H03K5/082
摘要： Provided is a symmetrical filter that uses a single comparator. In addition to a voltage divider, a current regulator, and a comparator, the filter of the invention provides control logic that turns on or off a pull up switch and/or pull down switch in order to fully charge or fully discharge a capacitor. Accordingly, in one aspect, the invention is a control logic for a symmetrical filter. Furthermore, timing logic is provided to provide for a more rigorous symmetrical filter performance.
摘要翻译：提供了使用单个比较器的对称滤波器。除了分压器，电流调节器和比较器之外，本发明的滤波器还提供控制逻辑，其接通或断开上拉开关和/或下拉开关以便完全充电或完全放电电容器。因此，一方面，本发明是用于对称滤波器的控制逻辑。此外，提供定时逻辑以提供更严格的对称滤波器性能。

7. 发明授权

US06215637B1 Internal voltage clamp protection circuit without parasitic cross-talk 有权
标题翻译：内部电压钳保护电路无寄生串扰
公开(公告)号：US06215637B1
公开(公告)日：2001-04-10
申请号：US09290283
申请日：1999-04-13
申请人： Ross E. Teggatz , John H. Carpenter, Jr. , Tohru Tanaka , Joseph A. Devore
发明人： Ross E. Teggatz , John H. Carpenter, Jr. , Tohru Tanaka , Joseph A. Devore
IPC分类号： H02H322
CPC分类号： H01L27/0259
摘要： A internal circuitry protection scheme which protects on-IC circuitry when an external pin is shorted to a higher than normal voltage. The disclosed solution eliminates cross-talk due to a parasitic NPN.
摘要翻译：内部电路保护方案，当外部引脚短路到高于正常电压时，保护IC上的电路。所公开的解决方案消除了由于寄生NPN引起的串扰。

8. 发明授权

US09091736B2 Systems and methods of battery cell anomaly detection 有权
标题翻译：电池异常检测系统及方法
公开(公告)号：US09091736B2
公开(公告)日：2015-07-28
申请号：US12349039
申请日：2009-01-06
申请人： Karthik Kadirvel , Umar Jameer Lyles , John H. Carpenter, Jr.
发明人： Karthik Kadirvel , Umar Jameer Lyles , John H. Carpenter, Jr.
IPC分类号： G01N27/416 , G01R31/36 , H02J7/00
CPC分类号： G01R31/3658 , H02J7/0021
摘要： Systems and methods for cell anomaly detection are provided. The disclosed systems and methods of cell anomaly detection may use a single circuit to detect both cell-open and imbalance conditions. Disclosed embodiments may incorporate a continuous or a sampled time system (i.e. cell anomaly detection is performed when an enable signal is active). An example embodiment includes receiving voltages of a plurality of cells of a battery pack; converting the received voltages to currents; determining a maximum current of the currents; determining whether at least one of the currents is anomalous; and reporting the at least one anomalous current as indicative of a bad cell.
摘要翻译：提供了细胞异常检测的系统和方法。公开的细胞异常检测的系统和方法可以使用单个电路来检测细胞开放和不平衡条件。公开的实施例可以包括连续或采样的时间系统（即，当使能信号有效时执行信元异常检测）。示例实施例包括接收电池组的多个单元的电压; 将接收的电压转换成电流; 确定电流的最大电流; 确定至少一个电流是否是异常的; 并将至少一个异常电流报告为不良小区的指示。

9. 发明授权

US08264200B2 Multi-cell power system controller 有权
标题翻译：多单元电力系统控制器
公开(公告)号：US08264200B2
公开(公告)日：2012-09-11
申请号：US12466871
申请日：2009-05-15
申请人： Brian Lum-Shue-Chan , Karthik Kadirvel , John H. Carpenter, Jr. , Umar Jameer Lyles
发明人： Brian Lum-Shue-Chan , Karthik Kadirvel , John H. Carpenter, Jr. , Umar Jameer Lyles
IPC分类号： H02J7/00
CPC分类号： G01R31/3658
摘要： Various apparatuses and methods for detecting cell connection status of a multi-cell battery are disclosed herein. For example, some embodiments provide an apparatus for detecting cell connection status of a multi-cell battery. The apparatus includes a battery cell input for each cell, a cell connection status detector for each cell, and at least one comparator. Each of the cell connection status detectors is connected to a battery cell input and has a current-based status indicator output. The at least one comparator is connected to the current-based status indicator outputs. Each of the plurality of cell connection status detectors floats in a different supply voltage range. The at least one comparator is referenced to a lower voltage potential than at least one of the plurality of cell connection status detectors.
摘要翻译：这里公开了用于检测多单元电池的单元连接状态的各种装置和方法。例如，一些实施例提供了用于检测多单元电池的单元连接状态的装置。该装置包括用于每个单元的电池单元输入，每个单元的单元连接状态检测器和至少一个比较器。每个单元连接状态检测器连接到电池单元输入，并具有基于电流的状态指示器输出。至少一个比较器连接到基于电流的状态指示器输出。多个单元连接状态检测器中的每一个浮动在不同的电源电压范围内。所述至少一个比较器参考比多个单元连接状态检测器中的至少一个小的电压电位。

10. 发明授权

US06747498B1 CAN receiver wake-up circuit 有权
标题翻译： CAN接收机唤醒电路
公开(公告)号：US06747498B1
公开(公告)日：2004-06-08
申请号：US10326457
申请日：2002-12-20
申请人： Timothy P. Pauletti , John H. Carpenter, Jr. , Benjamin L. Amey
发明人： Timothy P. Pauletti , John H. Carpenter, Jr. , Benjamin L. Amey
IPC分类号： H03K302
CPC分类号： H04L12/40032 , H04L2012/40215 , H04L2012/40273
摘要： A wake-up circuit for a ECU on a CAN bus utilizes two complementary switching transistors which will turn ON when there is a differential voltage between CANH and CANL which will turn ON the transistors to pass a current which will be mirrored over to create a voltage which will switch a comparator or a Schmitt trigger. The two signals are then ORed together to generate a digital wake-up signal that can be utilized by other on-chip circuitry.
摘要翻译：用于CAN总线上的ECU的唤醒电路使用两个互补的开关晶体管，当CANH和CANL之间存在差分电压时，这两个互感开关晶体管将导通，这将导通晶体管以通过将被镜像以产生电压的电流这将切换比较器或施密特触发器。然后将两个信号OR置于一起以产生可被其它片上电路利用的数字唤醒信号。

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