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1. 发明授权

US08946851B1 Integrated MOS power transistor with thin gate oxide and low gate charge 有权
标题翻译：具有薄栅极氧化物和低栅极电荷的集成MOS功率晶体管
公开(公告)号：US08946851B1
公开(公告)日：2015-02-03
申请号：US13446987
申请日：2012-04-13
申请人： Joel Montgomery McGregor , Vishnu Khemka
发明人： Joel Montgomery McGregor , Vishnu Khemka
IPC分类号： H01L23/58
CPC分类号： H01L29/7835 , H01L29/0619 , H01L29/0634 , H01L29/0653 , H01L29/402
摘要： A split gate power transistor includes a laterally configured power MOSFET including a doped silicon substrate having a first doped region and a second doped region of an opposite type as the first doped region, a gate oxide layer formed on a surface of the substrate, and a split polysilicon layer formed over the gate oxide layer. The polysilicon layer is cut into two electrically isolated portions, a first portion forming a polysilicon gate positioned over a channel region and a transition region of the substrate, and a second portion forming a polysilicon field plate formed entirely over a field oxide filled trench formed in the second doped region. The two polysilicon portions are separated by a gap. A lightly doped region is implanted in the substrate below the gap and adjacent to the trench, thereby forming a fill region having the same doping type as the first doped region.
摘要翻译：分离栅功率晶体管包括横向配置的功率MOSFET，其包括掺杂硅衬底，其具有作为第一掺杂区的相反类型的第一掺杂区和第二掺杂区，形成在衬底表面上的栅氧化层，在栅极氧化物层上形成分裂的多晶硅层。将多晶硅层切割成两个电隔离部分，形成位于衬底的沟道区域和过渡区域上方的多晶硅栅极的第一部分，以及形成在形成在场氧化物填充沟槽上的整个场中的多晶硅场板的第二部分第二掺杂区域。两个多晶硅部分被间隙隔开。将轻掺杂区域注入到间隙下方的衬底中并与沟槽相邻，由此形成具有与第一掺杂区域相同的掺杂类型的填充区域。

2. 发明授权

US08987818B1 Integrated MOS power transistor with thin gate oxide and low gate charge 有权
标题翻译：具有薄栅极氧化物和低栅极电荷的集成MOS功率晶体管
公开(公告)号：US08987818B1
公开(公告)日：2015-03-24
申请号：US13312827
申请日：2011-12-06
申请人： Joel Montgomery McGregor , Vishnu Khemka
发明人： Joel Montgomery McGregor , Vishnu Khemka
IPC分类号： H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L29/7835 , H01L29/0619 , H01L29/0634 , H01L29/0653 , H01L29/402
摘要： A split gate power transistor includes a laterally configured power MOSFET including a doped silicon substrate, a gate oxide layer formed on a surface of the substrate, and a split polysilicon layer formed over the gate oxide layer. The polysilicon layer is cut into two electrically isolated portions, a first portion forming a polysilicon gate positioned over a channel region of the substrate, and a second portion forming a polysilicon field plate formed over a portion of a transition region of the substrate. The two polysilicon portions are separated by a gap. A lightly doped region is implanted in the substrate below the gap, thereby forming a bridge having the same doping type as the substrate body. The field plate also extends over a field oxide filled trench formed in the substrate. The field plate is electrically coupled to a source of the split gate power transistor.
摘要翻译：分离栅功率晶体管包括横向配置的功率MOSFET，其包括掺杂硅衬底，形成在衬底的表面上的栅氧化层，以及形成在栅极氧化物层上的分裂多晶硅层。多晶硅层被切割成两个电隔离部分，第一部分形成位于衬底的沟道区上的多晶硅栅极，以及形成在衬底的过渡区域的一部分上的多晶硅场板的第二部分。两个多晶硅部分被间隙隔开。将轻掺杂区域注入到间隙下方的衬底中，从而形成具有与衬底本体相同的掺杂类型的桥。场板还在形成在衬底中的场氧化物填充沟槽上延伸。场板电耦合到分离栅功率晶体管的源极。

3. 发明申请

US20110115018A1 MOS POWER TRANSISTOR 审中-公开
标题翻译： MOS功率晶体管
公开(公告)号：US20110115018A1
公开(公告)日：2011-05-19
申请号：US12618515
申请日：2009-11-13
申请人： Joel Montgomery McGregor
发明人： Joel Montgomery McGregor
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/7835 , H01L29/0653 , H01L29/402
摘要： A split gate power transistor includes a laterally configured power MOSFET including a doped silicon substrate, a gate oxide layer formed on a surface of the substrate, and a split polysilicon layer formed over the gate oxide layer. The polysilicon layer is cut into two electrically isolated portions, a first portion forming a polysilicon gate positioned over a channel region of the substrate, and a second portion forming a polysilicon field plate formed over a portion of a transition region of the substrate. The field plate also extends over a drift region of the substrate, where the drift region is under a field oxide filled trench formed in the substrate. The field plate is electrically coupled to a source of the split gate power transistor.
摘要翻译：分离栅功率晶体管包括横向配置的功率MOSFET，其包括掺杂硅衬底，形成在衬底的表面上的栅氧化层，以及形成在栅极氧化物层上的分裂多晶硅层。多晶硅层被切割成两个电隔离部分，第一部分形成位于衬底的沟道区上的多晶硅栅极，以及形成在衬底的过渡区域的一部分上的多晶硅场板的第二部分。场板还在衬底的漂移区域上延伸，其中漂移区域位于形成在衬底中的场氧化物填充沟槽下。场板电耦合到分离栅功率晶体管的源极。

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