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1. 发明授权

US5208811A Interconnection system and method for heterogeneous networks 失效
标题翻译：异构网络的互连系统和方法
公开(公告)号：US5208811A
公开(公告)日：1993-05-04
申请号：US607830
申请日：1990-11-01
申请人： Jiro Kashio , Kenji Kawakita , Masao Kunimoto , Tetsuo Takemura , Takeshi Harakawa
发明人： Jiro Kashio , Kenji Kawakita , Masao Kunimoto , Tetsuo Takemura , Takeshi Harakawa
IPC分类号： H04L12/66 , H04Q11/04
CPC分类号： H04Q11/0428 , H04L12/66 , H04Q2213/13096 , H04Q2213/13196 , H04Q2213/13204 , H04Q2213/13209 , H04Q2213/13389
摘要： In a network system in which an interconnection is achieved between an LAN terminal connected to an LAN and an ISDN terminal linked with an ISDN via at least an LAN/ISDN inter-working unit coupling the LAN with the ISDN, the ISDN terminal develops a function to multiplex data link connections (communication paths) identified with respective data link connection identifiers (DLCIs) on ISDN channels. After conducting a call establishment to the ISDN terminal, the inter-working unit supplies the LAN terminal with an ISDN channel number and a DLCI designating an ISDN communication path. Thereafter, the LAN terminal sends an LAN frame having an OSI layer 2 header loaded with the communication path information to the inter-working unit. On receiving the LAN frame, the inter-working unit executes a format conversion to convert the LAN frame into an ISDN frame based on the ISDN communication path information.
摘要翻译：在连接到LAN的LAN终端与通过ISDN连接的ISDN终端之间实现互连的网络系统中，至少LAN / ISDN互通单元将LAN与ISDN相连，ISDN终端产生功能在ISDN信道上复用用相应数据链路连接标识符（DLCI）标识的数据链路连接（通信路径）。在ISDN终端进行呼叫建立之后，互通单元为LAN终端提供ISDN信道号和指定ISDN通信路径的DLCI。此后，LAN终端将具有加载有通信路径信息的OSI层2头部的LAN帧发送到相互连接单元。在接收到LAN帧时，相互作用单元执行格式转换，以便基于ISDN通信路径信息将LAN帧转换成ISDN帧。

2. 发明授权

US5214642A ATM switching system and adaptation processing apparatus 失效
标题翻译： ATM交换系统和适配处理设备
公开(公告)号：US5214642A
公开(公告)日：1993-05-25
申请号：US645041
申请日：1991-01-23
申请人： Masao Kunimoto , Jiro Kashio , Kenji Kawakita , Shinobu Gohara , Shinichi Iwaki , Hiroyuki Ichikawa
发明人： Masao Kunimoto , Jiro Kashio , Kenji Kawakita , Shinobu Gohara , Shinichi Iwaki , Hiroyuki Ichikawa
IPC分类号： G06F5/06 , H04J3/24 , H04L12/56 , H04Q11/04
CPC分类号： H04L49/254 , G06F5/065 , H04J3/247 , H04L49/1553 , H04L49/30 , H04L49/555 , H04Q11/0478 , G06F2205/066 , H04L2012/563 , H04L2012/5652 , H04L49/3009
摘要： An adaptation processing apparatus for assembling received data units of a fixed length to provide variable length data units and transmitting the variable length data units to a plurality of variable length data unit processors while assembling variable length data units received from said plurality of the variable length data unit processors to provide fixed length data units for transmission thereof. An ATM switching system includes the adaptation processing apparatus, a signal processing unit including the plurality of variable length data unit processors mentioned above, and first-in first-out mechanisms for the variable length data units provided in the adaptation processing apparatus in association with every one of the plural variable length data unit processors.
摘要翻译：一种用于组合固定长度的接收数据单元以提供可变长度数据单元并且将可变长度数据单元发送到多个可变长度数据单元处理器的适配处理装置，同时组装从所述多个可变长度数据接收的可变长度数据单元单元处理器以提供用于其传输的固定长度数据单元。 ATM交换系统包括自适应处理装置，包括上述多个可变长度数据单元处理器的信号处理单元，以及在适配处理装置中提供的可变长度数据单元的先进先出机制，与每个多个可变长度数据单元处理器中的一个。

3. 发明授权

US5303236A Signalling apparatus for use in an ATM switching system 失效
标题翻译：用于ATM交换系统的信令装置
公开(公告)号：US5303236A
公开(公告)日：1994-04-12
申请号：US780811
申请日：1991-10-22
申请人： Masao Kunimoto , Jiro Kashio , Makoto Mori , Shinobu Gohara
发明人： Masao Kunimoto , Jiro Kashio , Makoto Mori , Shinobu Gohara
IPC分类号： G06F5/06 , H04J3/24 , H04L12/56 , H04Q11/04 , H04L12/24
CPC分类号： H04L12/5601 , G06F5/065 , H04J3/247 , H04L49/104 , H04L49/1553 , H04Q11/0457 , H04Q11/0478 , G06F2205/066 , H04L2012/563 , H04L2012/5646 , H04L2012/5652 , H04Q2213/107 , H04Q2213/29
摘要： A subscriber line signalling apparatus for use in an asynchronous mode communication system includes a switching circuit having a plurality of input terminals and a plurality of output terminals. The switching circuit selectively communicates fixed length information packets to an adaptation processing unit. The adaptation processing unit reassembles the fixed length packets to signalling frames, and transmits them to a frame processor.
摘要翻译：用于异步模式通信系统的用户线信令装置包括具有多个输入端和多个输出端的开关电路。切换电路选择性地将固定长度信息分组传送到适配处理单元。适配处理单元将固定长度分组重新组合到信令帧，并将它们发送到帧处理器。

4. 发明授权

US5101404A Signalling apparatus for use in an ATM switching system 失效
标题翻译：用于ATM交换系统的信令装置
公开(公告)号：US5101404A
公开(公告)日：1992-03-31
申请号：US397048
申请日：1989-08-21
申请人： Masao Kunimoto , Jiro Kashio , Makoto Mori , Shinobu Gohara
发明人： Masao Kunimoto , Jiro Kashio , Makoto Mori , Shinobu Gohara
IPC分类号： H04L12/56 , H04Q11/04
CPC分类号： H04L49/104 , H04Q11/0457 , H04Q11/0478 , H04L2012/563 , H04Q2213/107 , H04Q2213/29
摘要： A subscriber line signalling apparatus for use in an asynchronous mode communication system includes a switching circuit having a plurality of input terminals and a plurality of output terminals. The switching circuit selectively communicates fixed length information packets to an adaptation processing unit. The adaptation processing unit reassembles the fixed length packets to signalling frames, and transmits them to a frame processor.
摘要翻译：用于异步模式通信系统的用户线信令装置包括具有多个输入端和多个输出端的开关电路。切换电路选择性地将固定长度信息分组传送到适配处理单元。适配处理单元将固定长度分组重新组合到信令帧，并将它们发送到帧处理器。

5. 发明授权

US06396808B1 ATM switching network and ATM switching system in which the transfer of inputted cells is controlled by control cells, and signal processing method in ATM switching network 有权
标题翻译： ATM交换网络和ATM交换系统，其中输入的小区的传输由控制小区控制，以及ATM交换网络中的信号处理方法
公开(公告)号：US06396808B1
公开(公告)日：2002-05-28
申请号：US09519417
申请日：2000-03-06
申请人： Masao Kunimoto , Kenji Kawakita , Shinichi Iwaki , Satoshi Shimizu
发明人： Masao Kunimoto , Kenji Kawakita , Shinichi Iwaki , Satoshi Shimizu
IPC分类号： H04L1256
CPC分类号： H04L49/309 , H04L2012/5627 , H04L2012/563 , H04Q11/0478
摘要： A signal processing method for an ATM switching network formed by connecting a plurality of ATM switching networks in which header conversion tables of line interfaces can be rewritten by control cells, includes in response to occurrence of an abnormality in a call control processor of a ATM switching system A, informing an ATM switching system B of the occurrence of the abnormality, transferring call control information in the ATM switching system A to the ATM switching system B, rewriting header conversion tables included in a plurality of line interfaces of the ATM switching system A by using control cells generated by the ATM switching system A and thereby transferring signal channel cells arriving at the ATM switching system A after occurrence of the abnormality to the ATM switching system B, and rewriting header conversion tables included in a plurality of line interfaces of the ATM switching system A by using control cells generated by the ATM switching system B and thereby making a call control processor of the ATM switching system B effect route control of information channel cells within the ATM switching system A.
摘要翻译：一种用于通过连接多个ATM交换网络形成的ATM交换网络的信号处理方法，其中线路接口的报头转换表可由控制小区重写，包括响应于ATM交换机的呼叫控制处理器中发生异常系统A通知ATM交换系统B发生异常，将ATM交换系统A中的呼叫控制信息传送到ATM交换系统B，重写包括在ATM交换系统A的多个线路接口中的报头转换表通过使用由ATM交换系统A生成的控制信元，从而在ATM交换系统B发生异常之后传送到达ATM交换系统A的信道信元，并重写包含在ATM交换系统A的多个线路接口中的报头转换表 ATM交换系统A通过使用由ATM交换系统B生成的控制信元，从而进行maki ATM交换系统B的呼叫控制处理器对ATM交换系统A内的信道信元进行路由控制。

6. 发明授权

US5175818A Communication interface for independently generating frame information that is subsequently stored in host memory and sent out to transmitting fifo by dma 失效
标题翻译：用于独立生成帧信息的通信接口，随后存储在主机存储器中并通过dma发送出去发送fifo
公开(公告)号：US5175818A
公开(公告)日：1992-12-29
申请号：US313601
申请日：1989-02-21
申请人： Masao Kunimoto , Kenji Kawakita , Kenichi Kimura
发明人： Masao Kunimoto , Kenji Kawakita , Kenichi Kimura
IPC分类号： H04L29/10 , G06F13/12 , G06F13/28 , H04L13/08 , H04L29/06
CPC分类号： H04L29/06 , G06F13/128 , G06F13/28
摘要： A communication system including a communication control unit connected through a communication line to a different system, a high-ranking processor for control of the communication control unit, and a common memory used for transfer of data between the high-ranking processor and the communication control unit. The communication control unit includes a direct memory access controller and a line controller interconnected via a transmission-only path and a reception-only path. The communication control unit autonomously generates an information frame and stores it in the common memory. The direct memory access controller then reads the information frame and transfers it to the line controller via the transmission-only path in order to transmit the information frame to the different system.
摘要翻译：一种通信系统，包括通过通信线路连接到不同系统的通信控制单元，用于控制通信控制单元的高级处理器，以及用于在高级处理器和通信控制之间传送数据的公共存储器单元。通信控制单元包括直接存储器存取控制器和通过仅传输路径和仅接收路径相互连接的线路控制器。通信控制单元自主地生成信息帧并将其存储在公共存储器中。直接存储器存取控制器然后读取信息帧，并通过仅传输路径将其传送到线路控制器，以便将信息帧发送到不同的系统。

7. 发明授权

US6094433A ATM switching network and ATM switching system in which the transfer of inputted cells is controlled by control cells, and signal processing method in ATM switching network 失效
公开(公告)号：US6094433A
公开(公告)日：2000-07-25
申请号：US568359
申请日：1995-12-06
申请人： Masao Kunimoto , Kenji Kawakita , Shinichi Iwaki , Satoshi Shimizu
发明人： Masao Kunimoto , Kenji Kawakita , Shinichi Iwaki , Satoshi Shimizu
IPC分类号： H04L12/56 , H04Q11/04
CPC分类号： H04L49/309 , H04Q11/0478 , H04L2012/5627 , H04L2012/563
摘要： A signal processing method for an ATM switching network formed by connecting a plurality of ATM switching networks in which header conversion tables of line interfaces can be rewritten by control cells, includes in response to occurrence of an abnormality in a call control processor of a ATM switching system A, informing an ATM switching system B of the occurrence of the abnormality, transferring call control information in the ATM switching system A to the ATM switching system B, rewriting header conversion tables included in a plurality of line interfaces of the ATM switching system A by using control cells generated by the ATM switching system A and thereby transferring signal channel cells arriving at the ATM switching system A after occurrence of the abnormality to the ATM switching system B, and rewriting header conversion tables included in a plurality of line interfaces of the ATM switching system A by using control cells generated by the ATM switching system B and thereby making a call control processor of the ATM switching system B effect route control of information channel cells within the ATM switching system A.

8. 发明授权

US6046999A Router apparatus using ATM switch 失效
公开(公告)号：US6046999A
公开(公告)日：2000-04-04
申请号：US28830
申请日：1998-02-13
申请人： Kazuho Miki , Masahiro Takatori , Akihiko Takase , Masaru Murakami , Koji Wakayama , Tetsuro Yoshimoto , Masao Kunimoto
发明人： Kazuho Miki , Masahiro Takatori , Akihiko Takase , Masaru Murakami , Koji Wakayama , Tetsuro Yoshimoto , Masao Kunimoto
IPC分类号： H04J3/04 , H04L12/28 , H04L12/56 , H04L12/66
CPC分类号： H04L49/25 , H04L12/5601 , H04L49/3072 , H04L49/602 , H04L49/606 , H04L2012/5667 , H04L2012/567
摘要： A router apparatus 5 is provided with an ATM switch, an IP controller for performing routing control as a controller for layer 3, plural kinds of interfaces which are individually provided to plural transmission paths in which various communications are performed, and a cell multiplexing/demultiplexing unit, and manages the cell communications between respective parts on the basis of identification information. The input packet is subjected to IP processing in an interface to be converted to a cell in a common format, and the cell is serially multiplexed with a cell from another interface on a cell basis, and transmitted to the ATM switch at the cell multiplexing/demultiplexing unit. Each interface and each cell multiplexing/demultiplexing unit sets and switches the identification information for the header portion of the packet and the cell to be communicated by using a table in which the corresponding relationship of the identification information is registered.

9. 发明授权

US06424662B1 Router apparatus using ATM switch 失效
公开(公告)号：US06424662B1
公开(公告)日：2002-07-23
申请号：US09498353
申请日：2000-02-04
申请人： Kazuho Miki , Masahiro Takatori , Akihiko Takase , Masaru Murakami , Koji Wakayama , Tetsuro Yoshimoto , Masao Kunimoto
发明人： Kazuho Miki , Masahiro Takatori , Akihiko Takase , Masaru Murakami , Koji Wakayama , Tetsuro Yoshimoto , Masao Kunimoto
IPC分类号： H04L1256
CPC分类号： H04L49/25 , H04L12/5601 , H04L49/3072 , H04L49/602 , H04L49/606 , H04L2012/5667 , H04L2012/567
摘要： A router apparatus 5 is provided with an ATM switch, an IP controller for performing routing control as a controller for layer 3, plural kinds of interfaces which are individually provided to plural transmission paths in which various communications are performed, and a cell multiplexing/demultiplexing unit, and manages the cell communications between respective parts on the basis of identification information. The input packet is subjected to IP processing in an interface to be converted to a cell in a common format, and the cell is serially multiplexed with a cell from another interface on a cell basis, and transmitted to the ATM switch at the cell multiplexing/demultiplexing unit. Each interface and each cell multiplexing/demultiplexing unit sets and switches the identification information for the header portion of the packet and the cell to be communicated by using a table in which the corresponding relationship of the identification information is registered.

10. 发明授权

US06385171B1 Router apparatus using ATM switch 失效
标题翻译：路由器使用ATM交换机
公开(公告)号：US06385171B1
公开(公告)日：2002-05-07
申请号：US09410575
申请日：1999-10-01
申请人： Akihiko Takase , Masahiro Takatori , Kazuho Miki , Masaru Murakami , Koji Wakayama , Tetsuro Yoshimoto , Masao Kunimoto
发明人： Akihiko Takase , Masahiro Takatori , Kazuho Miki , Masaru Murakami , Koji Wakayama , Tetsuro Yoshimoto , Masao Kunimoto
IPC分类号： H04L1228
CPC分类号： H04L12/5601 , H04L49/255 , H04L49/606 , H04L49/608 , H04L2012/5618 , H04L2012/5638 , H04L2012/5652 , H04L2012/5658 , H04L2012/5667 , H04L2012/5674 , H04L2012/5681 , H04Q11/0478
摘要： An LAN interface unit and an ATM switch unit cooperate to perform traffic control. A QoS unit monitors circumstances of an input buffer from a multiplexer of the ATM switch by means of a system controller and when an overflow of the input buffer is expected, the LAN interface unit of the multiplexer is instructed to perform traffic control. The LAN interface unit performs traffic control such as limitation of ATM cells inputted in the ATM switch.
摘要翻译： LAN接口单元和ATM交换单元协作来执行业务控制。 QoS单元通过系统控制器监视来自ATM交换机的多路复用器的输入缓冲器的情况，并且当期望输入缓冲器的溢出时，指示多路复用器的LAN接口单元进行业务控制。 LAN接口单元执行诸如限制在ATM交换机中输入的ATM信元的流量控制。

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