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1. 发明申请

US20070063294A1 Semiconductor Device Having a Fully Silicided Gate Electrode and Method of Manufacture Therefor 审中-公开
标题翻译：具有全硅酸盐栅电极的半导体器件及其制造方法
公开(公告)号：US20070063294A1
公开(公告)日：2007-03-22
申请号：US11556834
申请日：2006-11-06
申请人： Haowen Bu , Jiong-Ping Lu , Shaofeng Yu , Ping Jiang , Clint Montgomery
发明人： Haowen Bu , Jiong-Ping Lu , Shaofeng Yu , Ping Jiang , Clint Montgomery
IPC分类号： H01L29/76 , H01L29/94 , H01L31/00 , H01L27/108 , H01L31/119
CPC分类号： H01L29/66507 , H01L21/28097 , H01L21/823835 , H01L21/823864 , H01L29/4975 , H01L29/6656 , H01L29/6659 , H01L29/7833
摘要： The present invention provides a semiconductor device, a method of manufacture therefor, and a method for manufacturing an integrated circuit. The semiconductor device (100), among other possible elements, includes a silicided gate electrode (150) located over a substrate (110), the silicided gate electrode (150) having gate sidewall spacers (160) located on sidewalls thereof. The semiconductor device (100) further includes source/drain regions (170) located in the substrate (110) proximate the silicided gate electrode (150), and silicided source/drain regions (180) located in the source/drain regions (170) and at least partially under the gate sidewall spacers (160).
摘要翻译：本发明提供一种半导体器件及其制造方法以及集成电路的制造方法。除了其它可能的元件之外，半导体器件（100）包括位于衬底（110）上方的硅化栅电极（150），硅化栅电极（150）具有位于其侧壁上的栅极侧壁间隔物（160）。半导体器件（100）还包括位于靠近硅化物栅电极（150）的衬底（110）中的源/漏区（170）和位于源/漏区（170）中的硅化源/漏区（180）并且至少部分地在栅极侧壁间隔件（160）下方。

2. 发明申请

US20050215055A1 Semiconductor device having a fully silicided gate electrode and method of manufacture therefor 有权
标题翻译：具有全硅化物栅电极的半导体器件及其制造方法
公开(公告)号：US20050215055A1
公开(公告)日：2005-09-29
申请号：US10808168
申请日：2004-03-24
申请人： Haowen Bu , Jiong-Ping Lu , Shaofeng Yu , Ping Jiang , Clint Montgomery
发明人： Haowen Bu , Jiong-Ping Lu , Shaofeng Yu , Ping Jiang , Clint Montgomery
IPC分类号： H01L21/28 , H01L21/336 , H01L21/8238 , H01L29/49 , H01L29/78
CPC分类号： H01L29/66507 , H01L21/28097 , H01L21/823835 , H01L21/823864 , H01L29/4975 , H01L29/6656 , H01L29/6659 , H01L29/7833
摘要： The present invention provides a semiconductor device, a method of manufacture therefor, and a method for manufacturing an integrated circuit. The semiconductor device (100), among other possible elements, includes a silicided gate electrode (150) located over a substrate (110), the silicided gate electrode (150) having gate sidewall spacers (160) located on sidewalls thereof. The semiconductor device (100) further includes source/drain regions (170) located in the substrate (110) proximate the silicided gate electrode (150), and silicided source/drain regions (180) located in the source/drain regions (170) and at least partially under the gate sidewall spacers (160).
摘要翻译：本发明提供一种半导体器件及其制造方法以及集成电路的制造方法。除了其它可能的元件之外，半导体器件（100）包括位于衬底（110）上方的硅化栅电极（150），硅化栅电极（150）具有位于其侧壁上的栅极侧壁间隔物（160）。半导体器件（100）还包括位于靠近硅化物栅电极（150）的衬底（110）中的源/漏区（170）和位于源/漏区（170）中的硅化源/漏区（180）并且至少部分地在栅极侧壁间隔件（160）下方。

3. 发明授权

US07148143B2 Semiconductor device having a fully silicided gate electrode and method of manufacture therefor 有权
标题翻译：具有全硅化物栅电极的半导体器件及其制造方法
公开(公告)号：US07148143B2
公开(公告)日：2006-12-12
申请号：US10808168
申请日：2004-03-24
申请人： Haowen Bu , Jiong-Ping Lu , Shaofeng Yu , Ping Jiang , Clint Montgomery
发明人： Haowen Bu , Jiong-Ping Lu , Shaofeng Yu , Ping Jiang , Clint Montgomery
IPC分类号： H01L21/44 , H01L21/4763 , H01L21/461 , H01L21/302
CPC分类号： H01L29/66507 , H01L21/28097 , H01L21/823835 , H01L21/823864 , H01L29/4975 , H01L29/6656 , H01L29/6659 , H01L29/7833
摘要： The present invention provides a semiconductor device, a method of manufacture therefor, and a method for manufacturing an integrated circuit. The semiconductor device (100), among other possible elements, includes a silicided gate electrode (150) located over a substrate (110), the silicided gate electrode (150) having gate sidewall spacers (160) located on sidewalls thereof. The semiconductor device (100) further includes source/drain regions (170) located in the substrate (110) proximate the silicided gate electrode (150), and silicided source/drain regions (180) located in the source/drain regions (170) and at least partially under the gate sidewall spacers (160).
摘要翻译：本发明提供一种半导体器件及其制造方法以及集成电路的制造方法。除了其它可能的元件之外，半导体器件（100）包括位于衬底（110）上方的硅化栅电极（150），硅化栅电极（150）具有位于其侧壁上的栅极侧壁间隔物（160）。半导体器件（100）还包括位于靠近硅化物栅电极（150）的衬底（110）中的源/漏区（170）和位于源/漏区（170）中的硅化源/漏区（180）并且至少部分地在栅极侧壁间隔件（160）下方。

4. 发明申请

US20050110114A1 Capacitor formed on a recrystallized polysilicon layer and a method of manufacture therefor 审中-公开
标题翻译：在再结晶的多晶硅层上形成的电容器及其制造方法
公开(公告)号：US20050110114A1
公开(公告)日：2005-05-26
申请号：US10722013
申请日：2003-11-25
申请人： Jiong-Ping Lu , Haowen Bu , Clint Montgomery
发明人： Jiong-Ping Lu , Haowen Bu , Clint Montgomery
IPC分类号： H01L21/02 , H01L21/8242 , H01L29/00
CPC分类号： H01L28/40 , H01L27/1085
摘要： The present invention provides a semiconductor device, a method of manufacture therefor, and an integrated circuit including the semiconductor device. The semiconductor device, among other elements, includes a recrystallized polysilicon layer 148 located over a gate electrode layer 143, a capacitor 170 located on the recrystallized polysilicon layer 148. The capacitor 170, in this embodiment, includes a first electrode 173, an insulator 175 located over the first electrode 173, and a second electrode 178 located over the insulator 175.
摘要翻译：本发明提供一种半导体器件及其制造方法以及包括半导体器件的集成电路。除了其他元件之外，半导体器件包括位于栅电极层143上的再结晶多晶硅层148，位于再结晶多晶硅层148上的电容器170。在该实施例中，电容器170包括第一电极173，位于第一电极173上方的绝缘体175和位于绝缘体175上方的第二电极178。

5. 发明授权

US08053296B2 Capacitor formed on a recrystallized polysilicon layer 有权
标题翻译：在再结晶的多晶硅层上形成的电容器
公开(公告)号：US08053296B2
公开(公告)日：2011-11-08
申请号：US12478512
申请日：2009-06-04
申请人： Jiong-Ping Lu , Haowen Bu , Clint Montgomery
发明人： Jiong-Ping Lu , Haowen Bu , Clint Montgomery
IPC分类号： H01L21/00
CPC分类号： H01L28/40 , H01L27/1085
摘要： The present invention provides a semiconductor device, a method of manufacture therefor, and an integrated circuit including the semiconductor device. The semiconductor device, among other elements, includes a recrystallized polysilicon layer 148 located over a gate electrode layer 143, a capacitor 170 located on the recrystallized polysilicon layer 148. The capacitor 170, in this embodiment, includes a first electrode 173, an insulator 175 located over the first electrode 173, and a second electrode 178 located over the insulator 175.
摘要翻译：本发明提供一种半导体器件及其制造方法以及包括半导体器件的集成电路。除了其他元件之外，半导体器件包括位于栅电极层143上的再结晶多晶硅层148，位于再结晶多晶硅层148上的电容器170.在该实施例中，电容器170包括第一电极173，绝缘体175 位于第一电极173上方，以及位于绝缘体175上方的第二电极178。

6. 发明申请

US20100159665A1 CAPACITOR FORMED ON A RECRYSTALLIZED POLYSILICON LAYER 有权
标题翻译：电容器在重组多晶硅层上形成
公开(公告)号：US20100159665A1
公开(公告)日：2010-06-24
申请号：US12478512
申请日：2009-06-04
申请人： Jiong-Ping Lu , Haowen Bu , Clint Montgomery
发明人： Jiong-Ping Lu , Haowen Bu , Clint Montgomery
IPC分类号： H01L21/02
CPC分类号： H01L28/40 , H01L27/1085
摘要： The present invention provides a semiconductor device, a method of manufacture therefor, and an integrated circuit including the semiconductor device. The semiconductor device, among other elements, includes a recrystallized polysilicon layer 148 located over a gate electrode layer 143, a capacitor 170 located on the recrystallized polysilicon layer 148. The capacitor 170, in this embodiment, includes a first electrode 173, an insulator 175 located over the first electrode 173, and a second electrode 178 located over the insulator 175.
摘要翻译：本发明提供一种半导体器件及其制造方法以及包括半导体器件的集成电路。除了其他元件之外，半导体器件包括位于栅电极层143上的再结晶多晶硅层148，位于再结晶多晶硅层148上的电容器170.在该实施例中，电容器170包括第一电极173，绝缘体175 位于第一电极173上方，以及位于绝缘体175上方的第二电极178。

7. 发明授权

US07253049B2 Method for fabricating dual work function metal gates 有权
标题翻译：双功能金属门制造方法
公开(公告)号：US07253049B2
公开(公告)日：2007-08-07
申请号：US11017469
申请日：2004-12-20
申请人： Jiong-Ping Lu , Shaofeng Yu , Haowen Bu , Lindsey H. Hall , Mark R. Visokay
发明人： Jiong-Ping Lu , Shaofeng Yu , Haowen Bu , Lindsey H. Hall , Mark R. Visokay
IPC分类号： H01L21/8238
CPC分类号： H01L21/823842 , H01L21/28097 , H01L21/28518 , H01L29/4975 , H01L29/51 , H01L29/6659 , H01L29/7833
摘要： A method for making PMOS and NMOS transistors 60, 70 on a semiconductor substrate 20 that includes having a gate protection layer 210 over the gate electrode layer 110 during the formation of source/drain silicides 120. The method may include implanting dopants into a gate polysilicon layer 115 before forming the protection layer 215.
摘要翻译：一种用于在半导体衬底20上制造PMOS和NMOS晶体管60,70的方法，其包括在源/漏硅化物120形成期间在栅电极层110上方具有栅极保护层210。该方法可以包括在形成保护层215之前将掺杂剂注入到栅极多晶硅层115中。

8. 发明申请

US20090079010A1 NICKEL SILICIDE FORMATION FOR SEMICONDUCTOR COMPONENTS 有权
标题翻译：镍半导体成分的镍硅化物形成
公开(公告)号：US20090079010A1
公开(公告)日：2009-03-26
申请号：US11861421
申请日：2007-09-26
申请人： Juanita DeLoach , Jiong-Ping Lu , Haowen Bu
发明人： Juanita DeLoach , Jiong-Ping Lu , Haowen Bu
IPC分类号： H01L29/78 , H01L21/3205
CPC分类号： H01L29/665 , H01L21/26506 , H01L21/28052 , H01L21/28518 , H01L29/7833
摘要： Semiconductor components are often fabricated that include a nickel silicide layer, e.g., as part of a gate electrode in a transistor component, which may be formed by forming a layer of nickel on a silicon-containing area of the semiconductor substrate, followed by thermally annealing the semiconductor substrate to produce a nickel silicide. However, nickel may tend to diffuse into silicon during the thermal anneal, and may form crystals that undesirably increase the sheet resistance in the transistor. Carbon may be placed with the nickel to serve as a diffusion suppressant and/or to prevent nickel crystal formation during thermal annealing. Methods are disclosed for utilizing this technique, as well as semiconductor components formed in accordance with this technique.
摘要翻译：通常制造半导体部件，其包括硅化镍层，例如，作为晶体管部件中的栅电极的一部分，其可以通过在半导体衬底的含硅区域上形成镍层，然后进行热退火半导体衬底以产生硅化镍。然而，镍可能在热退火期间扩散到硅中，并且可能形成不期望地增加晶体管中的薄层电阻的晶体。碳可以与镍一起放置以用作扩散抑制剂和/或防止在热退火期间形成镍晶体。公开了利用该技术的方法以及根据该技术形成的半导体部件。

9. 发明授权

US08546259B2 Nickel silicide formation for semiconductor components 有权
标题翻译：半导体元件的硅化镍形成
公开(公告)号：US08546259B2
公开(公告)日：2013-10-01
申请号：US11861421
申请日：2007-09-26
申请人： Juanita DeLoach , Jiong-Ping Lu , Haowen Bu
发明人： Juanita DeLoach , Jiong-Ping Lu , Haowen Bu
IPC分类号： H01L21/44
CPC分类号： H01L29/665 , H01L21/26506 , H01L21/28052 , H01L21/28518 , H01L29/7833
摘要： Semiconductor components are often fabricated that include a nickel silicide layer, e.g., as part of a gate electrode in a transistor component, which may be formed by forming a layer of nickel on a silicon-containing area of the semiconductor substrate, followed by thermally annealing the semiconductor substrate to produce a nickel silicide. However, nickel may tend to diffuse into silicon during the thermal anneal, and may form crystals that undesirably increase the sheet resistance in the transistor. Carbon may be placed with the nickel to serve as a diffusion suppressant and/or to prevent nickel crystal formation during thermal annealing. Methods are disclosed for utilizing this technique, as well as semiconductor components formed in accordance with this technique.
摘要翻译：通常制造半导体部件，其包括硅化镍层，例如，作为晶体管部件中的栅电极的一部分，其可以通过在半导体衬底的含硅区域上形成镍层，然后进行热退火半导体衬底以产生硅化镍。然而，镍可能在热退火期间扩散到硅中，并且可能形成不期望地增加晶体管中的薄层电阻的晶体。碳可以与镍一起放置以用作扩散抑制剂和/或防止在热退火期间形成镍晶体。公开了利用该技术的方法以及根据该技术形成的半导体部件。

10. 发明授权

US07338888B2 Method for manufacturing a semiconductor device having a silicided gate electrode and a method for manufacturing an integrated circuit including the same 有权
标题翻译：用于制造具有硅化物栅电极的半导体器件的方法和包括其的集成电路的制造方法
公开(公告)号：US07338888B2
公开(公告)日：2008-03-04
申请号：US10810759
申请日：2004-03-26
申请人： Jiong-Ping Lu , Haowen Bu , Shaofeng Yu , Ping Jiang
发明人： Jiong-Ping Lu , Haowen Bu , Shaofeng Yu , Ping Jiang
IPC分类号： H01L21/28 , H01L21/44 , H01L21/76 , H01L21/4763
CPC分类号： H01L29/66507 , H01L21/28097 , H01L29/4975 , H01L29/6656 , H01L29/6659 , H01L29/7833
摘要： The present invention provides a method for manufacturing a semiconductor device and a method for manufacturing an integrated circuit including the semiconductor device. The method for manufacturing the semiconductor device (100), among other possible steps, includes forming a polysilicon gate electrode over a substrate (110) and forming source/drain regions (170) in the substrate (110) proximate the polysilicon gate electrode. The method further includes forming a blocking layer (180) over the source/drain regions (170), the blocking layer (180) comprising a metal silicide, and siliciding the polysilicon gate electrode to form a silicided gate electrode (150).
摘要翻译：本发明提供一种制造半导体器件的方法及其制造方法，该集成电路包括该半导体器件。除了其他可能的步骤之外，用于制造半导体器件（100）的方法包括在衬底（110）上形成多晶硅栅电极，并在靠近多晶硅栅电极的衬底（110）中形成源/漏区（170）。该方法还包括在源极/漏极区域（170）上形成阻挡层（180），阻挡层（180）包括金属硅化物，并硅化多晶硅栅电极以形成硅化物栅电极（150）。

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